On Wed, Feb 14, 2024 at 10:59:12AM +0100, Jiri Slaby wrote:
On 14. 02. 24, 10:04, Jiri Slaby wrote:
On 13. 02. 24, 18:21, Greg Kroah-Hartman wrote:
6.7-stable review patch. If anyone has any objections, please let me know.
From: Alexandre Ghiti alexghiti@rivosinc.com
[ Upstream commit 7a92fc8b4d20680e4c20289a670d8fca2d1f2c1b ]
The pcpu setup when using the page allocator sets up a new vmalloc mapping very early in the boot process, so early that it cannot use the flush_cache_vmap() function which may depend on structures not yet initialized (for example in riscv, we currently send an IPI to flush other cpus TLB).
...
--- a/arch/riscv/mm/tlbflush.c +++ b/arch/riscv/mm/tlbflush.c @@ -66,6 +66,11 @@ static inline void local_flush_tlb_range_asid(unsigned long start, local_flush_tlb_range_threshold_asid(start, size, stride, asid); } +void local_flush_tlb_kernel_range(unsigned long start, unsigned long end) +{ + local_flush_tlb_range_asid(start, end, PAGE_SIZE, FLUSH_TLB_NO_ASID);
This apparently requires also: commit ebd4acc0cbeae9efea15993b11b05bd32942f3f0 Author: Alexandre Ghiti alexghiti@rivosinc.com Date: Tue Jan 23 14:27:30 2024 +0100
riscv: Fix wrong size passed to local_flush_tlb_range_asid()
Ah,
the very same fix is contained in 074 as: commit d9807d60c145836043ffa602328ea1d66dc458b1 Author: Vincent Chen vincent.chen@sifive.com Date: Wed Jan 17 22:03:33 2024 +0800
riscv: mm: execute local TLB flush after populating vmemmapSo ebd4acc0c above is redundant (nothing is needed to be done here).
Not noise at all, thanks for checking!
greg k-h