+ Qiang
On Mon, Dec 22, 2025 at 08:00:57AM +0100, Niklas Cassel wrote:
On Mon, Dec 22, 2025 at 12:18:32PM +0530, Krishna Chaitanya Chundru wrote:
@@ -1982,8 +1981,7 @@ static int qcom_pcie_probe(struct platform_device *pdev) goto err_host_deinit; }
writel_relaxed(PARF_INT_ALL_LINK_UP | PARF_INT_MSI_DEV_0_7,pcie->parf + PARF_INT_ALL_MASK);MSI's needs to be enabled irrespective of this series as part of global IRQ otherwise MSI's will not be triggered in few platforms.
Mani, exclude this patch while applying.
From the commit message of the reverted patch:
The MSI bits in PARF_INT_ALL_MASK register are enabled by default in the hardware, but commit 4581403f6792 ("PCI: qcom: Enumerate endpoints based on Link up event in 'global_irq' interrupt") disabled them and enabled only the Link up interrupt.
Thus, applying this patch should be safe, or at least bring back the original behavior as it was before the Link Up IRQ patches got applied.
Yes!
But if you prefer to enable the MSI bits explicitly, in order to not rely on HW defaults, that should also be fine.
I believe Qiang reported internally that we need to explicitly enable PARF_INT_MSI_DEV_0_7 for all platforms as the hardware default is not always correct. So that should come as a separate patch.
- Mani