From: Jonathan Cameron Jonathan.Cameron@huawei.com
[ Upstream commit 1673b7ca2dc1fb3b8d7c94a112496c02d34ae449 ]
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition.
Update the comment to include 'may'.
Fixes: e4c5c4dfaa88 ("iio: adc: new driver to support Linear technology's ltc2496") Signed-off-by: Jonathan Cameron Jonathan.Cameron@huawei.com Cc: Uwe Kleine-König u.kleine-koenig@pengutronix.de Acked-by: Nuno Sá nuno.sa@analog.com Link: https://lore.kernel.org/r/20220508175712.647246-22-jic23@kernel.org Signed-off-by: Sasha Levin sashal@kernel.org --- drivers/iio/adc/ltc2496.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/iio/adc/ltc2496.c b/drivers/iio/adc/ltc2496.c index 5a55f79f2574..dfb3bb5997e5 100644 --- a/drivers/iio/adc/ltc2496.c +++ b/drivers/iio/adc/ltc2496.c @@ -24,10 +24,10 @@ struct ltc2496_driverdata { struct spi_device *spi;
/* - * DMA (thus cache coherency maintenance) requires the + * DMA (thus cache coherency maintenance) may require the * transfer buffers to live in their own cache lines. */ - unsigned char rxbuf[3] ____cacheline_aligned; + unsigned char rxbuf[3] __aligned(IIO_DMA_MINALIGN); unsigned char txbuf[3]; };