On Tue, Feb 20, 2024 at 07:28:16PM +0000, Easwar Hariharan wrote:
commit fb091ff394792c018527b3211bbdfae93ea4ac02 upstream
Add the MIDR value of Microsoft Azure Cobalt 100, which is a Microsoft implemented CPU based on r0p0 of the ARM Neoverse N2 CPU, and therefore suffers from all the same errata.
CC: stable@vger.kernel.org # 5.15+ Signed-off-by: Easwar Hariharan eahariha@linux.microsoft.com Reviewed-by: Anshuman Khandual anshuman.khandual@arm.com Acked-by: Mark Rutland mark.rutland@arm.com Acked-by: Marc Zyngier maz@kernel.org Reviewed-by: Oliver Upton oliver.upton@linux.dev Link: https://lore.kernel.org/r/20240214175522.2457857-1-eahariha@linux.microsoft.... Signed-off-by: Will Deacon will@kernel.org Signed-off-by: Easwar Hariharan eahariha@linux.microsoft.com
Documentation/arm64/silicon-errata.rst | 7 +++++++ arch/arm64/include/asm/cputype.h | 4 ++++ arch/arm64/kernel/cpu_errata.c | 3 +++ 3 files changed, 14 insertions(+)
Both now queued up, thanks.
greg k-h