Hi Vineet,
-----Original Message----- From: Vineet Gupta vgupta@synopsys.com Sent: Friday, February 15, 2019 4:34 AM To: Alexey Brodkin alexey.brodkin@synopsys.com; Peter Zijlstra peterz@infradead.org Cc: David Laight David.Laight@ACULAB.COM; linux-snps-arc@lists.infradead.org; Arnd Bergmann arnd.bergmann@linaro.org; linux-kernel@vger.kernel.org; stable@vger.kernel.org; Mark Rutland mark.rutland@arm.com Subject: Re: [PATCH] ARC: Explicitly set ARCH_SLAB_MINALIGN = 8
On 2/14/19 12:50 AM, Alexey Brodkin wrote:
I suspect the slab allocator should be returning 8 byte aligned addresses on all systems....
why ? As I understand it is still not fool proof against the expected alignment of inner members. There ought to be a better way to enforce all this.
I agree that for ARC ARCH_SLAB_MINALIGN should be at least 8.
This issue aside, are there other reasons ? Because making it 8 on ARC is just pending the eventuality for later.
But that's pretty much the same for other 32-bit arches that have 64-bit atomics like ARM etc. From what I may see from ARM's documentation for LDREXD/SRREXD they require double-word alignment of data as well.
Right LLOCKD/SCONDD (64-bit exclusive load/store) needs 64-bit aligned effective addresses for micro-arch reasons (1 vs 2 cache lines) etc.
So lets try to unpack this for me. Say we had.
struct foo { int a; atomic64_t b; };
The atomic64_t (which for ARC and most others is u64 __attribute__((aligned(8)) *already ensures* that there a 4 b padding is generated by gcc (I just confirmed with a simple test case).
#ifdef DOALIGN__ #define my_u64 __u64 __attribute__((aligned(8))) #else #define my_u64 __u64 #endif
struct foo on_heap;
printf(%d", &on_heap.b)
$ arc-linux-gcc -O2 test.c -DDOALIGN__ -c --save-temps
main: mov_s r1,@on_heap+8 <---- mov_s r0,@.LC0 b @printf
W/o the alignment attribute (say normal LDD/STD)
$ arc-linux-gcc -O2 test.c -c --save-temps
main: mov_s r1,@on_heap+4 mov_s r0,@.LC0 b @printf
So indeed your patch aligns dynamic structs to 64-bit, ensuring any embedded aligned_u64 to be 64-bit aligned as well. Phew !
That said if for some reason atomic64_t variable is unaligned execution on any (or at least most) 32-bit architectures will lead to run-time failure, i.e. we'll know about it and this will be fixed.
And what I'm doing by that change (ARCH_SLAB_MINALIGN=8 for ARC) I'm just working-around peculiarity of ARC ABI.
Right.
So are you OK with this patch or something should be done before applying?
Out of curiosity I checked if there're any other occurrences of "alingof(long long)" and there seems to be a couple of more: ----------------------------------->8----------------------------- # git grep alignof | grep "long long"
...
kernel/workqueue.c:5693: WARN_ON(__alignof__(struct pool_workqueue) < __alignof__(long
long));
mm/slab.c:155:#define REDZONE_ALIGN max(BYTES_PER_WORD, __alignof__(unsigned long long))
For ARC, it will be max(4,4) so 4 for others 32-bit,it will be max(4,8)
So indeed it makes sense to change it.
I guess that's still a separate change for generic code, right? I.e. I'll do it in a separate patch.
-Alexey