The patch below does not apply to the 4.19-stable tree. If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to stable@vger.kernel.org.
Thanks, Sasha
------------------ original commit in Linus's tree ------------------
From 3d066f9547dd58329b526db44f42c487a7974703 Mon Sep 17 00:00:00 2001 From: Nicholas Kazlauskas nicholas.kazlauskas@amd.com Date: Wed, 21 Feb 2024 12:27:31 -0500 Subject: [PATCH] drm/amd/display: Fix idle check for shared firmware state
[WHY] We still had an instance of get_idle_state checking the PMFW scratch register instead of the actual idle allow signal.
[HOW] Replace it with the SW state check for whether we had allowed idle through notify_idle.
Cc: Mario Limonciello mario.limonciello@amd.com Cc: Alex Deucher alexander.deucher@amd.com Cc: stable@vger.kernel.org Reviewed-by: Duncan Ma duncan.ma@amd.com Acked-by: Alex Hung alex.hung@amd.com Signed-off-by: Nicholas Kazlauskas nicholas.kazlauskas@amd.com Tested-by: Daniel Wheeler daniel.wheeler@amd.com Signed-off-by: Alex Deucher alexander.deucher@amd.com --- drivers/gpu/drm/amd/display/dc/core/dc.c | 12 +++--------- 1 file changed, 3 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c index 613d09c42f3b9..958552a8605ff 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc.c @@ -4847,22 +4847,16 @@ void dc_exit_ips_for_hw_access(struct dc *dc)
bool dc_dmub_is_ips_idle_state(struct dc *dc) { - uint32_t idle_state = 0; - if (dc->debug.disable_idle_power_optimizations) return false;
if (!dc->caps.ips_support || (dc->config.disable_ips == DMUB_IPS_DISABLE_ALL)) return false;
- if (dc->hwss.get_idle_state) - idle_state = dc->hwss.get_idle_state(dc); - - if (!(idle_state & DMUB_IPS1_ALLOW_MASK) || - !(idle_state & DMUB_IPS2_ALLOW_MASK)) - return true; + if (!dc->ctx->dmub_srv) + return false;
- return false; + return dc->ctx->dmub_srv->idle_allowed; }
/* set min and max memory clock to lowest and highest DPM level, respectively */