18 Nov
2025
18 Nov
'25
10:09 a.m.
On 11/18/25 9:50 AM, Akhil P Oommen wrote:
REG_A6XX_GMU_AO_AHB_FENCE_CTRL register falls under GMU's register range. So, use gmu_write() routines to write to this register.
Fixes: 1707add81551 ("drm/msm/a6xx: Add a6xx gpu state") Cc: stable@vger.kernel.org Signed-off-by: Akhil P Oommen akhilpo@oss.qualcomm.com
Reviewed-by: Konrad Dybcio konrad.dybcio@oss.qualcomm.com
Konrad