Re: [PATCH v2] usb: dwc3: core: Do core softreset when switch mode

On Thu, Apr 15, 2021 at 9:29 AM Thinh Nguyen Thinh.Nguyen@synopsys.com wrote:

From: Yu Chen chenyu56@huawei.com From: John Stultz john.stultz@linaro.org

According to the programming guide, to switch mode for DRD controller, the driver needs to do the following.

To switch from device to host:

1. Reset controller with GCTL.CoreSoftReset
2. Set GCTL.PrtCapDir(host mode)
3. Reset the host with USBCMD.HCRESET
4. Then follow up with the initializing host registers sequence

To switch from host to device:

1. Reset controller with GCTL.CoreSoftReset
2. Set GCTL.PrtCapDir(device mode)
3. Reset the device with DCTL.CSftRst
4. Then follow up with the initializing registers sequence

Currently we're missing step 1) to do GCTL.CoreSoftReset and step 3) of switching from host to device. John Stult reported a lockup issue seen with HiKey960 platform without these steps[1]. Similar issue is observed with Ferry's testing platform[2].

So, apply the required steps along with some fixes to Yu Chen's and John Stultz's version. The main fixes to their versions are the missing wait for clocks synchronization before clearing GCTL.CoreSoftReset and only apply DCTL.CSftRst when switching from host to device.

[1] https://lore.kernel.org/linux-usb/20210108015115.27920-1-john.stultz@linaro.... [2] https://lore.kernel.org/linux-usb/0ba7a6ba-e6a7-9cd4-0695-64fc927e01f1@gmail...

Cc: Andy Shevchenko andy.shevchenko@gmail.com Cc: Ferry Toth fntoth@gmail.com Cc: Wesley Cheng wcheng@codeaurora.org Cc: stable@vger.kernel.org Fixes: 41ce1456e1db ("usb: dwc3: core: make dwc3_set_mode() work properly") Signed-off-by: Yu Chen chenyu56@huawei.com Signed-off-by: John Stultz john.stultz@linaro.org Signed-off-by: Thinh Nguyen Thinh.Nguyen@synopsys.com

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Changes in v2:

• Initialize mutex per device and not as global mutex.
• Add additional checks for DRD only mode

Hey Thinh!

Thanks so much for your persisting effort on this issue! Its something I'd love to see finally resolved!

static void __dwc3_set_mode(struct work_struct *work) { struct dwc3 *dwc = work_to_dwc(work); unsigned long flags;

•   unsigned int hw_mode;
  

•   bool otg_enabled = false;
    int ret;
    u32 reg;
  
  

•   mutex_lock(&dwc->mutex);
  

•   hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0);
  

•   if (DWC3_VER_IS_PRIOR(DWC3, 330A) &&
  

•       (dwc->hwparams.hwparams6 & DWC3_GHWPARAMS6_SRPSUPPORT))
  

•           otg_enabled = true;
  

Unfortunately on HiKey960, this check ends up being true, and that basically disables the needed (on HiKey960 at least) soft reset logic below, so we still end up hitting the issue.

The revision/hwparams6 values on the board are: revision: 0x5533300a hwparams6: 0xfeaec20

Just to make sure, I did test disabling the check here, and it does seem to avoid the !COREIDLE stuck problem seen frequently on the board.

thanks -john