On Tue, Nov 11, 2025 at 04:08:01PM +0800, niravkumarlaxmidas.rabara@altera.com wrote:
From: Niravkumar L Rabara niravkumarlaxmidas.rabara@altera.com
The OCRAM ECC is always enabled either by the BootROM or by the Secure Device Manager (SDM) during a power-on reset on SoCFPGA.
However, during a warm reset, the OCRAM content is retained to preserve data, while the control and status registers are reset to their default values. As a result, ECC must be explicitly re-enabled after a warm reset.
Fixes: 17e47dc6db4f ("EDAC/altera: Add Stratix10 OCRAM ECC support") Cc: stable@vger.kernel.org Signed-off-by: Niravkumar L Rabara niravkumarlaxmidas.rabara@altera.com Acked-by: Dinh Nguyen dinguyen@kernel.org
v2 changes:
- Add Fixes and Cc tags
- Retains Acked-by from v1 patch
v1 link: https://lore.kernel.org/all/20251103140920.1060643-1-niravkumarlaxmidas.raba...
drivers/edac/altera_edac.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-)
Applied, thanks.