16 Oct
2025
16 Oct
'25
5:53 p.m.
On Thu, Oct 16, 2025 at 12:25:04PM -0500, Bjorn Helgaas wrote:
On Thu, Oct 16, 2025 at 11:04:22AM +0200, Niklas Cassel wrote:
The L1 substates support requires additional steps to work, see e.g. section '11.6.6.4 L1 Substate' in the RK3588 TRM V1.0.
+static void rockchip_pcie_disable_l1sub(struct dw_pcie *pci) +{
- u32 cap, l1subcap;
- cap = dw_pcie_find_ext_capability(pci, PCI_EXT_CAP_ID_L1SS);
- if (cap) {
l1subcap = dw_pcie_readl_dbi(pci, cap + PCI_L1SS_CAP);l1subcap &= ~(PCI_L1SS_CAP_L1_PM_SS | PCI_L1SS_CAP_ASPM_L1_1 |PCI_L1SS_CAP_ASPM_L1_2 | PCI_L1SS_CAP_PCIPM_L1_1 |PCI_L1SS_CAP_PCIPM_L1_2);I suspect this problem is specifically related to L1.2 and CLKREQ#, and L1.1 might work fine. If so, can we update this so we still advertise L1.1 support?
Hmm, looking again at the spec (PCIe r7.0, sec 5.5), it looks like CLKREQ# is required for both L1.1 and L1.2 (but not L1.0, the basic L1), so ignore my comment here.