The patch below does not apply to the 6.10-stable tree. If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to stable@vger.kernel.org.
To reproduce the conflict and resubmit, you may use the following commands:
git fetch https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/ linux-6.10.y git checkout FETCH_HEAD git cherry-pick -x f86b47bee6343c9f74630d7fc2fb8f5e41db0440 # <resolve conflicts, build, test, etc.> git commit -s git send-email --to 'stable@vger.kernel.org' --in-reply-to '2024081213-negative-spectacle-0446@gregkh' --subject-prefix 'PATCH 6.10.y' HEAD^..
Possible dependencies:
f86b47bee634 ("drm/amd/display: resync OTG after DIO FIFO resync")
thanks,
greg k-h
------------------ original commit in Linus's tree ------------------
From f86b47bee6343c9f74630d7fc2fb8f5e41db0440 Mon Sep 17 00:00:00 2001 From: TungYu Lu tungyu.lu@amd.com Date: Wed, 12 Jun 2024 22:34:33 +0800 Subject: [PATCH] drm/amd/display: resync OTG after DIO FIFO resync
[WHY] Tiled displays showed not aligned on 8K60hz when system resumed from S3/S4.
[HOW] Do dc_trigger_sync to re-sync pipes to ensure OTG become synced.
Reviewed-by: Alvin Lee alvin.lee2@amd.com Cc: Mario Limonciello mario.limonciello@amd.com Cc: Alex Deucher alexander.deucher@amd.com Cc: stable@vger.kernel.org Signed-off-by: Alex Hung alex.hung@amd.com Signed-off-by: TungYu Lu tungyu.lu@amd.com Tested-by: Daniel Wheeler daniel.wheeler@amd.com Signed-off-by: Alex Deucher alexander.deucher@amd.com
diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c index bdbb4a71651f..fe62478fbcde 100644 --- a/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c @@ -1254,6 +1254,8 @@ void dcn32_resync_fifo_dccg_dio(struct dce_hwseq *hws, struct dc *dc, struct dc_ pipe->stream_res.tg->funcs->enable_crtc(pipe->stream_res.tg); } } + + dc_trigger_sync(dc, dc->current_state); }
void dcn32_unblank_stream(struct pipe_ctx *pipe_ctx,