4.17-stable review patch. If anyone has any objections, please let me know.
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From: Geert Uytterhoeven geert+renesas@glider.be
commit ef4b0be62641d296cf4c0ad8f75ab83ab066ed51 upstream.
Printk format "%pCr" will be removed soon, as clk_get_rate() must not be called in atomic context.
Replace it by open-coding the operation. This is safe here, as the code runs in task context.
Link: http://lkml.kernel.org/r/1527845302-12159-2-git-send-email-geert+renesas@gli... To: Jia-Ju Bai baijiaju1990@gmail.com To: Jonathan Corbet corbet@lwn.net To: Michael Turquette mturquette@baylibre.com To: Stephen Boyd sboyd@kernel.org To: Zhang Rui rui.zhang@intel.com To: Eduardo Valentin edubezval@gmail.com To: Eric Anholt eric@anholt.net To: Stefan Wahren stefan.wahren@i2se.com To: Greg Kroah-Hartman gregkh@linuxfoundation.org Cc: Sergey Senozhatsky sergey.senozhatsky.work@gmail.com Cc: Petr Mladek pmladek@suse.com Cc: Linus Torvalds torvalds@linux-foundation.org Cc: Steven Rostedt rostedt@goodmis.org Cc: linux-doc@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: linux-pm@vger.kernel.org Cc: linux-serial@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-renesas-soc@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: Geert Uytterhoeven geert+renesas@glider.be Cc: stable@vger.kernel.org # 4.5+ Signed-off-by: Geert Uytterhoeven geert+renesas@glider.be Acked-by: Stephen Boyd sboyd@kernel.org Signed-off-by: Petr Mladek pmladek@suse.com Signed-off-by: Greg Kroah-Hartman gregkh@linuxfoundation.org
--- drivers/clk/renesas/renesas-cpg-mssr.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-)
--- a/drivers/clk/renesas/renesas-cpg-mssr.c +++ b/drivers/clk/renesas/renesas-cpg-mssr.c @@ -258,8 +258,9 @@ struct clk *cpg_mssr_clk_src_twocell_get dev_err(dev, "Cannot get %s clock %u: %ld", type, clkidx, PTR_ERR(clk)); else - dev_dbg(dev, "clock (%u, %u) is %pC at %pCr Hz\n", - clkspec->args[0], clkspec->args[1], clk, clk); + dev_dbg(dev, "clock (%u, %u) is %pC at %lu Hz\n", + clkspec->args[0], clkspec->args[1], clk, + clk_get_rate(clk)); return clk; }
@@ -326,7 +327,7 @@ static void __init cpg_mssr_register_cor if (IS_ERR_OR_NULL(clk)) goto fail;
- dev_dbg(dev, "Core clock %pC at %pCr Hz\n", clk, clk); + dev_dbg(dev, "Core clock %pC at %lu Hz\n", clk, clk_get_rate(clk)); priv->clks[id] = clk; return;
@@ -392,7 +393,7 @@ static void __init cpg_mssr_register_mod if (IS_ERR(clk)) goto fail;
- dev_dbg(dev, "Module clock %pC at %pCr Hz\n", clk, clk); + dev_dbg(dev, "Module clock %pC at %lu Hz\n", clk, clk_get_rate(clk)); priv->clks[id] = clk; priv->smstpcr_saved[clock->index / 32].mask |= BIT(clock->index % 32); return;