The patch below does not apply to the 5.15-stable tree. If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to stable@vger.kernel.org.
To reproduce the conflict and resubmit, you may use the following commands:
git fetch https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/ linux-5.15.y git checkout FETCH_HEAD git cherry-pick -x 87615e95f6f9ccd36d4a3905a2d87f91967ea9d2 # <resolve conflicts, build, test, etc.> git commit -s git send-email --to 'stable@vger.kernel.org' --in-reply-to '2023112452-retention-trout-639b@gregkh' --subject-prefix 'PATCH 5.15.y' HEAD^..
Possible dependencies:
87615e95f6f9 ("riscv: put interrupt entries into .irqentry.text") f0bddf50586d ("riscv: entry: Convert to generic entry") c3ec1e8964fb ("Merge patch series "RISC-V: Align the shadow stack"")
thanks,
greg k-h
------------------ original commit in Linus's tree ------------------
From 87615e95f6f9ccd36d4a3905a2d87f91967ea9d2 Mon Sep 17 00:00:00 2001 From: Nam Cao namcaov@gmail.com Date: Mon, 21 Aug 2023 16:57:09 +0200 Subject: [PATCH] riscv: put interrupt entries into .irqentry.text
The interrupt entries are expected to be in the .irqentry.text section. For example, for kprobes to work properly, exception code cannot be probed; this is ensured by blacklisting addresses in the .irqentry.text section.
Fixes: 7db91e57a0ac ("RISC-V: Task implementation") Signed-off-by: Nam Cao namcaov@gmail.com Link: https://lore.kernel.org/r/20230821145708.21270-1-namcaov@gmail.com Cc: stable@vger.kernel.org Signed-off-by: Palmer Dabbelt palmer@rivosinc.com
diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S index 143a2bb3e697..d7dd9030df3f 100644 --- a/arch/riscv/kernel/entry.S +++ b/arch/riscv/kernel/entry.S @@ -14,6 +14,8 @@ #include <asm/asm-offsets.h> #include <asm/errata_list.h>
+ .section .irqentry.text, "ax" + SYM_CODE_START(handle_exception) /* * If coming from userspace, preserve the user thread pointer and load