From: Balamanikandan Gunasundar balamanikandan.gunasundar@microchip.com
[ Upstream commit 94a1274100e397a27361ae53ace37be6da42a079 ]
Add pmecc instance id in peripheral clock description.
Signed-off-by: Balamanikandan Gunasundar balamanikandan.gunasundar@microchip.com Link: https://lore.kernel.org/r/20250909103817.49334-1-balamanikandan.gunasundar@m... [claudiu.beznea@tuxon.dev: use tabs instead of spaces] Signed-off-by: Claudiu Beznea claudiu.beznea@tuxon.dev Signed-off-by: Nicolas Ferre nicolas.ferre@microchip.com Signed-off-by: Sasha Levin sashal@kernel.org ---
LLM Generated explanations, may be completely bogus:
YES – the fix should go to stable.
- `drivers/clk/at91/sam9x7.c:411` now lists the PMC peripheral clock slot for the PMECC block (ID 48). This table drives the loop in `sam9x7_pmc_setup()` that registers every peripheral clock with the framework (`drivers/clk/at91/sam9x7.c:889-904`). Without the entry, no `clk_hw` is created for ID 48, so any DT request such as `clocks = <&pmc PMC_TYPE_PERIPHERAL 48>` fails at probe time with `-ENOENT`, leaving the PMECC clock gated. - On Microchip/Atmel SoCs, peripheral clocks power up disabled. The PMECC driver programs and polls the engine via MMIO (`drivers/mtd/nand/raw/atmel/pmecc.c:843-870`); if the clock stays off, register writes and the ready poll (`readl_relaxed_poll_timeout`) never complete, which causes ECC operations to time out and the NAND subsystem to fail. - The SAM9X7 DT already exposes the PMECC device (`arch/arm/boot/dts/microchip/sam9x7.dtsi:1132-1134`), so enabling NAND with ECC depends on the clock being reachable. The patch is a one-line data addition with no behavioural impact outside supplying the missing clock, making the backport low-risk and clearly bug-fixing for users relying on PMECC.
drivers/clk/at91/sam9x7.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/clk/at91/sam9x7.c b/drivers/clk/at91/sam9x7.c index 7322220418b45..89868a0aeaba9 100644 --- a/drivers/clk/at91/sam9x7.c +++ b/drivers/clk/at91/sam9x7.c @@ -408,6 +408,7 @@ static const struct { { .n = "pioD_clk", .id = 44, }, { .n = "tcb1_clk", .id = 45, }, { .n = "dbgu_clk", .id = 47, }, + { .n = "pmecc_clk", .id = 48, }, /* * mpddr_clk feeds DDR controller and is enabled by bootloader thus we * need to keep it enabled in case there is no Linux consumer for it.