3.16.79-rc1 review patch. If anyone has any objections, please let me know.
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From: Tiejun Chen tiejun.chen@intel.com
commit d143148383d0395539073dd6c2f25ddf6656bdcc upstream.
Just reuse rsvd_bits() inside kvm_set_mmio_spte_mask() for slightly better code.
Signed-off-by: Tiejun Chen tiejun.chen@intel.com Signed-off-by: Paolo Bonzini pbonzini@redhat.com [bwh: Backported to 3.16 as dependency of commit 16cfacc80857 "KVM: x86: Manually calculate reserved bits when loading PDPTRS"] Signed-off-by: Ben Hutchings ben@decadent.org.uk --- arch/x86/kvm/mmu.c | 5 ----- arch/x86/kvm/mmu.h | 5 +++++ arch/x86/kvm/x86.c | 2 +- 3 files changed, 6 insertions(+), 6 deletions(-)
--- a/arch/x86/kvm/mmu.c +++ b/arch/x86/kvm/mmu.c @@ -295,11 +295,6 @@ static bool check_mmio_spte(struct kvm * return likely(kvm_gen == spte_gen); }
-static inline u64 rsvd_bits(int s, int e) -{ - return ((1ULL << (e - s + 1)) - 1) << s; -} - void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, u64 dirty_mask, u64 nx_mask, u64 x_mask) { --- a/arch/x86/kvm/mmu.h +++ b/arch/x86/kvm/mmu.h @@ -56,6 +56,11 @@ #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT) #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT)
+static inline u64 rsvd_bits(int s, int e) +{ + return ((1ULL << (e - s + 1)) - 1) << s; +} + int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4]); void kvm_mmu_set_mmio_spte_mask(u64 mmio_mask);
--- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -5689,7 +5689,7 @@ static void kvm_set_mmio_spte_mask(void) * entry to generate page fault with PFER.RSV = 1. */ /* Mask the reserved physical address bits. */ - mask = ((1ull << (51 - maxphyaddr + 1)) - 1) << maxphyaddr; + mask = rsvd_bits(maxphyaddr, 51);
/* Bit 62 is always reserved for 32bit host. */ mask |= 0x3ull << 62;