On October 12, 2025 9:17:33 AM PDT, Borislav Petkov bp@alien8.de wrote:
On Sun, Oct 12, 2025 at 09:10:13AM -0700, H. Peter Anvin wrote:
Ok, that's just gas being stupid and overinterpreting the fuzzy language in the SDM, then. It would have been a very good thing to put in the commit or, even better, a comment.
The APM says:
"RDPID reads the value of TSC_AUX MSR used by the RDTSCP instruction into the specified destination register. Normal operand size prefixes do not apply and the update is either 32 bit or 64 bit based on the current mode."
so I interpret this as
dst_reg = MSR_TSC_AUX
which is a full u64 write. Not a sign-extended 32-bit thing.
Now if the machine does something else, I'm all ears. But we can verify that very easily...
MSR_TSC_AUX is a 32-bit register, so the two actions are *exactly identical*. This seems like a misunderstanding that has propagated through multiple texts, or perhaps someone thought it was more "future proof" this way.
I think the Intel documentation is even crazier and says "the low 32 bits of IA32_TSC_AUX"...