From: Samson Tam Samson.Tam@amd.com
[ Upstream commit c8d7e0be8183f4375a5cf5c3efd0c678129ea4de ]
[Why & How] Default should be 1 to disable EASF narrow filter sharpening.
Reviewed-by: Alvin Lee alvin.lee2@amd.com Signed-off-by: Samson Tam Samson.Tam@amd.com Signed-off-by: Ray Wu ray.wu@amd.com Tested-by: Daniel Wheeler daniel.wheeler@amd.com Signed-off-by: Alex Deucher alexander.deucher@amd.com Signed-off-by: Sasha Levin sashal@kernel.org ---
Now I have a complete picture. Based on my analysis, I can provide the final backporting recommendation: ## **BACKPORTING ANALYSIS: drm/amd/display: disable EASF narrow filter sharpening** ### **RECOMMENDATION: YES** ### **Analysis Summary:** **Commit Details:** - **Commit ID:** c8d7e0be8183f4375a5cf5c3efd0c678129ea4de - **Author:** Samson Tam Samson.Tam@amd.com - **Date:** Thu May 1 15:59:47 2025 -0400 - **Subject:** drm/amd/display: disable EASF narrow filter sharpening - **Files Changed:** `drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c` (2 lines) **Technical Changes:** The commit makes a simple but important change: - **Line 1302:** `easf_v_sharp_factor = 0` → `easf_v_sharp_factor = 1` - **Line 1466:** `easf_h_sharp_factor = 0` → `easf_h_sharp_factor = 1` **Why This Is A Bug Fix:** 1. **Intent vs Implementation Mismatch:** The commit message clearly states "Default should be 1 to disable EASF narrow filter sharpening" 2. **Hardware Behavior:** These sharp_factor variables control AMD display hardware's 2-tap sharp filtering: - Value 0001-Fix-Clippy-warnings.patch 0002-Enhance-inference-prompt-to-utilize- CVEKERNELDIR-whe.patch 0003-Update-to-latest-version-of-clap.patch drm_amd_display_vertical_interrupt_dcn32_dcn401_backport_analysis.md = sharpening **enabled** - Value 0001-Fix-Clippy-warnings.patch drm_amd_display_vertical_interrupt_dcn32_dcn401_backport_analysis.md gfx_v12_userq_eop_interrupt_handling_backport_analysis.md verisilicon_av1_4k_analysis.md = sharpening **disabled** 3. **Consistency Fix:** Prior to this fix, the code was unintentionally enabling sharpening when it should have been disabled by default **Stability and Risk Assessment:** - **LOW RISK:** Disables a feature rather than enabling new functionality - **IMPROVES STABILITY:** Prevents potential display artifacts from unwanted sharpening - **MINIMAL SCOPE:** Only affects EASF (Edge Adaptive Scaler Filter) narrow filter functionality - **WELL-TESTED:** Has proper review chain (Reviewed-by: Alvin Lee, Tested-by: Daniel Wheeler) **Backporting Criteria Analysis:** ✅ **Fixes Important Bug:** Corrects unintended feature activation that could cause display issues ✅ **Minimal Risk:** Simple value change, disables rather than enables functionality ✅ **No New Features:** Pure bug fix, no new architectural changes ✅ **Well- Contained:** Limited to AMD display driver's scaling/filtering subsystem ✅ **Stable Tree Appropriate:** Improves hardware behavior consistency **Comparison to Historical Similar Commits:** Looking at the provided historical commits that were marked "NO" for backporting: - Those were typically **feature additions** or **complex policy changes** - This commit is fundamentally different: it's a **simple bug fix** that corrects default behavior - Unlike feature commits, this **improves stability** by disabling problematic functionality **Conclusion:** This commit should be backported to stable kernels. It fixes a bug where EASF narrow filter sharpening was unintentionally enabled by default when AMD's design intent was to have it disabled. The fix is low-risk, well- tested, and improves display subsystem stability by preventing potential artifacts from unwanted sharpening algorithms. **Final Answer: YES** - This commit meets all criteria for stable kernel backporting.
drivers/gpu/drm/amd/display/dc/spl/dc_spl.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/spl/dc_spl.c b/drivers/gpu/drm/amd/display/dc/spl/dc_spl.c index 047f05ab01810..5fb6c4b7410bf 100644 --- a/drivers/gpu/drm/amd/display/dc/spl/dc_spl.c +++ b/drivers/gpu/drm/amd/display/dc/spl/dc_spl.c @@ -1292,7 +1292,7 @@ static void spl_set_easf_data(struct spl_scratch *spl_scratch, struct spl_out *s if (enable_easf_v) { dscl_prog_data->easf_v_en = true; dscl_prog_data->easf_v_ring = 0; - dscl_prog_data->easf_v_sharp_factor = 0; + dscl_prog_data->easf_v_sharp_factor = 1; dscl_prog_data->easf_v_bf1_en = 1; // 1-bit, BF1 calculation enable, 0=disable, 1=enable dscl_prog_data->easf_v_bf2_mode = 0xF; // 4-bit, BF2 calculation mode /* 2-bit, BF3 chroma mode correction calculation mode */ @@ -1456,7 +1456,7 @@ static void spl_set_easf_data(struct spl_scratch *spl_scratch, struct spl_out *s if (enable_easf_h) { dscl_prog_data->easf_h_en = true; dscl_prog_data->easf_h_ring = 0; - dscl_prog_data->easf_h_sharp_factor = 0; + dscl_prog_data->easf_h_sharp_factor = 1; dscl_prog_data->easf_h_bf1_en = 1; // 1-bit, BF1 calculation enable, 0=disable, 1=enable dscl_prog_data->easf_h_bf2_mode =