From: Alexandre Belloni alexandre.belloni@bootlin.com
commit dd7de4c0023e7564cabe39d64b2822a522890792 upstream.
The first received byte is the MSB, followed by the LSB so the value needs to be byte swapped.
Also, the ADC actually has a delay of one clock on the SPI bus. Read three bytes to get the last bit.
Fixes: 8dd2d7c0fed7 ("iio: adc: Add driver for the TI ADS8344 A/DC chips") Signed-off-by: Alexandre Belloni alexandre.belloni@bootlin.com Cc: Stable@vger.kernel.org Signed-off-by: Jonathan Cameron Jonathan.Cameron@huawei.com Signed-off-by: Greg Kroah-Hartman gregkh@linuxfoundation.org
--- drivers/iio/adc/ti-ads8344.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
--- a/drivers/iio/adc/ti-ads8344.c +++ b/drivers/iio/adc/ti-ads8344.c @@ -29,7 +29,7 @@ struct ads8344 { struct mutex lock;
u8 tx_buf ____cacheline_aligned; - u16 rx_buf; + u8 rx_buf[3]; };
#define ADS8344_VOLTAGE_CHANNEL(chan, si) \ @@ -89,11 +89,11 @@ static int ads8344_adc_conversion(struct
udelay(9);
- ret = spi_read(spi, &adc->rx_buf, 2); + ret = spi_read(spi, adc->rx_buf, sizeof(adc->rx_buf)); if (ret) return ret;
- return adc->rx_buf; + return adc->rx_buf[0] << 9 | adc->rx_buf[1] << 1 | adc->rx_buf[2] >> 7; }
static int ads8344_read_raw(struct iio_dev *iio,