13 May
2019
13 May
'19
11:30 a.m.
On Mon, May 13, 2019 at 09:11:38AM +0000, Nadav Amit wrote:
BTW: sometimes you don’t see the effect of these full TLB flushes as much in VMs. I encountered a strange phenomenon at the time - INVLPG for an arbitrary page cause my Haswell machine flush the entire TLB, when the INVLPG was issued inside a VM. It took me quite some time to analyze this problem. Eventually Intel told me that’s part of what is called “page fracturing” - if the host uses 4k pages in the EPT, they (usually) need to flush the entire TLB for any INVLPG. That’s happens since they don’t know the size of the flushed page.
Cute... if only they'd given us an interface to tell them... :-)