On Tue, Oct 29, 2019 at 09:09:40AM +0800, Chen-Yu Tsai wrote:
On Tue, Oct 29, 2019 at 5:49 AM Ondrej Jirman megous@megous.com wrote:
PRCM_PWROFF_GATING_REG has CPU0 at bit 4 on A83T. So without this patch, instead of gating the CPU0, the whole cluster was power gated, when shutting down first CPU in the cluster.
Fixes: 6961275e72a8c1 ("ARM: sun8i: smp: Add support for A83T") Signed-off-by: Ondrej Jirman megous@megous.com Cc: stable@vger.kernel.org
Acked-by: Chen-Yu Tsai wens@csie.org
Though I distinctly remember the BSP had some code dealing with chip revisions in which the two bits were reversed. :(
Actually, it's a bit more complicated. There's a special check in BSP code (grep for SUN8IW6P1_REV_A) that instead of power gating, just holds the core in reset for that revision.
regards, o.