On 8/27/2025 12:29 AM, Pincheng Wang wrote:
Add parsing for Zilsd and Zclsd ISA extensions which were ratified in commit f88abf1 ("Integrating load/store pair for RV32 with the main manual") of the riscv-isa-manual.
Signed-off-by: Pincheng Wang pincheng.plct@isrc.iscas.ac.cn
arch/riscv/include/asm/hwcap.h | 2 ++ arch/riscv/kernel/cpufeature.c | 24 ++++++++++++++++++++++++ 2 files changed, 26 insertions(+)
Reviewed-by: Nutty Liu nutty.liu@hotmail.com
Thanks.