From: Nicolin Chen nicolinc@nvidia.com Sent: Sunday, May 18, 2025 11:22 AM
+enum iommufd_viommu_flags {
- /*
* The HW does not go through an address translation table but
reads the
* physical address space directly: iommufd core should pin the
physical
* pages backing the queue memory that's allocated for the HW
QUEUE, and
* ensure those physical pages are contiguous in the physical space.
*/
- IOMMUFD_VIOMMU_FLAG_HW_QUEUE_READS_PA = 1 << 0,
+};
The queue itself doesn't read an address.
What about 'QUEUE_BASE_PA'?
Reviewed-by: Kevin Tian kevin.tian@intel.com