21 Oct
2025
21 Oct
'25
2:09 p.m.
On Thu, Oct 16, 2025 at 06:55:34AM +0000, Tian, Kevin wrote:
From: Jason Gunthorpe jgg@nvidia.com Sent: Wednesday, October 8, 2025 12:12 AM
This is used by x86 CPUs and can be used in AMD/VT-D x86 IOMMUs. When a x86 IOMMU is running SVA it is using this page table format.
SVA does use this format but mentioning it is a bit confusing here as the SVA page table is managed by mm.
This is used by x86 CPUs and can be used in AMD/VT-d x86 IOMMUs. When a x86 IOMMU is running SVA the MM will be using this format.
Thanks, Jason