Re: [PATCH v2 04/15] iommupt: Add the AMD IOMMU v1 page table format

On 2025/5/5 22:18, Jason Gunthorpe wrote:

AMD IOMMU v1 is unique in supporting contiguous pages with a variable size and it can decode the full 64 bit VA space. Unlike other x86 page tables this explicitly does not do sign extension as part of allowing the entire 64 bit VA space to be supported.

aha, do you mean the canonical requirement on the addresses when talking the singn extension? Actually, VT-d 2nd-stage page tables does not require it as well.

"canonical address (i.e., address bits 63:N have the same value as address bit [N-1], where N is 48 bits with 4-level paging and 57 bits with 5-level paging"