-----Original Message----- From: Nicolin Chen [mailto:nicolinc@nvidia.com] Sent: 09 February 2023 16:11 To: Shameerali Kolothum Thodi shameerali.kolothum.thodi@huawei.com Cc: Yi Liu yi.l.liu@intel.com; joro@8bytes.org; alex.williamson@redhat.com; jgg@nvidia.com; kevin.tian@intel.com; robin.murphy@arm.com; cohuck@redhat.com; eric.auger@redhat.com; kvm@vger.kernel.org; mjrosato@linux.ibm.com; chao.p.peng@linux.intel.com; yi.y.sun@linux.intel.com; peterx@redhat.com; jasowang@redhat.com; lulu@redhat.com; suravee.suthikulpanit@amd.com; iommu@lists.linux.dev; linux-kernel@vger.kernel.org; linux-kselftest@vger.kernel.org; baolu.lu@linux.intel.com; zhangfei.gao@linaro.org Subject: Re: [PATCH 00/17] Add Intel VT-d nested translation
Hi Shameer,
On Thu, Feb 09, 2023 at 10:11:42AM +0000, Shameerali Kolothum Thodi wrote:
This series first introduces new iommu op for allocating domains for iommufd, and op for syncing iotlb for first stage page table modifications, and then add the implementation of the new ops in intel-iommu driver. After this preparation, adds kernel-managed and user-managed hw_pagetable allocation for userspace. Last, add self-test for the new ioctls.
This series is based on "[PATCH 0/6] iommufd: Add iommu capability reporting"[1] and Nicolin's "[PATCH v2 00/10] Add IO page table replacement
support"[2].
Complete code can be found in[3]. Draft Qemu code can be found in[4].
Basic test done with DSA device on VT-d. Where the guest has a vIOMMU built with nested translation.
Thanks for sending this out. Will go through this one. As I informed before
we keep
an internal branch based on your work and rebase few patches to get the
ARM
SMMUv3 nesting support. The recent one is based on your
"iommufd-v6.2-rc4-nesting"
branch and is here,
https://github.com/hisilicon/kernel-dev/commits/iommufd-v6.2-rc4-nesting -arm
Just wondering any chance the latest "Add SMMUv3 nesting support"
series will
be send out soon? Please let me know if you need any help with that.
I had an initial discussion with Robin/Jason regarding the SMMUv3 nesting series, and I received quite a few inputs so I'd need to finish reworking before sending out -- hopefully we can see them in the maillist in the following weeks.
Thanks for that update. Sure, looking forward to it.
Shameer