Makefile.include has multiple uses. In addition to the setup of various variables based on "O=", for which it is used currently, it can also set up variables based on "LLVM=". Unfortunately using it for both at the same time would require a big ugly reshuffling of the nolibc Makefile. As we want to use its llvm handling in the future, reimplement its objtree := $(O).
While at it, also move "$(objtree) ?= $(srctree)" for consistency.
Signed-off-by: Thomas Weißschuh linux@weissschuh.net --- tools/testing/selftests/nolibc/Makefile | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/tools/testing/selftests/nolibc/Makefile b/tools/testing/selftests/nolibc/Makefile index 803a4e1bbe24..8000bc3c408b 100644 --- a/tools/testing/selftests/nolibc/Makefile +++ b/tools/testing/selftests/nolibc/Makefile @@ -5,7 +5,6 @@ ifeq ($(srctree),) srctree := $(patsubst %/tools/testing/selftests/,%,$(dir $(CURDIR))) endif
-include $(srctree)/tools/scripts/Makefile.include include $(srctree)/tools/scripts/utilities.mak # We need this for the "cc-option" macro. include $(srctree)/tools/build/Build.include @@ -14,6 +13,9 @@ ifneq ($(O),) ifneq ($(call is-absolute,$(O)),y) $(error Only absolute O= parameters are supported) endif +objtree := $(O) +else +objtree ?= $(srctree) endif
ifeq ($(ARCH),) @@ -21,8 +23,6 @@ include $(srctree)/scripts/subarch.include ARCH = $(SUBARCH) endif
-objtree ?= $(srctree) - # XARCH extends the kernel's ARCH with a few variants of the same # architecture that only differ by the configuration, the toolchain # and the Qemu program used. It is copied as-is into ARCH except for