Re: [PATCH v5 09/16] riscv: hwprobe: export Zca, Zcf, Zcd and Zcb ISA extensions

On Fri, May 17, 2024 at 04:52:49PM +0200, Clément Léger wrote:

Export Zca, Zcf, Zcd and Zcb ISA extension through hwprobe.

Signed-off-by: Clément Léger cleger@rivosinc.com

Documentation/arch/riscv/hwprobe.rst | 20 ++++++++++++++++++++ arch/riscv/include/uapi/asm/hwprobe.h | 4 ++++ arch/riscv/kernel/sys_hwprobe.c | 4 ++++ 3 files changed, 28 insertions(+)

diff --git a/Documentation/arch/riscv/hwprobe.rst b/Documentation/arch/riscv/hwprobe.rst index 48be38e0b788..cad84f51412d 100644 --- a/Documentation/arch/riscv/hwprobe.rst +++ b/Documentation/arch/riscv/hwprobe.rst @@ -196,6 +196,26 @@ The following keys are defined: supported as defined in the RISC-V ISA manual starting from commit 58220614a5f ("Zimop is ratified/1.0").

• • :c:macro:`RISCV_HWPROBE_EXT_ZCA`: The Zca extension part of Zc* standard

•   extensions for code size reduction, as ratified in commit 8be3419c1c0
  

•   ("Zcf doesn't exist on RV64 as it contains no instructions") of
  

•   riscv-code-size-reduction.
  

• • :c:macro:`RISCV_HWPROBE_EXT_ZCB`: The Zcb extension part of Zc* standard

•   extensions for code size reduction, as ratified in commit 8be3419c1c0
  

•   ("Zcf doesn't exist on RV64 as it contains no instructions") of
  

•   riscv-code-size-reduction.
  

• • :c:macro:`RISCV_HWPROBE_EXT_ZCD`: The Zcd extension part of Zc* standard

•   extensions for code size reduction, as ratified in commit 8be3419c1c0
  

•   ("Zcf doesn't exist on RV64 as it contains no instructions") of
  

•   riscv-code-size-reduction.
  

• • :c:macro:`RISCV_HWPROBE_EXT_ZCF`: The Zcf extension part of Zc* standard

•   extensions for code size reduction, as ratified in commit 8be3419c1c0
  

•   ("Zcf doesn't exist on RV64 as it contains no instructions") of
  

•   riscv-code-size-reduction.
  

• :c:macro:`RISCV_HWPROBE_KEY_CPUPERF_0`: A bitmask that contains performance information about the selected set of processors.

diff --git a/arch/riscv/include/uapi/asm/hwprobe.h b/arch/riscv/include/uapi/asm/hwprobe.h index 3b16a12204b1..652b2373729f 100644 --- a/arch/riscv/include/uapi/asm/hwprobe.h +++ b/arch/riscv/include/uapi/asm/hwprobe.h @@ -61,6 +61,10 @@ struct riscv_hwprobe { #define RISCV_HWPROBE_EXT_ZICOND (1ULL << 35) #define RISCV_HWPROBE_EXT_ZIHINTPAUSE (1ULL << 36) #define RISCV_HWPROBE_EXT_ZIMOP (1ULL << 37) +#define RISCV_HWPROBE_EXT_ZCA (1ULL << 38) +#define RISCV_HWPROBE_EXT_ZCB (1ULL << 39) +#define RISCV_HWPROBE_EXT_ZCD (1ULL << 40) +#define RISCV_HWPROBE_EXT_ZCF (1ULL << 41) #define RISCV_HWPROBE_KEY_CPUPERF_0 5 #define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0) #define RISCV_HWPROBE_MISALIGNED_EMULATED (1 << 0) diff --git a/arch/riscv/kernel/sys_hwprobe.c b/arch/riscv/kernel/sys_hwprobe.c index fc6f4238f0b3..11def345a42d 100644 --- a/arch/riscv/kernel/sys_hwprobe.c +++ b/arch/riscv/kernel/sys_hwprobe.c @@ -113,6 +113,8 @@ static void hwprobe_isa_ext0(struct riscv_hwprobe *pair, EXT_KEY(ZICOND); EXT_KEY(ZIHINTPAUSE); EXT_KEY(ZIMOP);

• EXT_KEY(ZCA);
  

• EXT_KEY(ZCB);
  

if (has_vector()) { EXT_KEY(ZVBB); @@ -133,6 +135,8 @@ static void hwprobe_isa_ext0(struct riscv_hwprobe *pair, EXT_KEY(ZFH); EXT_KEY(ZFHMIN); EXT_KEY(ZFA);

• 	EXT_KEY(ZCD);
  

• 	EXT_KEY(ZCF);
  

  }

#undef EXT_KEY } -- 2.43.0

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Reviewed-by: Charlie Jenkins charlie@rivosinc.com