24 Apr
2025
24 Apr
'25
8:21 a.m.
From: Nicolin Chen nicolinc@nvidia.com Sent: Friday, April 11, 2025 2:38 PM
[...]
This is a big improvement since there is no VM Exit during an invalidation, compared to the traditional invalidation pathway by trapping a guest-own invalidation queue and forwarding those commands/requests to the host kernel that will eventually fill a HW-owned queue to execute those commands.
any data to show how big the improvements could be in major IOMMU usages (kernel dma, user dma and sva)?