Since we already import the generated sysreg definitions from the main kernel and reference them in processor.h for use in other KVM tests we can also make use of them for get-reg-list as well instead of having hard coded magic numbers in the program. Do this for the table defining which registers should be gated on ID register values, using a macro which allows us to specify the register and ID register field in a much more compact and direct fashion.
In the process we fix the ID register checked for S1PIE specific registers which was using an incorrect shift of 4, checking SCTLRX support instead. No other change is seen in the generated data.
Fixes: 5f0419a0083b ("KVM: selftests: get-reg-list: add Permission Indirection registers") Signed-off-by: Mark Brown broonie@kernel.org --- tools/testing/selftests/kvm/aarch64/get-reg-list.c | 29 ++++++++-------------- 1 file changed, 11 insertions(+), 18 deletions(-)
diff --git a/tools/testing/selftests/kvm/aarch64/get-reg-list.c b/tools/testing/selftests/kvm/aarch64/get-reg-list.c index 709d7d721760..97ac3f6b5c4b 100644 --- a/tools/testing/selftests/kvm/aarch64/get-reg-list.c +++ b/tools/testing/selftests/kvm/aarch64/get-reg-list.c @@ -22,25 +22,18 @@ struct feature_id_reg { __u64 feat_min; };
-static struct feature_id_reg feat_id_regs[] = { - { - ARM64_SYS_REG(3, 0, 2, 0, 3), /* TCR2_EL1 */ - ARM64_SYS_REG(3, 0, 0, 7, 3), /* ID_AA64MMFR3_EL1 */ - 0, - 1 - }, - { - ARM64_SYS_REG(3, 0, 10, 2, 2), /* PIRE0_EL1 */ - ARM64_SYS_REG(3, 0, 0, 7, 3), /* ID_AA64MMFR3_EL1 */ - 4, - 1 - }, - { - ARM64_SYS_REG(3, 0, 10, 2, 3), /* PIR_EL1 */ - ARM64_SYS_REG(3, 0, 0, 7, 3), /* ID_AA64MMFR3_EL1 */ - 4, - 1 +#define FEAT_ID_CHECK(xreg, xid_reg, id_field, id_val) \ + { \ + .reg = KVM_ARM64_SYS_REG(SYS_##xreg), \ + .id_reg = KVM_ARM64_SYS_REG(SYS_##xid_reg), \ + .feat_shift = xid_reg##_##id_field##_SHIFT, \ + .feat_min = xid_reg##_##id_field##_##id_val, \ } + +static struct feature_id_reg feat_id_regs[] = { + FEAT_ID_CHECK(TCR2_EL1, ID_AA64MMFR3_EL1, TCRX, IMP), + FEAT_ID_CHECK(PIRE0_EL1, ID_AA64MMFR3_EL1, S1PIE, IMP), + FEAT_ID_CHECK(PIR_EL1, ID_AA64MMFR3_EL1, S1PIE, IMP), };
bool filter_reg(__u64 reg)