Re: [PATCH v4 3/3] RISC-V: selftests: Add TEST_ZICBOM into CBO tests

On Tue, Jan 14, 2025 at 10:19:36AM +0800, Yunhui Cui wrote:

Add test for Zicbom and its block size into CBO tests, when Zicbom is present, test that cbo.clean/flush may be issued and works. As the software can't verify the clean/flush functions, we just judged that cbo.clean/flush isn't executed illegally.

Signed-off-by: Yunhui Cui cuiyunhui@bytedance.com

tools/testing/selftests/riscv/hwprobe/cbo.c | 66 +++++++++++++++++---- 1 file changed, 55 insertions(+), 11 deletions(-)

diff --git a/tools/testing/selftests/riscv/hwprobe/cbo.c b/tools/testing/selftests/riscv/hwprobe/cbo.c index a40541bb7c7d..dec510291ab8 100644 --- a/tools/testing/selftests/riscv/hwprobe/cbo.c +++ b/tools/testing/selftests/riscv/hwprobe/cbo.c @@ -50,6 +50,14 @@ static void cbo_clean(char *base) { cbo_insn(base, 1); } static void cbo_flush(char *base) { cbo_insn(base, 2); } static void cbo_zero(char *base) { cbo_insn(base, 4); } +static void test_no_cbo_inval(void *arg) +{

• ksft_print_msg("Testing cbo.inval instruction remain privileged\n");
• illegal_insn = false;
• cbo_inval(&mem[0]);
• ksft_test_result(illegal_insn, "No cbo.inval\n");

+}

static void test_no_zicbom(void *arg) { ksft_print_msg("Testing Zicbom instructions remain privileged\n"); @@ -61,10 +69,6 @@ static void test_no_zicbom(void *arg) illegal_insn = false; cbo_flush(&mem[0]); ksft_test_result(illegal_insn, "No cbo.flush\n");

• illegal_insn = false;
• cbo_inval(&mem[0]);
• ksft_test_result(illegal_insn, "No cbo.inval\n");

} static void test_no_zicboz(void *arg) @@ -81,6 +85,30 @@ static bool is_power_of_2(__u64 n) return n != 0 && (n & (n - 1)) == 0; } +static void test_zicbom(void *arg) +{

• struct riscv_hwprobe pair = {

• .key = RISCV_HWPROBE_KEY_ZICBOM_BLOCK_SIZE,
  

• };
• cpu_set_t *cpus = (cpu_set_t *)arg;
• __u64 block_size;
• long rc;
• rc = riscv_hwprobe(&pair, 1, sizeof(cpu_set_t), (unsigned long *)cpus, 0);
• block_size = pair.value;
• ksft_test_result(rc == 0 && pair.key == RISCV_HWPROBE_KEY_ZICBOM_BLOCK_SIZE &&

• 	 is_power_of_2(block_size), "Zicbom block size\n");
  

• ksft_print_msg("Zicbom block size: %llu\n", block_size);
• illegal_insn = false;
• cbo_clean(&mem[block_size]);
• ksft_test_result(!illegal_insn, "cbo.clean\n");
• illegal_insn = false;
• cbo_flush(&mem[block_size]);
• ksft_test_result(!illegal_insn, "cbo.flush\n");

+}

static void test_zicboz(void *arg) { struct riscv_hwprobe pair = { @@ -129,7 +157,7 @@ static void test_zicboz(void *arg) ksft_test_result_pass("cbo.zero check\n"); } -static void check_no_zicboz_cpus(cpu_set_t *cpus) +static void check_no_zicbo_cpus(cpu_set_t *cpus, __u64 cbo) { struct riscv_hwprobe pair = { .key = RISCV_HWPROBE_KEY_IMA_EXT_0, @@ -137,6 +165,7 @@ static void check_no_zicboz_cpus(cpu_set_t *cpus) cpu_set_t one_cpu; int i = 0, c = 0; long rc;

• char *cbostr;

while (i++ < CPU_COUNT(cpus)) { while (!CPU_ISSET(c, cpus)) @@ -148,10 +177,13 @@ static void check_no_zicboz_cpus(cpu_set_t *cpus) rc = riscv_hwprobe(&pair, 1, sizeof(cpu_set_t), (unsigned long *)&one_cpu, 0); assert(rc == 0 && pair.key == RISCV_HWPROBE_KEY_IMA_EXT_0);

• if (pair.value & RISCV_HWPROBE_EXT_ZICBOZ)
  

• 	ksft_exit_fail_msg("Zicboz is only present on a subset of harts.\n"
  

• 			   "Use taskset to select a set of harts where Zicboz\n"
  

• 			   "presence (present or not) is consistent for each hart\n");
  

• cbostr = cbo == RISCV_HWPROBE_EXT_ZICBOZ ? "Zicboz" : "Zicbom";
  

• if (pair.value & cbo)
  

• 	ksft_exit_fail_msg("%s is only present on a subset of harts.\n"
  

• 			   "Use taskset to select a set of harts where %s\n"
  

• 			   "presence (present or not) is consistent for each hart\n",
  

• 			   cbostr, cbostr);
  

  ++c; }

} @@ -159,7 +191,9 @@ static void check_no_zicboz_cpus(cpu_set_t *cpus) enum { TEST_ZICBOZ, TEST_NO_ZICBOZ,

• TEST_ZICBOM, TEST_NO_ZICBOM,
• TEST_NO_ZICBOINVAL,

nit: TEST_NO_CBO_INVAL would be a better name.

}; static struct test_info { @@ -169,7 +203,9 @@ static struct test_info { } tests[] = { [TEST_ZICBOZ] = { .nr_tests = 3, test_zicboz }, [TEST_NO_ZICBOZ] = { .nr_tests = 1, test_no_zicboz },

• [TEST_NO_ZICBOM] = { .nr_tests = 3, test_no_zicbom },

• [TEST_ZICBOM] = { .nr_tests = 3, test_zicbom },
• [TEST_NO_ZICBOM] = { .nr_tests = 2, test_no_zicbom },
• [TEST_NO_ZICBOINVAL] = { .nr_tests = 1, test_no_cbo_inval },

}; int main(int argc, char **argv) @@ -189,6 +225,7 @@ int main(int argc, char **argv) assert(rc == 0); tests[TEST_NO_ZICBOZ].enabled = true; tests[TEST_NO_ZICBOM].enabled = true;

• tests[TEST_NO_ZICBOINVAL].enabled = true;
  

  }

rc = sched_getaffinity(0, sizeof(cpu_set_t), &cpus); @@ -206,7 +243,14 @@ int main(int argc, char **argv) tests[TEST_ZICBOZ].enabled = true; tests[TEST_NO_ZICBOZ].enabled = false; } else {

• check_no_zicboz_cpus(&cpus);
  

• check_no_zicbo_cpus(&cpus, RISCV_HWPROBE_EXT_ZICBOZ);
  

• }
• if (pair.value & RISCV_HWPROBE_EXT_ZICBOM) {

• tests[TEST_ZICBOM].enabled = true;
  

• tests[TEST_NO_ZICBOM].enabled = false;
  

• } else {

• check_no_zicbo_cpus(&cpus, RISCV_HWPROBE_EXT_ZICBOM);
  

  }

for (i = 0; i < ARRAY_SIZE(tests); ++i) -- 2.39.2

Besides the nit,

Reviewed-by: Andrew Jones ajones@ventanamicro.com