On Sat, Sep 02, 2023 at 08:59:27PM +0800, Haibo Xu wrote:
Add the infrastructure for guest exception handling in riscv selftests. Customized handlers can be enabled by vm_install_exception_handler(vector) or vm_install_interrupt_handler().
The code is inspired from that of x86/arm64.
Signed-off-by: Haibo Xu haibo1.xu@intel.com
tools/testing/selftests/kvm/Makefile | 1 + .../selftests/kvm/include/riscv/processor.h | 43 ++++++++ .../selftests/kvm/lib/riscv/handlers.S | 101 ++++++++++++++++++ .../selftests/kvm/lib/riscv/processor.c | 69 ++++++++++++ 4 files changed, 214 insertions(+) create mode 100644 tools/testing/selftests/kvm/lib/riscv/handlers.S
Reviewed-by: Andrew Jones ajones@ventanamicro.com