Hi Christophe,
I'm working to improve SIMD cost model for ARM Neon on Linaro gcc. I have discussed this topic with Renato. Also, he is working to develop a similar cost model for ARM neon on LLVM. He strongly recommends to me that you are an expert on this topic.
So would you please spare some time to share your experience with me ?
Thanks a lot.
Best regards Tao Wang
-----Original Messages----- From:"Renato Golin" renato.golin@linaro.org Sent Time:Wednesday, January 9, 2013 To:"王韬" wangtao2010@ict.ac.cn Cc:"Linaro Toolchain" linaro-toolchain@lists.linaro.org Subject:Re: > Re: Instruction costs for ARM/NEON
Hi Tao,
Yes, we should definitely talk! Maybe via Hangout.
cheers, --renato
On 9 January 2013 14:59, 王韬 wangtao2010@ict.ac.cnwrote:
Hi, Renato
I'm also working on simd cost model for arm neon on Gcc. I would like to discuss this topic with you thoroughly.
If you think it's a good idea, please send me an email.
Best regards Tao Wang ICT, CAS
-----Original Messages----- From:"Renato Golin" renato.golin@linaro.org Sent Time:Wednesday, January 9, 2013 To:"Linaro Toolchain" linaro-toolchain@lists.linaro.org Cc: Subject:Re: Instruction costs for ARM/NEON
Nevermind, I found exactly what I was looking for in Infocenter:
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0409i/DDI0409I_cortex_a9...
cheers, --renato
On 9 January 2013 13:35, Renato Golin renato.golin@linaro.orgwrote:
Hi all,
I'm helping the loop vectorization in LLVM and for that we need first to build the instruction cost model so we can decide whether the vectorization is worth or not.
I was looking at some papers, but most of them concern with energy consumption, which is not the issue (at least not for now). The "cost" model should take the point of view of latency, stalls and pipeline cost.
I know there are sporadic comments on this on the ARM ARM, but would be good to have a definite resource where to get the data from (and hope it's a public document). Does anyone know of a good place to start looking for that?
Even if the document is private, we can certainly hide the information enough to make it to the LLVM code base.
cheers, --renato