Janne Grunau j@jannau.net writes:
Hi,
On 2014-02-17 13:40:00 +0000, Alex Bennée wrote:
<snip>
In my tree the remaining insns that the GCC aarch64 tests need to implement are: FRECPE FRECPX CLS (2 misc variant) CLZ (2 misc variant) FSQRT
My GitHub tree now has fixes for the above as well as all pending A64 pull requests. The commits are:
34bbde5 * target-arm: A64: add remaining CLS/Z vector ops 96d890c * target-arm: A64: add FSQRT to C3.6.17 (two misc) 997e712 * target-arm: A64: fix bug in add_sub_ext an handling rn c37ba93 * target-arm: A64: Add last AdvSIMD Integer to FP ops 1e35ff3 * target-arm: A64: Implement AdvSIMD reciprocal ops 46ec7d9 * peter/a64-working target-arm: A64: Implement PMULL instruction
FRINTZ FCVTZSWhich I'm currently working though now. However for most build tasks I expect the instructions in master [1] will be enough.
Qemu master is enough to pass the tests with libav built with gcc 4.8.2, clang 3.3 and 3.4 (clang 3.4 build only with -O1, it fails otherwise).
Feedback I'm interested in
- Any instruction failure (please include the log line with the unsupported message)
Neon support is not complete enough to run the hand written neon assembler optimizations in libav. Currently failing on narrowing shifts.
<snip>
Have you got the log file "unsupported" line? I seem to recall you did ping me but maybe it was just on IRC? I just want to make sure I do the right ones. I'm working on this now.
Cheers,
-- Alex Bennée QEMU/KVM Hacker for Linaro