Yvan,
LDAR is intended for an atomic load acquire. See
http://gcc.gnu.org/ml/gcc-patches/2012-11/msg01397.html
for compiler support upstream.
regards, Ramana
-----Original Message----- From: linaro-toolchain-bounces@lists.linaro.org [mailto:linaro- toolchain-bounces@lists.linaro.org] On Behalf Of Yvan Roux Sent: 29 November 2012 09:19 To: linaro-toolchain@lists.linaro.org; Linaro Private ARMv8 Subject: ARMv8 load acquire / store release question
Hi,
I'm working on the libatomic-ops (part of the Boehm gc) AArch64 support, I mainly use GCC's __atomic builtins to do this, but in our 4.7 version they don't use the load acquire / store release instructions now available in the ARMv8 ISA. These instructions are used in the mainline GCC (in atomic.md) but not in their exclusive form, I understand that it should be due to the performance penalty, but I want your feeling on that point as I don't find the ARMv8 ISA really clear.
If we want to implement an atomic load acquire, is
LDAR x1, [x0]
sufficient, or do we have to write it like that :
L: LDAXR x0, [x3] STEX x1, x0, [x3] CBZ x0, L1
Thanks Yvan
linaro-toolchain mailing list linaro-toolchain@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-toolchain