== Progress == * TCWG-413 (8/10) sha1 performance - Looked at IRA dumps and aarch64 target hooks. - GCC now uses FP registers as register class and this results in lots of fmovs for the test-case. - Discussed in list and tried spill_class hook for aarch64. This helps sha1. - Regression tested the change. - Ran Spec2000 with the changes and 168.wupwise, 187.facerec are failing. - Investigation continues.
* TCWG-468 (1/10) - Continuing with benchmarking.
* Set-up NX and started using it (1/10)
== Plan == * Benchmarking. * Upstream zero/sign extension elimination activities. * sha1 performance.