* Backports (7/10) - Local backports completed - 218531 - Fix ICE at -O0 on vld1_lane intrinsics - 218532 - Fix ICE on non-constant indices to __builtin_aarch64_im_lane_boundsi - 218536 - Remove be_checked_get_lane, check bounds with __builtin_aarch64_im_lane_boundsi
- Backports in validation - 219724 - Add a new scheduling description for the ARM Cortex-A57 processor - 219746 - Fix broken 219724 - 220103 - A57 pipeline model
- Backports commited to SVN for April release - 219656 - Update APM/XGene-1 costs - 219657 - xgene1 machine description refactoring - 219659 - Updated copyright year for 'xgene1.md'. - 219661 - Update APM/XGene-1 description - 219679 - Fix xgene_tune initialization - 218145 - Add Cortex-A17 support - 218146 - Add -mcpu=cortex-a17.cortex-a7 - 219472 - Use Cortex-A17 tuning parameters for Cortex-A12
* Investigate generating out-of-line branch tables in ARM GCC (TCWG 110) (2/10)
* Misc (1/10) - Conference calls
== Next week ==
- Commit a57 backport to SVN - Continue TCWG 110 investigation