Andrew Stubbs wrote:
- Instruction set coverage.
- Are there any ARM/Thumb2 instructions that we are not taking
advantage of? [2] - Do we test that we use the instructions we do have? [3]
There is no general frame work to test instruction set coverage. The only way to find out, really, is to create some test cases where you expect the compiler to produce a certain insn.
Is there a list of all ARM/Thumb2 instructions and the ones implemented in the GCC ARM machine descriptions?
- Constant pools
- it might be a very handy space optimization to have small
functions share one constant pool, but the way the passes work one function at a time makes this hard. (LP:625233)
There are also passes working on the entire program, or a partition. Isn't it more a question of how to group and process functions that are candidates for sharing a constant pool with a neighbor?
Are there algorithms for this kind of pool sharing in the academic or ARM-specific literature?
Other suggestions for the discussion:
* Better use of conditional execution. - No idea how much this really helps for ARM, but there are bug reports about missed opportunities from time to time, so... - How to model conditional execution before register allocation? - How exploit opportunities better in GCC (ifcvt is inadequate and too late in the pipeline). - Also look at LLVM here, it appears to have a better cost model for if-conversion than GCC (taking into account a target-dependent branch misprediction penalty, for example).
* Basic block re-ordering for speed/size. - The existing basic block reordering pass in GCC implements only a reordering strategy for speed. - The pass does not run at all for functions optimized for size.
* Comparing ARM cost models and param settings to x86_64 - Compare, for some set of functions/benchmarks, the results of estimate_num_insns, estimate_operator_cost, and estimate_move_cost, between ARM and x86_64. Rationalize or fix any significant differences. See whether heuristics based on these functions require tuning for ARM. - Go through params.def and see if there are further ARM tuning opportunities. There are more than 100 DEFPARAMs and many of them guide heuristics but have only been tuned on x86_64. (There is set_default_param_value, but most backends do not change the defaults.)
Hoping this is helpful,
Ciao! Steven