[TCWG CI] 464.h264ref slowed down by 6% after llvm: [unroll] Keep unrolled iterations with initial iteration
by ci_notify＠linaro.org
After llvm commit de2fed61528a5584dc54c47f6754408597be24de
Author: Philip Reames <listmail(a)philipreames.com>
[unroll] Keep unrolled iterations with initial iteration
the following benchmarks slowed down by more than 2%:
- 464.h264ref slowed down by 6% from 10902 to 11518 perf samples
- 464.h264ref:[.] FastFullPelBlockMotionSearch slowed down by 43% from 1494 to 2141 perf samples
Below reproducer instructions can be used to re-build both "first_bad" and "last_good" cross-toolchains used in this bisection. Naturally, the scripts will fail when triggerring benchmarking jobs if you don't have access to Linaro TCWG CI.
For your convenience, we have uploaded tarballs with pre-processed source and assembly files at:
- First_bad save-temps: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-…
- Last_good save-temps: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-…
- Baseline save-temps: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-…
Configuration:
- Benchmark: SPEC CPU2006
- Toolchain: Clang + Glibc + LLVM Linker
- Version: all components were built from their tip of trunk
- Target: aarch64-linux-gnu
- Compiler flags: -O3
- Hardware: NVidia TX1 4x Cortex-A57
This benchmarking CI is work-in-progress, and we welcome feedback and suggestions at linaro-toolchain(a)lists.linaro.org . In our improvement plans is to add support for SPEC CPU2017 benchmarks and provide "perf report/annotate" data behind these reports.
THIS IS THE END OF INTERESTING STUFF. BELOW ARE LINKS TO BUILDS, REPRODUCTION INSTRUCTIONS, AND THE RAW COMMIT.
This commit has regressed these CI configurations:
- tcwg_bmk_llvm_tx1/llvm-master-aarch64-spec2k6-O3
First_bad build: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-…
Last_good build: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-…
Baseline build: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-…
Even more details: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-…
Reproduce builds:
<cut>
mkdir investigate-llvm-de2fed61528a5584dc54c47f6754408597be24de
cd investigate-llvm-de2fed61528a5584dc54c47f6754408597be24de
# Fetch scripts
git clone https://git.linaro.org/toolchain/jenkins-scripts
# Fetch manifests and test.sh script
mkdir -p artifacts/manifests
curl -o artifacts/manifests/build-baseline.sh https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-… --fail
curl -o artifacts/manifests/build-parameters.sh https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-… --fail
curl -o artifacts/test.sh https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-… --fail
chmod +x artifacts/test.sh
# Reproduce the baseline build (build all pre-requisites)
./jenkins-scripts/tcwg_bmk-build.sh @@ artifacts/manifests/build-baseline.sh
# Save baseline build state (which is then restored in artifacts/test.sh)
mkdir -p ./bisect
rsync -a --del --delete-excluded --exclude /bisect/ --exclude /artifacts/ --exclude /llvm/ ./ ./bisect/baseline/
cd llvm
# Reproduce first_bad build
git checkout --detach de2fed61528a5584dc54c47f6754408597be24de
../artifacts/test.sh
# Reproduce last_good build
git checkout --detach da25f968a90ad4560fc920a6d18fc2a0221d2750
../artifacts/test.sh
cd ..
</cut>
Full commit (up to 1000 lines):
<cut>
commit de2fed61528a5584dc54c47f6754408597be24de
Author: Philip Reames <listmail(a)philipreames.com>
Date: Fri Nov 12 11:35:28 2021 -0800
[unroll] Keep unrolled iterations with initial iteration
The unrolling code was previously inserting new cloned blocks at the end of the function. The result of this with typical loop structures is that the new iterations are placed far from the initial iteration.
With unrolling, the general assumption is that the a) the loop is reasonable hot, and b) the first Count-1 copies of the loop are rarely (if ever) loop exiting. As such, placing Count-1 copies out of line is a fairly poor code placement choice. We'd much rather fall through into the hot (non-exiting) path. For code with branch profiles, later layout would fix this, but this may have a positive impact on non-PGO compiled code.
However, the real motivation for this change isn't performance. Its readability and human understanding. Having to jump around long distances in an IR file to trace an unrolled loop structure is error prone and tedious.
---
llvm/lib/Transforms/Utils/LoopUnroll.cpp | 6 +-
llvm/test/DebugInfo/unrolled-loop-remainder.ll | 86 +-
.../Transforms/LoopUnroll/2011-08-08-PhiUpdate.ll | 66 +-
.../Transforms/LoopUnroll/2011-08-09-PhiUpdate.ll | 24 +-
.../LoopUnroll/AArch64/runtime-unroll-generic.ll | 4 +-
.../LoopUnroll/AArch64/thresholdO3-cost-model.ll | 8 +-
.../LoopUnroll/AArch64/unroll-upperbound.ll | 4 +-
.../Transforms/LoopUnroll/ARM/loop-unrolling.ll | 4 +-
.../test/Transforms/LoopUnroll/ARM/multi-blocks.ll | 230 +-
llvm/test/Transforms/LoopUnroll/ARM/upperbound.ll | 10 +-
.../LoopUnroll/full-unroll-keep-first-exit.ll | 16 +-
.../full-unroll-one-unpredictable-exit.ll | 16 +-
llvm/test/Transforms/LoopUnroll/multiple-exits.ll | 8 +-
llvm/test/Transforms/LoopUnroll/nonlatchcondbr.ll | 20 +-
.../LoopUnroll/partial-unroll-non-latch-exit.ll | 14 +-
.../partially-unroll-unconditional-latch.ll | 4 +-
.../LoopUnroll/runtime-loop-at-most-two-exits.ll | 120 +-
.../runtime-loop-multiexit-dom-verify.ll | 206 +-
.../LoopUnroll/runtime-loop-multiple-exits.ll | 2560 ++++++++++----------
llvm/test/Transforms/LoopUnroll/runtime-loop5.ll | 34 +-
.../LoopUnroll/runtime-multiexit-heuristic.ll | 122 +-
.../LoopUnroll/runtime-small-upperbound.ll | 8 +-
.../LoopUnroll/runtime-unroll-remainder.ll | 62 +-
llvm/test/Transforms/LoopUnroll/scevunroll.ll | 48 +-
.../Transforms/LoopUnroll/shifted-tripcount.ll | 4 +-
...er-exiting-with-phis-multiple-exiting-blocks.ll | 20 +-
.../LoopUnroll/unroll-unconditional-latch.ll | 12 +-
.../Transforms/LoopUnrollAndJam/unroll-and-jam.ll | 68 +-
.../PhaseOrdering/AArch64/matrix-extract-insert.ll | 4 +-
29 files changed, 1896 insertions(+), 1892 deletions(-)
diff --git a/llvm/lib/Transforms/Utils/LoopUnroll.cpp b/llvm/lib/Transforms/Utils/LoopUnroll.cpp
index ce463927fd50..b0c622b98d5e 100644
--- a/llvm/lib/Transforms/Utils/LoopUnroll.cpp
+++ b/llvm/lib/Transforms/Utils/LoopUnroll.cpp
@@ -514,6 +514,10 @@ LoopUnrollResult llvm::UnrollLoop(Loop *L, UnrollLoopOptions ULO, LoopInfo *LI,
SmallVector<MDNode *, 6> LoopLocalNoAliasDeclScopes;
identifyNoAliasScopesToClone(L->getBlocks(), LoopLocalNoAliasDeclScopes);
+ // We place the unrolled iterations immediately after the original loop
+ // latch. This is a reasonable default placement if we don't have block
+ // frequencies, and if we do, well the layout will be adjusted later.
+ auto BlockInsertPt = std::next(LatchBlock->getIterator());
for (unsigned It = 1; It != ULO.Count; ++It) {
SmallVector<BasicBlock *, 8> NewBlocks;
SmallDenseMap<const Loop *, Loop *, 4> NewLoops;
@@ -522,7 +526,7 @@ LoopUnrollResult llvm::UnrollLoop(Loop *L, UnrollLoopOptions ULO, LoopInfo *LI,
for (LoopBlocksDFS::RPOIterator BB = BlockBegin; BB != BlockEnd; ++BB) {
ValueToValueMapTy VMap;
BasicBlock *New = CloneBasicBlock(*BB, VMap, "." + Twine(It));
- Header->getParent()->getBasicBlockList().push_back(New);
+ Header->getParent()->getBasicBlockList().insert(BlockInsertPt, New);
assert((*BB != Header || LI->getLoopFor(*BB) == L) &&
"Header should not be in a sub-loop");
diff --git a/llvm/test/DebugInfo/unrolled-loop-remainder.ll b/llvm/test/DebugInfo/unrolled-loop-remainder.ll
index 83c30dec780d..ba4ce1f409f6 100644
--- a/llvm/test/DebugInfo/unrolled-loop-remainder.ll
+++ b/llvm/test/DebugInfo/unrolled-loop-remainder.ll
@@ -38,71 +38,71 @@ define i32 @func_c() local_unnamed_addr #0 !dbg !14 {
; CHECK-NEXT: [[PROL_ITER_SUB:%.*]] = sub i32 [[XTRAITER]], 1, !dbg [[DBG24]]
; CHECK-NEXT: [[PROL_ITER_CMP:%.*]] = icmp ne i32 [[PROL_ITER_SUB]], 0, !dbg [[DBG24]]
; CHECK-NEXT: br i1 [[PROL_ITER_CMP]], label [[FOR_BODY_PROL_1:%.*]], label [[FOR_BODY_PROL_LOOPEXIT_UNR_LCSSA:%.*]], !dbg [[DBG24]]
+; CHECK: for.body.prol.1:
+; CHECK-NEXT: [[ARRAYIDX_PROL_1:%.*]] = getelementptr inbounds i32, i32* [[TMP6]], i64 1, !dbg [[DBG28]]
+; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[ARRAYIDX_PROL_1]], align 4, !dbg [[DBG28]], !tbaa [[TBAA20]]
+; CHECK-NEXT: [[CONV_PROL_1:%.*]] = sext i32 [[TMP7]] to i64, !dbg [[DBG28]]
+; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i64 [[CONV_PROL_1]] to i32*, !dbg [[DBG28]]
+; CHECK-NEXT: [[ADD_PROL_1:%.*]] = add nsw i32 [[ADD_PROL]], 2, !dbg [[DBG29]]
+; CHECK-NEXT: [[PROL_ITER_SUB_1:%.*]] = sub i32 [[PROL_ITER_SUB]], 1, !dbg [[DBG24]]
+; CHECK-NEXT: [[PROL_ITER_CMP_1:%.*]] = icmp ne i32 [[PROL_ITER_SUB_1]], 0, !dbg [[DBG24]]
+; CHECK-NEXT: br i1 [[PROL_ITER_CMP_1]], label [[FOR_BODY_PROL_2:%.*]], label [[FOR_BODY_PROL_LOOPEXIT_UNR_LCSSA]], !dbg [[DBG24]]
+; CHECK: for.body.prol.2:
+; CHECK-NEXT: [[ARRAYIDX_PROL_2:%.*]] = getelementptr inbounds i32, i32* [[TMP8]], i64 1, !dbg [[DBG28]]
+; CHECK-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX_PROL_2]], align 4, !dbg [[DBG28]], !tbaa [[TBAA20]]
+; CHECK-NEXT: [[CONV_PROL_2:%.*]] = sext i32 [[TMP9]] to i64, !dbg [[DBG28]]
+; CHECK-NEXT: [[TMP10:%.*]] = inttoptr i64 [[CONV_PROL_2]] to i32*, !dbg [[DBG28]]
+; CHECK-NEXT: [[ADD_PROL_2:%.*]] = add nsw i32 [[ADD_PROL_1]], 2, !dbg [[DBG29]]
+; CHECK-NEXT: br label [[FOR_BODY_PROL_LOOPEXIT_UNR_LCSSA]]
; CHECK: for.body.prol.loopexit.unr-lcssa:
-; CHECK-NEXT: [[DOTLCSSA_UNR_PH:%.*]] = phi i32* [ [[TMP6]], [[FOR_BODY_PROL]] ], [ [[TMP20:%.*]], [[FOR_BODY_PROL_1]] ], [ [[TMP22:%.*]], [[FOR_BODY_PROL_2:%.*]] ]
-; CHECK-NEXT: [[DOTUNR_PH:%.*]] = phi i32* [ [[TMP6]], [[FOR_BODY_PROL]] ], [ [[TMP20]], [[FOR_BODY_PROL_1]] ], [ [[TMP22]], [[FOR_BODY_PROL_2]] ]
-; CHECK-NEXT: [[DOTUNR1_PH:%.*]] = phi i32 [ [[ADD_PROL]], [[FOR_BODY_PROL]] ], [ [[ADD_PROL_1:%.*]], [[FOR_BODY_PROL_1]] ], [ [[ADD_PROL_2:%.*]], [[FOR_BODY_PROL_2]] ]
+; CHECK-NEXT: [[DOTLCSSA_UNR_PH:%.*]] = phi i32* [ [[TMP6]], [[FOR_BODY_PROL]] ], [ [[TMP8]], [[FOR_BODY_PROL_1]] ], [ [[TMP10]], [[FOR_BODY_PROL_2]] ]
+; CHECK-NEXT: [[DOTUNR_PH:%.*]] = phi i32* [ [[TMP6]], [[FOR_BODY_PROL]] ], [ [[TMP8]], [[FOR_BODY_PROL_1]] ], [ [[TMP10]], [[FOR_BODY_PROL_2]] ]
+; CHECK-NEXT: [[DOTUNR1_PH:%.*]] = phi i32 [ [[ADD_PROL]], [[FOR_BODY_PROL]] ], [ [[ADD_PROL_1]], [[FOR_BODY_PROL_1]] ], [ [[ADD_PROL_2]], [[FOR_BODY_PROL_2]] ]
; CHECK-NEXT: br label [[FOR_BODY_PROL_LOOPEXIT]], !dbg [[DBG24]]
; CHECK: for.body.prol.loopexit:
; CHECK-NEXT: [[DOTLCSSA_UNR:%.*]] = phi i32* [ undef, [[FOR_BODY_LR_PH]] ], [ [[DOTLCSSA_UNR_PH]], [[FOR_BODY_PROL_LOOPEXIT_UNR_LCSSA]] ]
; CHECK-NEXT: [[DOTUNR:%.*]] = phi i32* [ [[A_PROMOTED]], [[FOR_BODY_LR_PH]] ], [ [[DOTUNR_PH]], [[FOR_BODY_PROL_LOOPEXIT_UNR_LCSSA]] ]
; CHECK-NEXT: [[DOTUNR1:%.*]] = phi i32 [ [[DOTPR]], [[FOR_BODY_LR_PH]] ], [ [[DOTUNR1_PH]], [[FOR_BODY_PROL_LOOPEXIT_UNR_LCSSA]] ]
-; CHECK-NEXT: [[TMP7:%.*]] = icmp ult i32 [[TMP3]], 3, !dbg [[DBG24]]
-; CHECK-NEXT: br i1 [[TMP7]], label [[FOR_COND_FOR_END_CRIT_EDGE:%.*]], label [[FOR_BODY_LR_PH_NEW:%.*]], !dbg [[DBG24]]
+; CHECK-NEXT: [[TMP11:%.*]] = icmp ult i32 [[TMP3]], 3, !dbg [[DBG24]]
+; CHECK-NEXT: br i1 [[TMP11]], label [[FOR_COND_FOR_END_CRIT_EDGE:%.*]], label [[FOR_BODY_LR_PH_NEW:%.*]], !dbg [[DBG24]]
; CHECK: for.body.lr.ph.new:
; CHECK-NEXT: br label [[FOR_BODY:%.*]], !dbg [[DBG24]]
; CHECK: for.body:
-; CHECK-NEXT: [[TMP8:%.*]] = phi i32* [ [[DOTUNR]], [[FOR_BODY_LR_PH_NEW]] ], [ [[TMP17:%.*]], [[FOR_BODY]] ], !dbg [[DBG28]]
-; CHECK-NEXT: [[TMP9:%.*]] = phi i32 [ [[DOTUNR1]], [[FOR_BODY_LR_PH_NEW]] ], [ [[ADD_3:%.*]], [[FOR_BODY]] ]
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP8]], i64 1, !dbg [[DBG28]]
-; CHECK-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX]], align 4, !dbg [[DBG28]], !tbaa [[TBAA20]]
-; CHECK-NEXT: [[CONV:%.*]] = sext i32 [[TMP10]] to i64, !dbg [[DBG28]]
-; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i64 [[CONV]] to i32*, !dbg [[DBG28]]
-; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP9]], 2, !dbg [[DBG29]]
-; CHECK-NEXT: [[ARRAYIDX_1:%.*]] = getelementptr inbounds i32, i32* [[TMP11]], i64 1, !dbg [[DBG28]]
-; CHECK-NEXT: [[TMP12:%.*]] = load i32, i32* [[ARRAYIDX_1]], align 4, !dbg [[DBG28]], !tbaa [[TBAA20]]
-; CHECK-NEXT: [[CONV_1:%.*]] = sext i32 [[TMP12]] to i64, !dbg [[DBG28]]
-; CHECK-NEXT: [[TMP13:%.*]] = inttoptr i64 [[CONV_1]] to i32*, !dbg [[DBG28]]
+; CHECK-NEXT: [[TMP12:%.*]] = phi i32* [ [[DOTUNR]], [[FOR_BODY_LR_PH_NEW]] ], [ [[TMP21:%.*]], [[FOR_BODY]] ], !dbg [[DBG28]]
+; CHECK-NEXT: [[TMP13:%.*]] = phi i32 [ [[DOTUNR1]], [[FOR_BODY_LR_PH_NEW]] ], [ [[ADD_3:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP12]], i64 1, !dbg [[DBG28]]
+; CHECK-NEXT: [[TMP14:%.*]] = load i32, i32* [[ARRAYIDX]], align 4, !dbg [[DBG28]], !tbaa [[TBAA20]]
+; CHECK-NEXT: [[CONV:%.*]] = sext i32 [[TMP14]] to i64, !dbg [[DBG28]]
+; CHECK-NEXT: [[TMP15:%.*]] = inttoptr i64 [[CONV]] to i32*, !dbg [[DBG28]]
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 2, !dbg [[DBG29]]
+; CHECK-NEXT: [[ARRAYIDX_1:%.*]] = getelementptr inbounds i32, i32* [[TMP15]], i64 1, !dbg [[DBG28]]
+; CHECK-NEXT: [[TMP16:%.*]] = load i32, i32* [[ARRAYIDX_1]], align 4, !dbg [[DBG28]], !tbaa [[TBAA20]]
+; CHECK-NEXT: [[CONV_1:%.*]] = sext i32 [[TMP16]] to i64, !dbg [[DBG28]]
+; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[CONV_1]] to i32*, !dbg [[DBG28]]
; CHECK-NEXT: [[ADD_1:%.*]] = add nsw i32 [[ADD]], 2, !dbg [[DBG29]]
-; CHECK-NEXT: [[ARRAYIDX_2:%.*]] = getelementptr inbounds i32, i32* [[TMP13]], i64 1, !dbg [[DBG28]]
-; CHECK-NEXT: [[TMP14:%.*]] = load i32, i32* [[ARRAYIDX_2]], align 4, !dbg [[DBG28]], !tbaa [[TBAA20]]
-; CHECK-NEXT: [[CONV_2:%.*]] = sext i32 [[TMP14]] to i64, !dbg [[DBG28]]
-; CHECK-NEXT: [[TMP15:%.*]] = inttoptr i64 [[CONV_2]] to i32*, !dbg [[DBG28]]
+; CHECK-NEXT: [[ARRAYIDX_2:%.*]] = getelementptr inbounds i32, i32* [[TMP17]], i64 1, !dbg [[DBG28]]
+; CHECK-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX_2]], align 4, !dbg [[DBG28]], !tbaa [[TBAA20]]
+; CHECK-NEXT: [[CONV_2:%.*]] = sext i32 [[TMP18]] to i64, !dbg [[DBG28]]
+; CHECK-NEXT: [[TMP19:%.*]] = inttoptr i64 [[CONV_2]] to i32*, !dbg [[DBG28]]
; CHECK-NEXT: [[ADD_2:%.*]] = add nsw i32 [[ADD_1]], 2, !dbg [[DBG29]]
-; CHECK-NEXT: [[ARRAYIDX_3:%.*]] = getelementptr inbounds i32, i32* [[TMP15]], i64 1, !dbg [[DBG28]]
-; CHECK-NEXT: [[TMP16:%.*]] = load i32, i32* [[ARRAYIDX_3]], align 4, !dbg [[DBG28]], !tbaa [[TBAA20]]
-; CHECK-NEXT: [[CONV_3:%.*]] = sext i32 [[TMP16]] to i64, !dbg [[DBG28]]
-; CHECK-NEXT: [[TMP17]] = inttoptr i64 [[CONV_3]] to i32*, !dbg [[DBG28]]
+; CHECK-NEXT: [[ARRAYIDX_3:%.*]] = getelementptr inbounds i32, i32* [[TMP19]], i64 1, !dbg [[DBG28]]
+; CHECK-NEXT: [[TMP20:%.*]] = load i32, i32* [[ARRAYIDX_3]], align 4, !dbg [[DBG28]], !tbaa [[TBAA20]]
+; CHECK-NEXT: [[CONV_3:%.*]] = sext i32 [[TMP20]] to i64, !dbg [[DBG28]]
+; CHECK-NEXT: [[TMP21]] = inttoptr i64 [[CONV_3]] to i32*, !dbg [[DBG28]]
; CHECK-NEXT: [[ADD_3]] = add nsw i32 [[ADD_2]], 2, !dbg [[DBG29]]
; CHECK-NEXT: [[TOBOOL_3:%.*]] = icmp eq i32 [[ADD_3]], 0, !dbg [[DBG24]]
; CHECK-NEXT: br i1 [[TOBOOL_3]], label [[FOR_COND_FOR_END_CRIT_EDGE_UNR_LCSSA:%.*]], label [[FOR_BODY]], !dbg [[DBG24]], !llvm.loop [[LOOP30:![0-9]+]]
; CHECK: for.cond.for.end_crit_edge.unr-lcssa:
-; CHECK-NEXT: [[DOTLCSSA_PH:%.*]] = phi i32* [ [[TMP17]], [[FOR_BODY]] ]
+; CHECK-NEXT: [[DOTLCSSA_PH:%.*]] = phi i32* [ [[TMP21]], [[FOR_BODY]] ]
; CHECK-NEXT: br label [[FOR_COND_FOR_END_CRIT_EDGE]], !dbg [[DBG24]]
; CHECK: for.cond.for.end_crit_edge:
; CHECK-NEXT: [[DOTLCSSA:%.*]] = phi i32* [ [[DOTLCSSA_UNR]], [[FOR_BODY_PROL_LOOPEXIT]] ], [ [[DOTLCSSA_PH]], [[FOR_COND_FOR_END_CRIT_EDGE_UNR_LCSSA]] ], !dbg [[DBG28]]
-; CHECK-NEXT: [[TMP18:%.*]] = add i32 [[TMP2]], 2, !dbg [[DBG24]]
+; CHECK-NEXT: [[TMP22:%.*]] = add i32 [[TMP2]], 2, !dbg [[DBG24]]
; CHECK-NEXT: store i32* [[DOTLCSSA]], i32** @a, align 8, !dbg [[DBG25]], !tbaa [[TBAA26]]
-; CHECK-NEXT: store i32 [[TMP18]], i32* @b, align 4, !dbg [[DBG33:![0-9]+]], !tbaa [[TBAA20]]
+; CHECK-NEXT: store i32 [[TMP22]], i32* @b, align 4, !dbg [[DBG33:![0-9]+]], !tbaa [[TBAA20]]
; CHECK-NEXT: br label [[FOR_END]], !dbg [[DBG24]]
; CHECK: for.end:
; CHECK-NEXT: ret i32 undef, !dbg [[DBG34:![0-9]+]]
-; CHECK: for.body.prol.1:
-; CHECK-NEXT: [[ARRAYIDX_PROL_1:%.*]] = getelementptr inbounds i32, i32* [[TMP6]], i64 1, !dbg [[DBG28]]
-; CHECK-NEXT: [[TMP19:%.*]] = load i32, i32* [[ARRAYIDX_PROL_1]], align 4, !dbg [[DBG28]], !tbaa [[TBAA20]]
-; CHECK-NEXT: [[CONV_PROL_1:%.*]] = sext i32 [[TMP19]] to i64, !dbg [[DBG28]]
-; CHECK-NEXT: [[TMP20]] = inttoptr i64 [[CONV_PROL_1]] to i32*, !dbg [[DBG28]]
-; CHECK-NEXT: [[ADD_PROL_1]] = add nsw i32 [[ADD_PROL]], 2, !dbg [[DBG29]]
-; CHECK-NEXT: [[PROL_ITER_SUB_1:%.*]] = sub i32 [[PROL_ITER_SUB]], 1, !dbg [[DBG24]]
-; CHECK-NEXT: [[PROL_ITER_CMP_1:%.*]] = icmp ne i32 [[PROL_ITER_SUB_1]], 0, !dbg [[DBG24]]
-; CHECK-NEXT: br i1 [[PROL_ITER_CMP_1]], label [[FOR_BODY_PROL_2]], label [[FOR_BODY_PROL_LOOPEXIT_UNR_LCSSA]], !dbg [[DBG24]]
-; CHECK: for.body.prol.2:
-; CHECK-NEXT: [[ARRAYIDX_PROL_2:%.*]] = getelementptr inbounds i32, i32* [[TMP20]], i64 1, !dbg [[DBG28]]
-; CHECK-NEXT: [[TMP21:%.*]] = load i32, i32* [[ARRAYIDX_PROL_2]], align 4, !dbg [[DBG28]], !tbaa [[TBAA20]]
-; CHECK-NEXT: [[CONV_PROL_2:%.*]] = sext i32 [[TMP21]] to i64, !dbg [[DBG28]]
-; CHECK-NEXT: [[TMP22]] = inttoptr i64 [[CONV_PROL_2]] to i32*, !dbg [[DBG28]]
-; CHECK-NEXT: [[ADD_PROL_2]] = add nsw i32 [[ADD_PROL_1]], 2, !dbg [[DBG29]]
-; CHECK-NEXT: br label [[FOR_BODY_PROL_LOOPEXIT_UNR_LCSSA]]
;
entry:
%.pr = load i32, i32* @b, align 4, !dbg !17, !tbaa !20
diff --git a/llvm/test/Transforms/LoopUnroll/2011-08-08-PhiUpdate.ll b/llvm/test/Transforms/LoopUnroll/2011-08-08-PhiUpdate.ll
index 3e611430d69e..7bb2d732195a 100644
--- a/llvm/test/Transforms/LoopUnroll/2011-08-08-PhiUpdate.ll
+++ b/llvm/test/Transforms/LoopUnroll/2011-08-08-PhiUpdate.ll
@@ -17,24 +17,24 @@ define void @test1(i32 %i, i32 %j) nounwind uwtable ssp {
; CHECK-NEXT: [[SUB5:%.*]] = sub i32 [[SUB]], [[J:%.*]]
; CHECK-NEXT: [[COND2:%.*]] = call zeroext i1 @check()
; CHECK-NEXT: br i1 [[COND2]], label [[IF_THEN_LOOPEXIT:%.*]], label [[IF_ELSE_1:%.*]]
-; CHECK: if.then.loopexit:
-; CHECK-NEXT: [[SUB5_LCSSA:%.*]] = phi i32 [ [[SUB5]], [[IF_ELSE]] ], [ [[SUB5_1:%.*]], [[IF_ELSE_1]] ], [ [[SUB5_2:%.*]], [[IF_ELSE_2:%.*]] ], [ [[SUB5_3]], [[IF_ELSE_3]] ]
-; CHECK-NEXT: br label [[IF_THEN]]
-; CHECK: if.then:
-; CHECK-NEXT: [[I_TR:%.*]] = phi i32 [ [[I]], [[ENTRY:%.*]] ], [ [[SUB5_LCSSA]], [[IF_THEN_LOOPEXIT]] ]
-; CHECK-NEXT: ret void
; CHECK: if.else.1:
-; CHECK-NEXT: [[SUB5_1]] = sub i32 [[SUB5]], [[J]]
+; CHECK-NEXT: [[SUB5_1:%.*]] = sub i32 [[SUB5]], [[J]]
; CHECK-NEXT: [[COND2_1:%.*]] = call zeroext i1 @check()
-; CHECK-NEXT: br i1 [[COND2_1]], label [[IF_THEN_LOOPEXIT]], label [[IF_ELSE_2]]
+; CHECK-NEXT: br i1 [[COND2_1]], label [[IF_THEN_LOOPEXIT]], label [[IF_ELSE_2:%.*]]
; CHECK: if.else.2:
-; CHECK-NEXT: [[SUB5_2]] = sub i32 [[SUB5_1]], [[J]]
+; CHECK-NEXT: [[SUB5_2:%.*]] = sub i32 [[SUB5_1]], [[J]]
; CHECK-NEXT: [[COND2_2:%.*]] = call zeroext i1 @check()
; CHECK-NEXT: br i1 [[COND2_2]], label [[IF_THEN_LOOPEXIT]], label [[IF_ELSE_3]]
; CHECK: if.else.3:
; CHECK-NEXT: [[SUB5_3]] = sub i32 [[SUB5_2]], [[J]]
; CHECK-NEXT: [[COND2_3:%.*]] = call zeroext i1 @check()
; CHECK-NEXT: br i1 [[COND2_3]], label [[IF_THEN_LOOPEXIT]], label [[IF_ELSE]], !llvm.loop [[LOOP0:![0-9]+]]
+; CHECK: if.then.loopexit:
+; CHECK-NEXT: [[SUB5_LCSSA:%.*]] = phi i32 [ [[SUB5]], [[IF_ELSE]] ], [ [[SUB5_1]], [[IF_ELSE_1]] ], [ [[SUB5_2]], [[IF_ELSE_2]] ], [ [[SUB5_3]], [[IF_ELSE_3]] ]
+; CHECK-NEXT: br label [[IF_THEN]]
+; CHECK: if.then:
+; CHECK-NEXT: [[I_TR:%.*]] = phi i32 [ [[I]], [[ENTRY:%.*]] ], [ [[SUB5_LCSSA]], [[IF_THEN_LOOPEXIT]] ]
+; CHECK-NEXT: ret void
;
entry:
%cond1 = call zeroext i1 @check()
@@ -77,17 +77,11 @@ define i32 @test2(i32* nocapture %p, i32 %n) nounwind readonly {
; CHECK-NEXT: [[INDVAR_NEXT:%.*]] = add nuw nsw i64 [[INDVAR]], 1
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVAR_NEXT]], [[TMP]]
; CHECK-NEXT: br i1 [[EXITCOND]], label [[BB_1:%.*]], label [[BB1_BB2_CRIT_EDGE:%.*]]
-; CHECK: bb1.bb2_crit_edge:
-; CHECK-NEXT: [[DOTLCSSA:%.*]] = phi i32 [ [[TMP2]], [[BB1]] ], [ [[TMP4:%.*]], [[BB1_1:%.*]] ], [ [[TMP6:%.*]], [[BB1_2:%.*]] ], [ [[TMP8]], [[BB1_3]] ]
-; CHECK-NEXT: br label [[BB2]]
-; CHECK: bb2:
-; CHECK-NEXT: [[S_0_LCSSA:%.*]] = phi i32 [ [[DOTLCSSA]], [[BB1_BB2_CRIT_EDGE]] ], [ 0, [[ENTRY:%.*]] ]
-; CHECK-NEXT: ret i32 [[S_0_LCSSA]]
; CHECK: bb.1:
; CHECK-NEXT: [[SCEVGEP_1:%.*]] = getelementptr i32, i32* [[P]], i64 [[INDVAR_NEXT]]
; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[SCEVGEP_1]], align 1
-; CHECK-NEXT: [[TMP4]] = add nsw i32 [[TMP3]], [[TMP2]]
-; CHECK-NEXT: br label [[BB1_1]]
+; CHECK-NEXT: [[TMP4:%.*]] = add nsw i32 [[TMP3]], [[TMP2]]
+; CHECK-NEXT: br label [[BB1_1:%.*]]
; CHECK: bb1.1:
; CHECK-NEXT: [[INDVAR_NEXT_1:%.*]] = add nuw nsw i64 [[INDVAR_NEXT]], 1
; CHECK-NEXT: [[EXITCOND_1:%.*]] = icmp ne i64 [[INDVAR_NEXT_1]], [[TMP]]
@@ -95,8 +89,8 @@ define i32 @test2(i32* nocapture %p, i32 %n) nounwind readonly {
; CHECK: bb.2:
; CHECK-NEXT: [[SCEVGEP_2:%.*]] = getelementptr i32, i32* [[P]], i64 [[INDVAR_NEXT_1]]
; CHECK-NEXT: [[TMP5:%.*]] = load i32, i32* [[SCEVGEP_2]], align 1
-; CHECK-NEXT: [[TMP6]] = add nsw i32 [[TMP5]], [[TMP4]]
-; CHECK-NEXT: br label [[BB1_2]]
+; CHECK-NEXT: [[TMP6:%.*]] = add nsw i32 [[TMP5]], [[TMP4]]
+; CHECK-NEXT: br label [[BB1_2:%.*]]
; CHECK: bb1.2:
; CHECK-NEXT: [[INDVAR_NEXT_2:%.*]] = add nuw nsw i64 [[INDVAR_NEXT_1]], 1
; CHECK-NEXT: [[EXITCOND_2:%.*]] = icmp ne i64 [[INDVAR_NEXT_2]], [[TMP]]
@@ -110,6 +104,12 @@ define i32 @test2(i32* nocapture %p, i32 %n) nounwind readonly {
; CHECK-NEXT: [[INDVAR_NEXT_3]] = add i64 [[INDVAR_NEXT_2]], 1
; CHECK-NEXT: [[EXITCOND_3:%.*]] = icmp ne i64 [[INDVAR_NEXT_3]], [[TMP]]
; CHECK-NEXT: br i1 [[EXITCOND_3]], label [[BB]], label [[BB1_BB2_CRIT_EDGE]], !llvm.loop [[LOOP2:![0-9]+]]
+; CHECK: bb1.bb2_crit_edge:
+; CHECK-NEXT: [[DOTLCSSA:%.*]] = phi i32 [ [[TMP2]], [[BB1]] ], [ [[TMP4]], [[BB1_1]] ], [ [[TMP6]], [[BB1_2]] ], [ [[TMP8]], [[BB1_3]] ]
+; CHECK-NEXT: br label [[BB2]]
+; CHECK: bb2:
+; CHECK-NEXT: [[S_0_LCSSA:%.*]] = phi i32 [ [[DOTLCSSA]], [[BB1_BB2_CRIT_EDGE]] ], [ 0, [[ENTRY:%.*]] ]
+; CHECK-NEXT: ret i32 [[S_0_LCSSA]]
;
entry:
%0 = icmp sgt i32 %n, 0 ; <i1> [#uses=1]
@@ -162,20 +162,12 @@ define i32 @test3() nounwind uwtable ssp align 2 {
; CHECK: do.cond:
; CHECK-NEXT: [[COND3:%.*]] = call zeroext i1 @check()
; CHECK-NEXT: br i1 [[COND3]], label [[DO_END:%.*]], label [[DO_BODY_1:%.*]]
-; CHECK: do.end:
-; CHECK-NEXT: br label [[RETURN]]
-; CHECK: return.loopexit:
-; CHECK-NEXT: [[TMP7_I_LCSSA:%.*]] = phi i32 [ [[TMP7_I]], [[LAND_LHS_TRUE]] ], [ [[TMP7_I_1:%.*]], [[LAND_LHS_TRUE_1:%.*]] ], [ [[TMP7_I_2:%.*]], [[LAND_LHS_TRUE_2:%.*]] ], [ [[TMP7_I_3:%.*]], [[LAND_LHS_TRUE_3:%.*]] ]
-; CHECK-NEXT: br label [[RETURN]]
-; CHECK: return:
-; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i32 [ 0, [[DO_END]] ], [ 0, [[ENTRY:%.*]] ], [ [[TMP7_I_LCSSA]], [[RETURN_LOOPEXIT]] ]
-; CHECK-NEXT: ret i32 [[RETVAL_0]]
; CHECK: do.body.1:
; CHECK-NEXT: [[COND2_1:%.*]] = call zeroext i1 @check()
; CHECK-NEXT: br i1 [[COND2_1]], label [[EXIT_1:%.*]], label [[DO_COND_1:%.*]]
; CHECK: exit.1:
-; CHECK-NEXT: [[TMP7_I_1]] = load i32, i32* undef, align 8
-; CHECK-NEXT: br i1 undef, label [[DO_COND_1]], label [[LAND_LHS_TRUE_1]]
+; CHECK-NEXT: [[TMP7_I_1:%.*]] = load i32, i32* undef, align 8
+; CHECK-NEXT: br i1 undef, label [[DO_COND_1]], label [[LAND_LHS_TRUE_1:%.*]]
; CHECK: land.lhs.true.1:
; CHECK-NEXT: br i1 true, label [[RETURN_LOOPEXIT]], label [[DO_COND_1]]
; CHECK: do.cond.1:
@@ -185,8 +177,8 @@ define i32 @test3() nounwind uwtable ssp align 2 {
; CHECK-NEXT: [[COND2_2:%.*]] = call zeroext i1 @check()
; CHECK-NEXT: br i1 [[COND2_2]], label [[EXIT_2:%.*]], label [[DO_COND_2:%.*]]
; CHECK: exit.2:
-; CHECK-NEXT: [[TMP7_I_2]] = load i32, i32* undef, align 8
-; CHECK-NEXT: br i1 undef, label [[DO_COND_2]], label [[LAND_LHS_TRUE_2]]
+; CHECK-NEXT: [[TMP7_I_2:%.*]] = load i32, i32* undef, align 8
+; CHECK-NEXT: br i1 undef, label [[DO_COND_2]], label [[LAND_LHS_TRUE_2:%.*]]
; CHECK: land.lhs.true.2:
; CHECK-NEXT: br i1 true, label [[RETURN_LOOPEXIT]], label [[DO_COND_2]]
; CHECK: do.cond.2:
@@ -196,13 +188,21 @@ define i32 @test3() nounwind uwtable ssp align 2 {
; CHECK-NEXT: [[COND2_3:%.*]] = call zeroext i1 @check()
; CHECK-NEXT: br i1 [[COND2_3]], label [[EXIT_3:%.*]], label [[DO_COND_3:%.*]]
; CHECK: exit.3:
-; CHECK-NEXT: [[TMP7_I_3]] = load i32, i32* undef, align 8
-; CHECK-NEXT: br i1 undef, label [[DO_COND_3]], label [[LAND_LHS_TRUE_3]]
+; CHECK-NEXT: [[TMP7_I_3:%.*]] = load i32, i32* undef, align 8
+; CHECK-NEXT: br i1 undef, label [[DO_COND_3]], label [[LAND_LHS_TRUE_3:%.*]]
; CHECK: land.lhs.true.3:
; CHECK-NEXT: br i1 true, label [[RETURN_LOOPEXIT]], label [[DO_COND_3]]
; CHECK: do.cond.3:
; CHECK-NEXT: [[COND3_3:%.*]] = call zeroext i1 @check()
; CHECK-NEXT: br i1 [[COND3_3]], label [[DO_END]], label [[DO_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
+; CHECK: do.end:
+; CHECK-NEXT: br label [[RETURN]]
+; CHECK: return.loopexit:
+; CHECK-NEXT: [[TMP7_I_LCSSA:%.*]] = phi i32 [ [[TMP7_I]], [[LAND_LHS_TRUE]] ], [ [[TMP7_I_1]], [[LAND_LHS_TRUE_1]] ], [ [[TMP7_I_2]], [[LAND_LHS_TRUE_2]] ], [ [[TMP7_I_3]], [[LAND_LHS_TRUE_3]] ]
+; CHECK-NEXT: br label [[RETURN]]
+; CHECK: return:
+; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i32 [ 0, [[DO_END]] ], [ 0, [[ENTRY:%.*]] ], [ [[TMP7_I_LCSSA]], [[RETURN_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RETVAL_0]]
;
entry:
%cond1 = call zeroext i1 @check()
diff --git a/llvm/test/Transforms/LoopUnroll/2011-08-09-PhiUpdate.ll b/llvm/test/Transforms/LoopUnroll/2011-08-09-PhiUpdate.ll
index be4b6ff64fdd..af648bae8642 100644
--- a/llvm/test/Transforms/LoopUnroll/2011-08-09-PhiUpdate.ll
+++ b/llvm/test/Transforms/LoopUnroll/2011-08-09-PhiUpdate.ll
@@ -33,16 +33,13 @@ define i32 @foo() uwtable ssp align 2 {
; CHECK: do.cond:
; CHECK-NEXT: [[CMP18:%.*]] = icmp sgt i32 [[CALL2]], -1
; CHECK-NEXT: br i1 [[CMP18]], label [[LAND_LHS_TRUE_I_1:%.*]], label [[RETURN]]
-; CHECK: return:
-; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i32 [ [[TMP7_I]], [[LAND_LHS_TRUE]] ], [ 0, [[DO_COND]] ], [ [[TMP7_I_1:%.*]], [[LAND_LHS_TRUE_1:%.*]] ], [ 0, [[DO_COND_1:%.*]] ], [ [[TMP7_I_2:%.*]], [[LAND_LHS_TRUE_2:%.*]] ], [ 0, [[DO_COND_2:%.*]] ], [ [[TMP7_I_3:%.*]], [[LAND_LHS_TRUE_3:%.*]] ], [ 0, [[DO_COND_3:%.*]] ]
-; CHECK-NEXT: ret i32 [[RETVAL_0]]
; CHECK: land.lhs.true.i.1:
; CHECK-NEXT: [[CMP4_I_1:%.*]] = call zeroext i1 @check() #[[ATTR0]]
-; CHECK-NEXT: br i1 [[CMP4_I_1]], label [[BAR_EXIT_1:%.*]], label [[DO_COND_1]]
+; CHECK-NEXT: br i1 [[CMP4_I_1]], label [[BAR_EXIT_1:%.*]], label [[DO_COND_1:%.*]]
; CHECK: bar.exit.1:
-; CHECK-NEXT: [[TMP7_I_1]] = call i32 @getval() #[[ATTR0]]
+; CHECK-NEXT: [[TMP7_I_1:%.*]] = call i32 @getval() #[[ATTR0]]
; CHECK-NEXT: [[CMP_NOT_1:%.*]] = icmp eq i32 [[TMP7_I_1]], 0
-; CHECK-NEXT: br i1 [[CMP_NOT_1]], label [[DO_COND_1]], label [[LAND_LHS_TRUE_1]]
+; CHECK-NEXT: br i1 [[CMP_NOT_1]], label [[DO_COND_1]], label [[LAND_LHS_TRUE_1:%.*]]
; CHECK: land.lhs.true.1:
; CHECK-NEXT: [[CALL10_1:%.*]] = call i32 @getval()
; CHECK-NEXT: [[CMP11_1:%.*]] = icmp eq i32 [[CALL10_1]], 0
@@ -52,11 +49,11 @@ define i32 @foo() uwtable ssp align 2 {
; CHECK-NEXT: br i1 [[CMP18_1]], label [[LAND_LHS_TRUE_I_2:%.*]], label [[RETURN]]
; CHECK: land.lhs.true.i.2:
; CHECK-NEXT: [[CMP4_I_2:%.*]] = call zeroext i1 @check() #[[ATTR0]]
-; CHECK-NEXT: br i1 [[CMP4_I_2]], label [[BAR_EXIT_2:%.*]], label [[DO_COND_2]]
+; CHECK-NEXT: br i1 [[CMP4_I_2]], label [[BAR_EXIT_2:%.*]], label [[DO_COND_2:%.*]]
; CHECK: bar.exit.2:
-; CHECK-NEXT: [[TMP7_I_2]] = call i32 @getval() #[[ATTR0]]
+; CHECK-NEXT: [[TMP7_I_2:%.*]] = call i32 @getval() #[[ATTR0]]
; CHECK-NEXT: [[CMP_NOT_2:%.*]] = icmp eq i32 [[TMP7_I_2]], 0
-; CHECK-NEXT: br i1 [[CMP_NOT_2]], label [[DO_COND_2]], label [[LAND_LHS_TRUE_2]]
+; CHECK-NEXT: br i1 [[CMP_NOT_2]], label [[DO_COND_2]], label [[LAND_LHS_TRUE_2:%.*]]
; CHECK: land.lhs.true.2:
; CHECK-NEXT: [[CALL10_2:%.*]] = call i32 @getval()
; CHECK-NEXT: [[CMP11_2:%.*]] = icmp eq i32 [[CALL10_2]], 0
@@ -66,11 +63,11 @@ define i32 @foo() uwtable ssp align 2 {
; CHECK-NEXT: br i1 [[CMP18_2]], label [[LAND_LHS_TRUE_I_3:%.*]], label [[RETURN]]
; CHECK: land.lhs.true.i.3:
; CHECK-NEXT: [[CMP4_I_3:%.*]] = call zeroext i1 @check() #[[ATTR0]]
-; CHECK-NEXT: br i1 [[CMP4_I_3]], label [[BAR_EXIT_3:%.*]], label [[DO_COND_3]]
+; CHECK-NEXT: br i1 [[CMP4_I_3]], label [[BAR_EXIT_3:%.*]], label [[DO_COND_3:%.*]]
; CHECK: bar.exit.3:
-; CHECK-NEXT: [[TMP7_I_3]] = call i32 @getval() #[[ATTR0]]
+; CHECK-NEXT: [[TMP7_I_3:%.*]] = call i32 @getval() #[[ATTR0]]
; CHECK-NEXT: [[CMP_NOT_3:%.*]] = icmp eq i32 [[TMP7_I_3]], 0
-; CHECK-NEXT: br i1 [[CMP_NOT_3]], label [[DO_COND_3]], label [[LAND_LHS_TRUE_3]]
+; CHECK-NEXT: br i1 [[CMP_NOT_3]], label [[DO_COND_3]], label [[LAND_LHS_TRUE_3:%.*]]
; CHECK: land.lhs.true.3:
; CHECK-NEXT: [[CALL10_3:%.*]] = call i32 @getval()
; CHECK-NEXT: [[CMP11_3:%.*]] = icmp eq i32 [[CALL10_3]], 0
@@ -78,6 +75,9 @@ define i32 @foo() uwtable ssp align 2 {
; CHECK: do.cond.3:
; CHECK-NEXT: [[CMP18_3:%.*]] = icmp sgt i32 [[CALL2]], -1
; CHECK-NEXT: br i1 [[CMP18_3]], label [[LAND_LHS_TRUE_I]], label [[RETURN]], !llvm.loop [[LOOP0:![0-9]+]]
+; CHECK: return:
+; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i32 [ [[TMP7_I]], [[LAND_LHS_TRUE]] ], [ 0, [[DO_COND]] ], [ [[TMP7_I_1]], [[LAND_LHS_TRUE_1]] ], [ 0, [[DO_COND_1]] ], [ [[TMP7_I_2]], [[LAND_LHS_TRUE_2]] ], [ 0, [[DO_COND_2]] ], [ [[TMP7_I_3]], [[LAND_LHS_TRUE_3]] ], [ 0, [[DO_COND_3]] ]
+; CHECK-NEXT: ret i32 [[RETVAL_0]]
;
entry:
br i1 undef, label %return, label %if.end
diff --git a/llvm/test/Transforms/LoopUnroll/AArch64/runtime-unroll-generic.ll b/llvm/test/Transforms/LoopUnroll/AArch64/runtime-unroll-generic.ll
index 5bbab929c936..5c8f9ca01679 100644
--- a/llvm/test/Transforms/LoopUnroll/AArch64/runtime-unroll-generic.ll
+++ b/llvm/test/Transforms/LoopUnroll/AArch64/runtime-unroll-generic.ll
@@ -67,8 +67,6 @@ define void @runtime_unroll_generic(i32 %arg_0, i32* %arg_1, i16* %arg_2, i16* %
; CHECK-A55-NEXT: store i32 [[ADD21_EPIL]], i32* [[ARRAYIDX20]], align 4
; CHECK-A55-NEXT: [[EPIL_ITER_CMP_NOT:%.*]] = icmp eq i32 [[XTRAITER]], 1
; CHECK-A55-NEXT: br i1 [[EPIL_ITER_CMP_NOT]], label [[FOR_END]], label [[FOR_BODY6_EPIL_1:%.*]]
-; CHECK-A55: for.end:
-; CHECK-A55-NEXT: ret void
; CHECK-A55: for.body6.epil.1:
; CHECK-A55-NEXT: [[TMP14:%.*]] = load i16, i16* [[ARRAYIDX10]], align 2
; CHECK-A55-NEXT: [[CONV_EPIL_1:%.*]] = sext i16 [[TMP14]] to i32
@@ -90,6 +88,8 @@ define void @runtime_unroll_generic(i32 %arg_0, i32* %arg_1, i16* %arg_2, i16* %
; CHECK-A55-NEXT: [[ADD21_EPIL_2:%.*]] = add nsw i32 [[MUL16_EPIL_2]], [[TMP19]]
; CHECK-A55-NEXT: store i32 [[ADD21_EPIL_2]], i32* [[ARRAYIDX20]], align 4
; CHECK-A55-NEXT: br label [[FOR_END]]
+; CHECK-A55: for.end:
+; CHECK-A55-NEXT: ret void
;
; CHECK-GENERIC-LABEL: @runtime_unroll_generic(
; CHECK-GENERIC-NEXT: entry:
diff --git a/llvm/test/Transforms/LoopUnroll/AArch64/thresholdO3-cost-model.ll b/llvm/test/Transforms/LoopUnroll/AArch64/thresholdO3-cost-model.ll
index ee07518f8cac..5c6ac690c0ca 100644
--- a/llvm/test/Transforms/LoopUnroll/AArch64/thresholdO3-cost-model.ll
+++ b/llvm/test/Transforms/LoopUnroll/AArch64/thresholdO3-cost-model.ll
@@ -21,10 +21,6 @@ define i32 @tripcount_11() {
; CHECK-NEXT: br label [[DO_BODY6:%.*]]
; CHECK: for.cond:
; CHECK-NEXT: br i1 true, label [[FOR_COND_1:%.*]], label [[IF_THEN11:%.*]]
-; CHECK: do.body6:
-; CHECK-NEXT: br i1 true, label [[FOR_COND:%.*]], label [[IF_THEN11]]
-; CHECK: if.then11:
-; CHECK-NEXT: unreachable
; CHECK: for.cond.1:
; CHECK-NEXT: br i1 true, label [[FOR_COND_2:%.*]], label [[IF_THEN11]]
; CHECK: for.cond.2:
@@ -45,6 +41,10 @@ define i32 @tripcount_11() {
; CHECK-NEXT: br i1 true, label [[FOR_COND_10:%.*]], label [[IF_THEN11]]
; CHECK: for.cond.10:
; CHECK-NEXT: ret i32 0
+; CHECK: do.body6:
+; CHECK-NEXT: br i1 true, label [[FOR_COND:%.*]], label [[IF_THEN11]]
+; CHECK: if.then11:
+; CHECK-NEXT: unreachable
;
do.body6.preheader:
br label %do.body6
diff --git a/llvm/test/Transforms/LoopUnroll/AArch64/unroll-upperbound.ll b/llvm/test/Transforms/LoopUnroll/AArch64/unroll-upperbound.ll
index 3b82365d1a6e..ee905e5b10fe 100644
--- a/llvm/test/Transforms/LoopUnroll/AArch64/unroll-upperbound.ll
+++ b/llvm/test/Transforms/LoopUnroll/AArch64/unroll-upperbound.ll
@@ -18,8 +18,6 @@ define void @test(i1 %cond) {
; CHECK-NEXT: br label [[LATCH]]
; CHECK: latch:
; CHECK-NEXT: br i1 false, label [[FOR_END:%.*]], label [[FOR_BODY_1:%.*]]
-; CHECK: for.end:
-; CHECK-NEXT: ret void
; CHECK: for.body.1:
; CHECK-NEXT: switch i32 1, label [[SW_DEFAULT_1:%.*]] [
; CHECK-NEXT: i32 2, label [[LATCH_1:%.*]]
@@ -38,6 +36,8 @@ define void @test(i1 %cond) {
; CHECK-NEXT: br label [[LATCH_2]]
; CHECK: latch.2:
; CHECK-NEXT: br label [[FOR_END]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
;
entry:
%0 = select i1 %cond, i32 2, i32 3
diff --git a/llvm/test/Transforms/LoopUnroll/ARM/loop-unrolling.ll b/llvm/test/Transforms/LoopUnroll/ARM/loop-unrolling.ll
index f2e748ade0a2..e12dbf031b3b 100644
--- a/llvm/test/Transforms/LoopUnroll/ARM/loop-unrolling.ll
+++ b/llvm/test/Transforms/LoopUnroll/ARM/loop-unrolling.ll
@@ -121,14 +121,14 @@ for.body4:
; CHECK-NOUNROLL: br
; CHECK-UNROLL: for.body4.epil:
+; CHECK-UNROLL: for.body4.epil.1:
+; CHECK-UNROLL: for.body4.epil.2:
; CHECK-UNROLL: [[IV0:%[a-z.0-9]+]] = phi i32 [ 0, [[PRE:%[a-z0-9.]+]] ], [ [[IV4:%[a-z.0-9]+]], %for.body4 ]
; CHECK-UNROLL: [[IV1:%[a-z.0-9]+]] = add nuw nsw i32 [[IV0]], 1
; CHECK-UNROLL: [[IV2:%[a-z.0-9]+]] = add nuw nsw i32 [[IV1]], 1
; CHECK-UNROLL: [[IV3:%[a-z.0-9]+]] = add nuw nsw i32 [[IV2]], 1
; CHECK-UNROLL: [[IV4]] = add nuw i32 [[IV3]], 1
; CHECK-UNROLL: br
-; CHECK-UNROLL: for.body4.epil.1:
-; CHECK-UNROLL: for.body4.epil.2:
%w.024 = phi i32 [ 0, %for.body4.lr.ph ], [ %inc, %for.body4 ]
%add = add i32 %w.024, %mul
diff --git a/llvm/test/Transforms/LoopUnroll/ARM/multi-blocks.ll b/llvm/test/Transforms/LoopUnroll/ARM/multi-blocks.ll
index 156c0ab10658..8c4257698ab7 100644
--- a/llvm/test/Transforms/LoopUnroll/ARM/multi-blocks.ll
+++ b/llvm/test/Transforms/LoopUnroll/ARM/multi-blocks.ll
@@ -45,8 +45,37 @@ define void @test_three_blocks(i32* nocapture %Output,
; CHECK-NEXT: [[EPIL_ITER_SUB:%.*]] = sub i32 [[XTRAITER]], 1
; CHECK-NEXT: [[EPIL_ITER_CMP:%.*]] = icmp ne i32 [[EPIL_ITER_SUB]], 0
; CHECK-NEXT: br i1 [[EPIL_ITER_CMP]], label [[FOR_BODY_EPIL_1:%.*]], label [[FOR_COND_CLEANUP_LOOPEXIT_EPILOG_LCSSA:%.*]]
+; CHECK: for.body.epil.1:
+; CHECK-NEXT: [[ARRAYIDX_EPIL_1:%.*]] = getelementptr inbounds i32, i32* [[CONDITION]], i32 [[INC_EPIL]]
+; CHECK-NEXT: [[TMP4:%.*]] = load i32, i32* [[ARRAYIDX_EPIL_1]], align 4
+; CHECK-NEXT: [[TOBOOL_EPIL_1:%.*]] = icmp eq i32 [[TMP4]], 0
+; CHECK-NEXT: br i1 [[TOBOOL_EPIL_1]], label [[FOR_INC_EPIL_1:%.*]], label [[IF_THEN_EPIL_1:%.*]]
+; CHECK: if.then.epil.1:
+; CHECK-NEXT: [[ARRAYIDX1_EPIL_1:%.*]] = getelementptr inbounds i32, i32* [[INPUT]], i32 [[INC_EPIL]]
+; CHECK-NEXT: [[TMP5:%.*]] = load i32, i32* [[ARRAYIDX1_EPIL_1]], align 4
+; CHECK-NEXT: [[ADD_EPIL_1:%.*]] = add i32 [[TMP5]], [[TEMP_1_EPIL]]
+; CHECK-NEXT: br label [[FOR_INC_EPIL_1]]
+; CHECK: for.inc.epil.1:
+; CHECK-NEXT: [[TEMP_1_EPIL_1:%.*]] = phi i32 [ [[ADD_EPIL_1]], [[IF_THEN_EPIL_1]] ], [ [[TEMP_1_EPIL]], [[FOR_BODY_EPIL_1]] ]
+; CHECK-NEXT: [[INC_EPIL_1:%.*]] = add nuw i32 [[INC_EPIL]], 1
+; CHECK-NEXT: [[EPIL_ITER_SUB_1:%.*]] = sub i32 [[EPIL_ITER_SUB]], 1
+; CHECK-NEXT: [[EPIL_ITER_CMP_1:%.*]] = icmp ne i32 [[EPIL_ITER_SUB_1]], 0
+; CHECK-NEXT: br i1 [[EPIL_ITER_CMP_1]], label [[FOR_BODY_EPIL_2:%.*]], label [[FOR_COND_CLEANUP_LOOPEXIT_EPILOG_LCSSA]]
+; CHECK: for.body.epil.2:
+; CHECK-NEXT: [[ARRAYIDX_EPIL_2:%.*]] = getelementptr inbounds i32, i32* [[CONDITION]], i32 [[INC_EPIL_1]]
+; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARRAYIDX_EPIL_2]], align 4
+; CHECK-NEXT: [[TOBOOL_EPIL_2:%.*]] = icmp eq i32 [[TMP6]], 0
+; CHECK-NEXT: br i1 [[TOBOOL_EPIL_2]], label [[FOR_INC_EPIL_2:%.*]], label [[IF_THEN_EPIL_2:%.*]]
+; CHECK: if.then.epil.2:
+; CHECK-NEXT: [[ARRAYIDX1_EPIL_2:%.*]] = getelementptr inbounds i32, i32* [[INPUT]], i32 [[INC_EPIL_1]]
+; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[ARRAYIDX1_EPIL_2]], align 4
+; CHECK-NEXT: [[ADD_EPIL_2:%.*]] = add i32 [[TMP7]], [[TEMP_1_EPIL_1]]
+; CHECK-NEXT: br label [[FOR_INC_EPIL_2]]
+; CHECK: for.inc.epil.2:
+; CHECK-NEXT: [[TEMP_1_EPIL_2:%.*]] = phi i32 [ [[ADD_EPIL_2]], [[IF_THEN_EPIL_2]] ], [ [[TEMP_1_EPIL_1]], [[FOR_BODY_EPIL_2]] ]
+; CHECK-NEXT: br label [[FOR_COND_CLEANUP_LOOPEXIT_EPILOG_LCSSA]]
; CHECK: for.cond.cleanup.loopexit.epilog-lcssa:
-; CHECK-NEXT: [[TEMP_1_LCSSA_PH1:%.*]] = phi i32 [ [[TEMP_1_EPIL]], [[FOR_INC_EPIL]] ], [ [[TEMP_1_EPIL_1:%.*]], [[FOR_INC_EPIL_1:%.*]] ], [ [[TEMP_1_EPIL_2:%.*]], [[FOR_INC_EPIL_2:%.*]] ]
+; CHECK-NEXT: [[TEMP_1_LCSSA_PH1:%.*]] = phi i32 [ [[TEMP_1_EPIL]], [[FOR_INC_EPIL]] ], [ [[TEMP_1_EPIL_1]], [[FOR_INC_EPIL_1]] ], [ [[TEMP_1_EPIL_2]], [[FOR_INC_EPIL_2]] ]
; CHECK-NEXT: br label [[FOR_COND_CLEANUP_LOOPEXIT]]
; CHECK: for.cond.cleanup.loopexit:
; CHECK-NEXT: [[TEMP_1_LCSSA:%.*]] = phi i32 [ [[TEMP_1_LCSSA_PH]], [[FOR_COND_CLEANUP_LOOPEXIT_UNR_LCSSA]] ], [ [[TEMP_1_LCSSA_PH1]], [[FOR_COND_CLEANUP_LOOPEXIT_EPILOG_LCSSA]] ]
@@ -60,51 +89,22 @@ define void @test_three_blocks(i32* nocapture %Output,
; CHECK-NEXT: [[TEMP_09:%.*]] = phi i32 [ 0, [[FOR_BODY_PREHEADER_NEW]] ], [ [[TEMP_1_3]], [[FOR_INC_3]] ]
; CHECK-NEXT: [[NITER:%.*]] = phi i32 [ [[UNROLL_ITER]], [[FOR_BODY_PREHEADER_NEW]] ], [ [[NITER_NSUB_3:%.*]], [[FOR_INC_3]] ]
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[CONDITION]], i32 [[J_010]]
-; CHECK-NEXT: [[TMP4:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
-; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[TMP4]], 0
+; CHECK-NEXT: [[TMP8:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[TMP8]], 0
; CHECK-NEXT: br i1 [[TOBOOL]], label [[FOR_INC:%.*]], label [[IF_THEN:%.*]]
; CHECK: if.then:
; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, i32* [[INPUT]], i32 [[J_010]]
-; CHECK-NEXT: [[TMP5:%.*]] = load i32, i32* [[ARRAYIDX1]], align 4
-; CHECK-NEXT: [[ADD:%.*]] = add i32 [[TMP5]], [[TEMP_09]]
+; CHECK-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX1]], align 4
+; CHECK-NEXT: [[ADD:%.*]] = add i32 [[TMP9]], [[TEMP_09]]
; CHECK-NEXT: br label [[FOR_INC]]
; CHECK: for.inc:
; CHECK-NEXT: [[TEMP_1:%.*]] = phi i32 [ [[ADD]], [[IF_THEN]] ], [ [[TEMP_09]], [[FOR_BODY]] ]
; CHECK-NEXT: [[INC:%.*]] = add nuw nsw i32 [[J_010]], 1
; CHECK-NEXT: [[NITER_NSUB:%.*]] = sub i32 [[NITER]], 1
; CHECK-NEXT: [[ARRAYIDX_1:%.*]] = getelementptr inbounds i32, i32* [[CONDITION]], i32 [[INC]]
-; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARRAYIDX_1]], align 4
-; CHECK-NEXT: [[TOBOOL_1:%.*]] = icmp eq i32 [[TMP6]], 0
+; CHECK-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX_1]], align 4
+; CHECK-NEXT: [[TOBOOL_1:%.*]] = icmp eq i32 [[TMP10]], 0
; CHECK-NEXT: br i1 [[TOBOOL_1]], label [[FOR_INC_1:%.*]], label [[IF_THEN_1:%.*]]
-; CHECK: for.body.epil.1:
-; CHECK-NEXT: [[ARRAYIDX_EPIL_1:%.*]] = getelementptr inbounds i32, i32* [[CONDITION]], i32 [[INC_EPIL]]
-; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[ARRAYIDX_EPIL_1]], align 4
-; CHECK-NEXT: [[TOBOOL_EPIL_1:%.*]] = icmp eq i32 [[TMP7]], 0
-; CHECK-NEXT: br i1 [[TOBOOL_EPIL_1]], label [[FOR_INC_EPIL_1]], label [[IF_THEN_EPIL_1:%.*]]
-; CHECK: if.then.epil.1:
-; CHECK-NEXT: [[ARRAYIDX1_EPIL_1:%.*]] = getelementptr inbounds i32, i32* [[INPUT]], i32 [[INC_EPIL]]
-; CHECK-NEXT: [[TMP8:%.*]] = load i32, i32* [[ARRAYIDX1_EPIL_1]], align 4
-; CHECK-NEXT: [[ADD_EPIL_1:%.*]] = add i32 [[TMP8]], [[TEMP_1_EPIL]]
-; CHECK-NEXT: br label [[FOR_INC_EPIL_1]]
-; CHECK: for.inc.epil.1:
-; CHECK-NEXT: [[TEMP_1_EPIL_1]] = phi i32 [ [[ADD_EPIL_1]], [[IF_THEN_EPIL_1]] ], [ [[TEMP_1_EPIL]], [[FOR_BODY_EPIL_1]] ]
-; CHECK-NEXT: [[INC_EPIL_1:%.*]] = add nuw i32 [[INC_EPIL]], 1
-; CHECK-NEXT: [[EPIL_ITER_SUB_1:%.*]] = sub i32 [[EPIL_ITER_SUB]], 1
-; CHECK-NEXT: [[EPIL_ITER_CMP_1:%.*]] = icmp ne i32 [[EPIL_ITER_SUB_1]], 0
-; CHECK-NEXT: br i1 [[EPIL_ITER_CMP_1]], label [[FOR_BODY_EPIL_2:%.*]], label [[FOR_COND_CLEANUP_LOOPEXIT_EPILOG_LCSSA]]
-; CHECK: for.body.epil.2:
-; CHECK-NEXT: [[ARRAYIDX_EPIL_2:%.*]] = getelementptr inbounds i32, i32* [[CONDITION]], i32 [[INC_EPIL_1]]
-; CHECK-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX_EPIL_2]], align 4
-; CHECK-NEXT: [[TOBOOL_EPIL_2:%.*]] = icmp eq i32 [[TMP9]], 0
-; CHECK-NEXT: br i1 [[TOBOOL_EPIL_2]], label [[FOR_INC_EPIL_2]], label [[IF_THEN_EPIL_2:%.*]]
-; CHECK: if.then.epil.2:
-; CHECK-NEXT: [[ARRAYIDX1_EPIL_2:%.*]] = getelementptr inbounds i32, i32* [[INPUT]], i32 [[INC_EPIL_1]]
-; CHECK-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX1_EPIL_2]], align 4
-; CHECK-NEXT: [[ADD_EPIL_2:%.*]] = add i32 [[TMP10]], [[TEMP_1_EPIL_1]]
-; CHECK-NEXT: br label [[FOR_INC_EPIL_2]]
-; CHECK: for.inc.epil.2:
-; CHECK-NEXT: [[TEMP_1_EPIL_2]] = phi i32 [ [[ADD_EPIL_2]], [[IF_THEN_EPIL_2]] ], [ [[TEMP_1_EPIL_1]], [[FOR_BODY_EPIL_2]] ]
-; CHECK-NEXT: br label [[FOR_COND_CLEANUP_LOOPEXIT_EPILOG_LCSSA]]
; CHECK: if.then.1:
; CHECK-NEXT: [[ARRAYIDX1_1:%.*]] = getelementptr inbounds i32, i32* [[INPUT]], i32 [[INC]]
; CHECK-NEXT: [[TMP11:%.*]] = load i32, i32* [[ARRAYIDX1_1]], align 4
@@ -203,41 +203,34 @@ define void @test_two_exits(i32* nocapture %Output,
; CHECK-NEXT: [[INC:%.*]] = add nuw nsw i32 [[J_016]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[INC]], [[MAXJ]]
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY_1:%.*]], label [[CLEANUP_LOOPEXIT]]
-; CHECK: cleanup.loopexit:
-; CHECK-NEXT: [[TEMP_0_LCSSA_PH:%.*]] = phi i32 [ [[TEMP_0_ADD]], [[IF_END]] ], [ [[TEMP_015]], [[FOR_BODY]] ], [ [[TEMP_0_ADD]], [[FOR_BODY_1]] ], [ [[TEMP_0_ADD_1:%.*]], [[IF_END_1:%.*]] ], [ [[TEMP_0_ADD_1]], [[FOR_BODY_2:%.*]] ], [ [[TEMP_0_ADD_2:%.*]], [[IF_END_2:%.*]] ], [ [[TEMP_0_ADD_2]], [[FOR_BODY_3:%.*]] ], [ [[TEMP_0_ADD_3]], [[IF_END_3]] ]
-; CHECK-NEXT: br label [[CLEANUP]]
-; CHECK: cleanup:
-; CHECK-NEXT: [[TEMP_0_LCSSA:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TEMP_0_LCSSA_PH]], [[CLEANUP_LOOPEXIT]] ]
-; CHECK-NEXT: store i32 [[TEMP_0_LCSSA]], i32* [[OUTPUT:%.*]], align 4
-; CHECK-NEXT: ret void
; CHECK: for.body.1:
; CHECK-NEXT: [[ARRAYIDX_1:%.*]] = getelementptr inbounds i32, i32* [[INPUT]], i32 [[INC]]
; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARRAYIDX_1]], align 4
; CHECK-NEXT: [[CMP1_1:%.*]] = icmp ugt i32 [[TMP2]], 65535
-; CHECK-NEXT: br i1 [[CMP1_1]], label [[CLEANUP_LOOPEXIT]], label [[IF_END_1]]
+; CHECK-NEXT: br i1 [[CMP1_1]], label [[CLEANUP_LOOPEXIT]], label [[IF_END_1:%.*]]
; CHECK: if.end.1:
; CHECK-NEXT: [[ARRAYIDX2_1:%.*]] = getelementptr inbounds i32, i32* [[CONDITION]], i32 [[INC]]
; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[ARRAYIDX2_1]], align 4
; CHECK-NEXT: [[TOBOOL_1:%.*]] = icmp eq i32 [[TMP3]], 0
; CHECK-NEXT: [[ADD_1:%.*]] = select i1 [[TOBOOL_1]], i32 0, i32 [[TMP2]]
-; CHECK-NEXT: [[TEMP_0_ADD_1]] = add i32 [[ADD_1]], [[TEMP_0_ADD]]
+; CHECK-NEXT: [[TEMP_0_ADD_1:%.*]] = add i32 [[ADD_1]], [[TEMP_0_ADD]]
; CHECK-NEXT: [[INC_1:%.*]] = add nuw nsw i32 [[INC]], 1
; CHECK-NEXT: [[CMP_1:%.*]] = icmp ult i32 [[INC_1]], [[MAXJ]]
-; CHECK-NEXT: br i1 [[CMP_1]], label [[FOR_BODY_2]], label [[CLEANUP_LOOPEXIT]]
+; CHECK-NEXT: br i1 [[CMP_1]], label [[FOR_BODY_2:%.*]], label [[CLEANUP_LOOPEXIT]]
; CHECK: for.body.2:
; CHECK-NEXT: [[ARRAYIDX_2:%.*]] = getelementptr inbounds i32, i32* [[INPUT]], i32 [[INC_1]]
; CHECK-NEXT: [[TMP4:%.*]] = load i32, i32* [[ARRAYIDX_2]], align 4
; CHECK-NEXT: [[CMP1_2:%.*]] = icmp ugt i32 [[TMP4]], 65535
-; CHECK-NEXT: br i1 [[CMP1_2]], label [[CLEANUP_LOOPEXIT]], label [[IF_END_2]]
+; CHECK-NEXT: br i1 [[CMP1_2]], label [[CLEANUP_LOOPEXIT]], label [[IF_END_2:%.*]]
; CHECK: if.end.2:
; CHECK-NEXT: [[ARRAYIDX2_2:%.*]] = getelementptr inbounds i32, i32* [[CONDITION]], i32 [[INC_1]]
; CHECK-NEXT: [[TMP5:%.*]] = load i32, i32* [[ARRAYIDX2_2]], align 4
; CHECK-NEXT: [[TOBOOL_2:%.*]] = icmp eq i32 [[TMP5]], 0
; CHECK-NEXT: [[ADD_2:%.*]] = select i1 [[TOBOOL_2]], i32 0, i32 [[TMP4]]
-; CHECK-NEXT: [[TEMP_0_ADD_2]] = add i32 [[ADD_2]], [[TEMP_0_ADD_1]]
+; CHECK-NEXT: [[TEMP_0_ADD_2:%.*]] = add i32 [[ADD_2]], [[TEMP_0_ADD_1]]
; CHECK-NEXT: [[INC_2:%.*]] = add nuw nsw i32 [[INC_1]], 1
; CHECK-NEXT: [[CMP_2:%.*]] = icmp ult i32 [[INC_2]], [[MAXJ]]
-; CHECK-NEXT: br i1 [[CMP_2]], label [[FOR_BODY_3]], label [[CLEANUP_LOOPEXIT]]
+; CHECK-NEXT: br i1 [[CMP_2]], label [[FOR_BODY_3:%.*]], label [[CLEANUP_LOOPEXIT]]
; CHECK: for.body.3:
; CHECK-NEXT: [[ARRAYIDX_3:%.*]] = getelementptr inbounds i32, i32* [[INPUT]], i32 [[INC_2]]
; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARRAYIDX_3]], align 4
@@ -252,6 +245,13 @@ define void @test_two_exits(i32* nocapture %Output,
; CHECK-NEXT: [[INC_3]] = add nuw i32 [[INC_2]], 1
; CHECK-NEXT: [[CMP_3:%.*]] = icmp ult i32 [[INC_3]], [[MAXJ]]
; CHECK-NEXT: br i1 [[CMP_3]], label [[FOR_BODY]], label [[CLEANUP_LOOPEXIT]]
+; CHECK: cleanup.loopexit:
+; CHECK-NEXT: [[TEMP_0_LCSSA_PH:%.*]] = phi i32 [ [[TEMP_0_ADD]], [[IF_END]] ], [ [[TEMP_015]], [[FOR_BODY]] ], [ [[TEMP_0_ADD]], [[FOR_BODY_1]] ], [ [[TEMP_0_ADD_1]], [[IF_END_1]] ], [ [[TEMP_0_ADD_1]], [[FOR_BODY_2]] ], [ [[TEMP_0_ADD_2]], [[IF_END_2]] ], [ [[TEMP_0_ADD_2]], [[FOR_BODY_3]] ], [ [[TEMP_0_ADD_3]], [[IF_END_3]] ]
+; CHECK-NEXT: br label [[CLEANUP]]
+; CHECK: cleanup:
+; CHECK-NEXT: [[TEMP_0_LCSSA:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TEMP_0_LCSSA_PH]], [[CLEANUP_LOOPEXIT]] ]
+; CHECK-NEXT: store i32 [[TEMP_0_LCSSA]], i32* [[OUTPUT:%.*]], align 4
+; CHECK-NEXT: ret void
;
i32* nocapture readonly %Condition,
i32* nocapture readonly %Input,
@@ -417,100 +417,100 @@ define void @test_four_blocks(i32* nocapture %Output,
; CHECK-NEXT: [[EPIL_ITER_SUB:%.*]] = sub i32 [[XTRAITER]], 1
; CHECK-NEXT: [[EPIL_ITER_CMP:%.*]] = icmp ne i32 [[EPIL_ITER_SUB]], 0
; CHECK-NEXT: br i1 [[EPIL_ITER_CMP]], label [[FOR_BODY_EPIL_1:%.*]], label [[FOR_COND_CLEANUP_LOOPEXIT_EPILOG_LCSSA:%.*]]
-; CHECK: for.cond.cleanup.loopexit.epilog-lcssa:
-; CHECK-NEXT: [[TEMP_1_LCSSA_PH1:%.*]] = phi i32 [ [[TEMP_1_EPIL]], [[FOR_INC_EPIL]] ], [ [[TEMP_1_EPIL_1:%.*]], [[FOR_INC_EPIL_1:%.*]] ], [ [[TEMP_1_EPIL_2:%.*]], [[FOR_INC_EPIL_2:%.*]] ]
-; CHECK-NEXT: br label [[FOR_COND_CLEANUP_LOOPEXIT]]
-; CHECK: for.cond.cleanup.loopexit:
-; CHECK-NEXT: [[TEMP_1_LCSSA:%.*]] = phi i32 [ [[TEMP_1_LCSSA_PH]], [[FOR_COND_CLEANUP_LOOPEXIT_UNR_LCSSA]] ], [ [[TEMP_1_LCSSA_PH1]], [[FOR_COND_CLEANUP_LOOPEXIT_EPILOG_LCSSA]] ]
-; CHECK-NEXT: br label [[FOR_COND_CLEANUP]]
-; CHECK: for.cond.cleanup:
-; CHECK-NEXT: [[TEMP_0_LCSSA:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TEMP_1_LCSSA]], [[FOR_COND_CLEANUP_LOOPEXIT]] ]
-; CHECK-NEXT: store i32 [[TEMP_0_LCSSA]], i32* [[OUTPUT:%.*]], align 4
-; CHECK-NEXT: ret void
-; CHECK: for.body:
-; CHECK-NEXT: [[TMP6:%.*]] = phi i32 [ [[DOTPRE]], [[FOR_BODY_LR_PH_NEW]] ], [ [[TMP23]], [[FOR_INC_3]] ]
-; CHECK-NEXT: [[J_027:%.*]] = phi i32 [ 1, [[FOR_BODY_LR_PH_NEW]] ], [ [[INC_3]], [[FOR_INC_3]] ]
-; CHECK-NEXT: [[TEMP_026:%.*]] = phi i32 [ 0, [[FOR_BODY_LR_PH_NEW]] ], [ [[TEMP_1_3]], [[FOR_INC_3]] ]
-; CHECK-NEXT: [[NITER:%.*]] = phi i32 [ [[UNROLL_ITER]], [[FOR_BODY_LR_PH_NEW]] ], [ [[NITER_NSUB_3:%.*]], [[FOR_INC_3]] ]
-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[CONDITION]], i32 [[J_027]]
-; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
-; CHECK-NEXT: [[CMP1:%.*]] = icmp ugt i32 [[TMP7]], 65535
-; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, i32* [[INPUT]], i32 [[J_027]]
-; CHECK-NEXT: [[TMP8:%.*]] = load i32, i32* [[ARRAYIDX2]], align 4
-; CHECK-NEXT: [[CMP4:%.*]] = icmp ugt i32 [[TMP8]], [[TMP6]]
-; CHECK-NEXT: br i1 [[CMP1]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
-; CHECK: if.then:
-; CHECK-NEXT: [[COND:%.*]] = zext i1 [[CMP4]] to i32
-; CHECK-NEXT: [[ADD:%.*]] = add i32 [[TEMP_026]], [[COND]]
-; CHECK-NEXT: br label [[FOR_INC:%.*]]
-; CHECK: if.else:
-; CHECK-NEXT: [[NOT_CMP4:%.*]] = xor i1 [[CMP4]], true
-; CHECK-NEXT: [[SUB:%.*]] = sext i1 [[NOT_CMP4]] to i32
-; CHECK-NEXT: [[SUB10_SINK:%.*]] = add i32 [[J_027]], [[SUB]]
-; CHECK-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds i32, i32* [[INPUT]], i32 [[SUB10_SINK]]
-; CHECK-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX11]], align 4
-; CHECK-NEXT: [[SUB13:%.*]] = sub i32 [[TEMP_026]], [[TMP9]]
-; CHECK-NEXT: br label [[FOR_INC]]
-; CHECK: for.inc:
-; CHECK-NEXT: [[TEMP_1:%.*]] = phi i32 [ [[ADD]], [[IF_THEN]] ], [ [[SUB13]], [[IF_ELSE]] ]
-; CHECK-NEXT: [[INC:%.*]] = add nuw nsw i32 [[J_027]], 1
-; CHECK-NEXT: [[NITER_NSUB:%.*]] = sub i32 [[NITER]], 1
-; CHECK-NEXT: [[ARRAYIDX_1:%.*]] = getelementptr inbounds i32, i32* [[CONDITION]], i32 [[INC]]
-; CHECK-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX_1]], align 4
-; CHECK-NEXT: [[CMP1_1:%.*]] = icmp ugt i32 [[TMP10]], 65535
-; CHECK-NEXT: [[ARRAYIDX2_1:%.*]] = getelementptr inbounds i32, i32* [[INPUT]], i32 [[INC]]
-; CHECK-NEXT: [[TMP11:%.*]] = load i32, i32* [[ARRAYIDX2_1]], align 4
-; CHECK-NEXT: [[CMP4_1:%.*]] = icmp ugt i32 [[TMP11]], [[TMP8]]
-; CHECK-NEXT: br i1 [[CMP1_1]], label [[IF_THEN_1:%.*]], label [[IF_ELSE_1:%.*]]
; CHECK: for.body.epil.1:
; CHECK-NEXT: [[ARRAYIDX_EPIL_1:%.*]] = getelementptr inbounds i32, i32* [[CONDITION]], i32 [[INC_EPIL]]
-; CHECK-NEXT: [[TMP12:%.*]] = load i32, i32* [[ARRAYIDX_EPIL_1]], align 4
-; CHECK-NEXT: [[CMP1_EPIL_1:%.*]] = icmp ugt i32 [[TMP12]], 65535
+; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARRAYIDX_EPIL_1]], align 4
+; CHECK-NEXT: [[CMP1_EPIL_1:%.*]] = icmp ugt i32 [[TMP6]], 65535
; CHECK-NEXT: [[ARRAYIDX2_EPIL_1:%.*]] = getelementptr inbounds i32, i32* [[INPUT]], i32 [[INC_EPIL]]
-; CHECK-NEXT: [[TMP13:%.*]] = load i32, i32* [[ARRAYIDX2_EPIL_1]], align 4
-; CHECK-NEXT: [[CMP4_EPIL_1:%.*]] = icmp ugt i32 [[TMP13]], [[TMP4]]
+; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[ARRAYIDX2_EPIL_1]], align 4
+; CHECK-NEXT: [[CMP4_EPIL_1:%.*]] = icmp ugt i32 [[TMP7]], [[TMP4]]
; CHECK-NEXT: br i1 [[CMP1_EPIL_1]], label [[IF_THEN_EPIL_1:%.*]], label [[IF_ELSE_EPIL_1:%.*]]
; CHECK: if.else.epil.1:
; CHECK-NEXT: [[NOT_CMP4_EPIL_1:%.*]] = xor i1 [[CMP4_EPIL_1]], true
; CHECK-NEXT: [[SUB_EPIL_1:%.*]] = sext i1 [[NOT_CMP4_EPIL_1]] to i32
; CHECK-NEXT: [[SUB10_SINK_EPIL_1:%.*]] = add i32 [[INC_EPIL]], [[SUB_EPIL_1]]
; CHECK-NEXT: [[ARRAYIDX11_EPIL_1:%.*]] = getelementptr inbounds i32, i32* [[INPUT]], i32 [[SUB10_SINK_EPIL_1]]
-; CHECK-NEXT: [[TMP14:%.*]] = load i32, i32* [[ARRAYIDX11_EPIL_1]], align 4
-; CHECK-NEXT: [[SUB13_EPIL_1:%.*]] = sub i32 [[TEMP_1_EPIL]], [[TMP14]]
-; CHECK-NEXT: br label [[FOR_INC_EPIL_1]]
+; CHECK-NEXT: [[TMP8:%.*]] = load i32, i32* [[ARRAYIDX11_EPIL_1]], align 4
+; CHECK-NEXT: [[SUB13_EPIL_1:%.*]] = sub i32 [[TEMP_1_EPIL]], [[TMP8]]
+; CHECK-NEXT: br label [[FOR_INC_EPIL_1:%.*]]
; CHECK: if.then.epil.1:
; CHECK-NEXT: [[COND_EPIL_1:%.*]] = zext i1 [[CMP4_EPIL_1]] to i32
; CHECK-NEXT: [[ADD_EPIL_1:%.*]] = add i32 [[TEMP_1_EPIL]], [[COND_EPIL_1]]
; CHECK-NEXT: br label [[FOR_INC_EPIL_1]]
; CHECK: for.inc.epil.1:
-; CHECK-NEXT: [[TEMP_1_EPIL_1]] = phi i32 [ [[ADD_EPIL_1]], [[IF_THEN_EPIL_1]] ], [ [[SUB13_EPIL_1]], [[IF_ELSE_EPIL_1]] ]
+; CHECK-NEXT: [[TEMP_1_EPIL_1:%.*]] = phi i32 [ [[ADD_EPIL_1]], [[IF_THEN_EPIL_1]] ], [ [[SUB13_EPIL_1]], [[IF_ELSE_EPIL_1]] ]
; CHECK-NEXT: [[INC_EPIL_1:%.*]] = add nuw i32 [[INC_EPIL]], 1
; CHECK-NEXT: [[EPIL_ITER_SUB_1:%.*]] = sub i32 [[EPIL_ITER_SUB]], 1
; CHECK-NEXT: [[EPIL_ITER_CMP_1:%.*]] = icmp ne i32 [[EPIL_ITER_SUB_1]], 0
; CHECK-NEXT: br i1 [[EPIL_ITER_CMP_1]], label [[FOR_BODY_EPIL_2:%.*]], label [[FOR_COND_CLEANUP_LOOPEXIT_EPILOG_LCSSA]]
; CHECK: for.body.epil.2:
; CHECK-NEXT: [[ARRAYIDX_EPIL_2:%.*]] = getelementptr inbounds i32, i32* [[CONDITION]], i32 [[INC_EPIL_1]]
-; CHECK-NEXT: [[TMP15:%.*]] = load i32, i32* [[ARRAYIDX_EPIL_2]], align 4
-; CHECK-NEXT: [[CMP1_EPIL_2:%.*]] = icmp ugt i32 [[TMP15]], 65535
+; CHECK-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX_EPIL_2]], align 4
+; CHECK-NEXT: [[CMP1_EPIL_2:%.*]] = icmp ugt i32 [[TMP9]], 65535
; CHECK-NEXT: [[ARRAYIDX2_EPIL_2:%.*]] = getelementptr inbounds i32, i32* [[INPUT]], i32 [[INC_EPIL_1]]
-; CHECK-NEXT: [[TMP16:%.*]] = load i32, i32* [[ARRAYIDX2_EPIL_2]], align 4
-; CHECK-NEXT: [[CMP4_EPIL_2:%.*]] = icmp ugt i32 [[TMP16]], [[TMP13]]
+; CHECK-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX2_EPIL_2]], align 4
+; CHECK-NEXT: [[CMP4_EPIL_2:%.*]] = icmp ugt i32 [[TMP10]], [[TMP7]]
; CHECK-NEXT: br i1 [[CMP1_EPIL_2]], label [[IF_THEN_EPIL_2:%.*]], label [[IF_ELSE_EPIL_2:%.*]]
; CHECK: if.else.epil.2:
; CHECK-NEXT: [[NOT_CMP4_EPIL_2:%.*]] = xor i1 [[CMP4_EPIL_2]], true
; CHECK-NEXT: [[SUB_EPIL_2:%.*]] = sext i1 [[NOT_CMP4_EPIL_2]] to i32
; CHECK-NEXT: [[SUB10_SINK_EPIL_2:%.*]] = add i32 [[INC_EPIL_1]], [[SUB_EPIL_2]]
; CHECK-NEXT: [[ARRAYIDX11_EPIL_2:%.*]] = getelementptr inbounds i32, i32* [[INPUT]], i32 [[SUB10_SINK_EPIL_2]]
-; CHECK-NEXT: [[TMP17:%.*]] = load i32, i32* [[ARRAYIDX11_EPIL_2]], align 4
-; CHECK-NEXT: [[SUB13_EPIL_2:%.*]] = sub i32 [[TEMP_1_EPIL_1]], [[TMP17]]
-; CHECK-NEXT: br label [[FOR_INC_EPIL_2]]
+; CHECK-NEXT: [[TMP11:%.*]] = load i32, i32* [[ARRAYIDX11_EPIL_2]], align 4
+; CHECK-NEXT: [[SUB13_EPIL_2:%.*]] = sub i32 [[TEMP_1_EPIL_1]], [[TMP11]]
+; CHECK-NEXT: br label [[FOR_INC_EPIL_2:%.*]]
; CHECK: if.then.epil.2:
; CHECK-NEXT: [[COND_EPIL_2:%.*]] = zext i1 [[CMP4_EPIL_2]] to i32
; CHECK-NEXT: [[ADD_EPIL_2:%.*]] = add i32 [[TEMP_1_EPIL_1]], [[COND_EPIL_2]]
; CHECK-NEXT: br label [[FOR_INC_EPIL_2]]
; CHECK: for.inc.epil.2:
-; CHECK-NEXT: [[TEMP_1_EPIL_2]] = phi i32 [ [[ADD_EPIL_2]], [[IF_THEN_EPIL_2]] ], [ [[SUB13_EPIL_2]], [[IF_ELSE_EPIL_2]] ]
+; CHECK-NEXT: [[TEMP_1_EPIL_2:%.*]] = phi i32 [ [[ADD_EPIL_2]], [[IF_THEN_EPIL_2]] ], [ [[SUB13_EPIL_2]], [[IF_ELSE_EPIL_2]] ]
; CHECK-NEXT: br label [[FOR_COND_CLEANUP_LOOPEXIT_EPILOG_LCSSA]]
+; CHECK: for.cond.cleanup.loopexit.epilog-lcssa:
+; CHECK-NEXT: [[TEMP_1_LCSSA_PH1:%.*]] = phi i32 [ [[TEMP_1_EPIL]], [[FOR_INC_EPIL]] ], [ [[TEMP_1_EPIL_1]], [[FOR_INC_EPIL_1]] ], [ [[TEMP_1_EPIL_2]], [[FOR_INC_EPIL_2]] ]
+; CHECK-NEXT: br label [[FOR_COND_CLEANUP_LOOPEXIT]]
+; CHECK: for.cond.cleanup.loopexit:
+; CHECK-NEXT: [[TEMP_1_LCSSA:%.*]] = phi i32 [ [[TEMP_1_LCSSA_PH]], [[FOR_COND_CLEANUP_LOOPEXIT_UNR_LCSSA]] ], [ [[TEMP_1_LCSSA_PH1]], [[FOR_COND_CLEANUP_LOOPEXIT_EPILOG_LCSSA]] ]
+; CHECK-NEXT: br label [[FOR_COND_CLEANUP]]
+; CHECK: for.cond.cleanup:
+; CHECK-NEXT: [[TEMP_0_LCSSA:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TEMP_1_LCSSA]], [[FOR_COND_CLEANUP_LOOPEXIT]] ]
+; CHECK-NEXT: store i32 [[TEMP_0_LCSSA]], i32* [[OUTPUT:%.*]], align 4
+; CHECK-NEXT: ret void
+; CHECK: for.body:
+; CHECK-NEXT: [[TMP12:%.*]] = phi i32 [ [[DOTPRE]], [[FOR_BODY_LR_PH_NEW]] ], [ [[TMP23]], [[FOR_INC_3]] ]
+; CHECK-NEXT: [[J_027:%.*]] = phi i32 [ 1, [[FOR_BODY_LR_PH_NEW]] ], [ [[INC_3]], [[FOR_INC_3]] ]
+; CHECK-NEXT: [[TEMP_026:%.*]] = phi i32 [ 0, [[FOR_BODY_LR_PH_NEW]] ], [ [[TEMP_1_3]], [[FOR_INC_3]] ]
+; CHECK-NEXT: [[NITER:%.*]] = phi i32 [ [[UNROLL_ITER]], [[FOR_BODY_LR_PH_NEW]] ], [ [[NITER_NSUB_3:%.*]], [[FOR_INC_3]] ]
+; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[CONDITION]], i32 [[J_027]]
+; CHECK-NEXT: [[TMP13:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ugt i32 [[TMP13]], 65535
+; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, i32* [[INPUT]], i32 [[J_027]]
+; CHECK-NEXT: [[TMP14:%.*]] = load i32, i32* [[ARRAYIDX2]], align 4
+; CHECK-NEXT: [[CMP4:%.*]] = icmp ugt i32 [[TMP14]], [[TMP12]]
+; CHECK-NEXT: br i1 [[CMP1]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
+; CHECK: if.then:
+; CHECK-NEXT: [[COND:%.*]] = zext i1 [[CMP4]] to i32
+; CHECK-NEXT: [[ADD:%.*]] = add i32 [[TEMP_026]], [[COND]]
+; CHECK-NEXT: br label [[FOR_INC:%.*]]
+; CHECK: if.else:
+; CHECK-NEXT: [[NOT_CMP4:%.*]] = xor i1 [[CMP4]], true
+; CHECK-NEXT: [[SUB:%.*]] = sext i1 [[NOT_CMP4]] to i32
+; CHECK-NEXT: [[SUB10_SINK:%.*]] = add i32 [[J_027]], [[SUB]]
+; CHECK-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds i32, i32* [[INPUT]], i32 [[SUB10_SINK]]
+; CHECK-NEXT: [[TMP15:%.*]] = load i32, i32* [[ARRAYIDX11]], align 4
+; CHECK-NEXT: [[SUB13:%.*]] = sub i32 [[TEMP_026]], [[TMP15]]
+; CHECK-NEXT: br label [[FOR_INC]]
+; CHECK: for.inc:
+; CHECK-NEXT: [[TEMP_1:%.*]] = phi i32 [ [[ADD]], [[IF_THEN]] ], [ [[SUB13]], [[IF_ELSE]] ]
+; CHECK-NEXT: [[INC:%.*]] = add nuw nsw i32 [[J_027]], 1
+; CHECK-NEXT: [[NITER_NSUB:%.*]] = sub i32 [[NITER]], 1
+; CHECK-NEXT: [[ARRAYIDX_1:%.*]] = getelementptr inbounds i32, i32* [[CONDITION]], i32 [[INC]]
+; CHECK-NEXT: [[TMP16:%.*]] = load i32, i32* [[ARRAYIDX_1]], align 4
+; CHECK-NEXT: [[CMP1_1:%.*]] = icmp ugt i32 [[TMP16]], 65535
+; CHECK-NEXT: [[ARRAYIDX2_1:%.*]] = getelementptr inbounds i32, i32* [[INPUT]], i32 [[INC]]
+; CHECK-NEXT: [[TMP17:%.*]] = load i32, i32* [[ARRAYIDX2_1]], align 4
+; CHECK-NEXT: [[CMP4_1:%.*]] = icmp ugt i32 [[TMP17]], [[TMP14]]
+; CHECK-NEXT: br i1 [[CMP1_1]], label [[IF_THEN_1:%.*]], label [[IF_ELSE_1:%.*]]
; CHECK: if.else.1:
; CHECK-NEXT: [[NOT_CMP4_1:%.*]] = xor i1 [[CMP4_1]], true
; CHECK-NEXT: [[SUB_1:%.*]] = sext i1 [[NOT_CMP4_1]] to i32
@@ -532,7 +532,7 @@ define void @test_four_blocks(i32* nocapture %Output,
; CHECK-NEXT: [[CMP1_2:%.*]] = icmp ugt i32 [[TMP19]], 65535
; CHECK-NEXT: [[ARRAYIDX2_2:%.*]] = getelementptr inbounds i32, i32* [[INPUT]], i32 [[INC_1]]
; CHECK-NEXT: [[TMP20:%.*]] = load i32, i32* [[ARRAYIDX2_2]], align 4
-; CHECK-NEXT: [[CMP4_2:%.*]] = icmp ugt i32 [[TMP20]], [[TMP11]]
+; CHECK-NEXT: [[CMP4_2:%.*]] = icmp ugt i32 [[TMP20]], [[TMP17]]
; CHECK-NEXT: br i1 [[CMP1_2]], label [[IF_THEN_2:%.*]], label [[IF_ELSE_2:%.*]]
; CHECK: if.else.2:
; CHECK-NEXT: [[NOT_CMP4_2:%.*]] = xor i1 [[CMP4_2]], true
@@ -742,10 +742,6 @@ define void @iterate_inc(%struct.Node* %n, i32 %limit) {
; CHECK-NEXT: [[TMP2:%.*]] = load %struct.Node*, %struct.Node** [[TMP1]], align 4
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq %struct.Node* [[TMP2]], null
; CHECK-NEXT: br i1 [[TOBOOL]], label [[WHILE_END_LOOPEXIT]], label [[LAND_RHS_1:%.*]]
-; CHECK: while.end.loopexit:
-; CHECK-NEXT: br label [[WHILE_END]]
-; CHECK: while.end:
-; CHECK-NEXT: ret void
; CHECK: land.rhs.1:
; CHECK-NEXT: [[VAL_1:%.*]] = getelementptr inbounds [[STRUCT_NODE]], %struct.Node* [[TMP2]], i32 0, i32 1
; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[VAL_1]], align 4
@@ -782,6 +778,10 @@ define void @iterate_inc(%struct.Node* %n, i32 %limit) {
; CHECK-NEXT: [[TMP11]] = load %struct.Node*, %struct.Node** [[TMP10]], align 4
; CHECK-NEXT: [[TOBOOL_3:%.*]] = icmp eq %struct.Node* [[TMP11]], null
; CHECK-NEXT: br i1 [[TOBOOL_3]], label [[WHILE_END_LOOPEXIT]], label [[LAND_RHS]]
+; CHECK: while.end.loopexit:
+; CHECK-NEXT: br label [[WHILE_END]]
+; CHECK: while.end:
+; CHECK-NEXT: ret void
;
entry:
%tobool5 = icmp eq %struct.Node* %n, null
diff --git a/llvm/test/Transforms/LoopUnroll/ARM/upperbound.ll b/llvm/test/Transforms/LoopUnroll/ARM/upperbound.ll
index ea18d3aa1054..33151c68b319 100644
--- a/llvm/test/Transforms/LoopUnroll/ARM/upperbound.ll
+++ b/llvm/test/Transforms/LoopUnroll/ARM/upperbound.ll
@@ -20,8 +20,6 @@ define void @test(i32* %x, i32 %n) {
; CHECK-NEXT: [[INCDEC_PTR:%.*]] = getelementptr inbounds i32, i32* [[X]], i64 1
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[REM]], 1
; CHECK-NEXT: br i1 [[CMP]], label [[WHILE_BODY_1:%.*]], label [[WHILE_END]]
-; CHECK: while.end:
-; CHECK-NEXT: ret void
; CHECK: while.body.1:
; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[INCDEC_PTR]], align 4
; CHECK-NEXT: [[CMP1_1:%.*]] = icmp slt i32 [[TMP1]], 10
@@ -40,6 +38,8 @@ define void @test(i32* %x, i32 %n) {
; CHECK: if.then.2:
; CHECK-NEXT: store i32 0, i32* [[INCDEC_PTR_1]], align 4
; CHECK-NEXT: br label [[WHILE_END]]
+; CHECK: while.end:
+; CHECK-NEXT: ret void
;
entry:
%sub = add nsw i32 %n, -1
@@ -76,9 +76,9 @@ define i32 @test2(i32 %l86) {
; CHECK-NEXT: [[L86_OFF:%.*]] = add i32 [[L86:%.*]], -1
; CHECK-NEXT: [[SWITCH:%.*]] = icmp ult i32 [[L86_OFF]], 24
; CHECK-NEXT: [[DOTNOT30:%.*]] = icmp ne i32 [[L86]], 25
-; CHECK-NEXT: [[SPEC_SELECT24:%.*]] = zext i1 [[DOTNOT30]] to i32
-; CHECK-NEXT: [[COMMON_RET31_OP:%.*]] = select i1 [[SWITCH]], i32 0, i32 [[SPEC_SELECT24]]
-; CHECK-NEXT: ret i32 [[COMMON_RET31_OP]]
+; CHECK-NEXT: [[SPEC_SELECT:%.*]] = zext i1 [[DOTNOT30]] to i32
+; CHECK-NEXT: [[COMMON_RET_OP:%.*]] = select i1 [[SWITCH]], i32 0, i32 [[SPEC_SELECT]]
+; CHECK-NEXT: ret i32 [[COMMON_RET_OP]]
;
entry:
br label %for.body.i.i
diff --git a/llvm/test/Transforms/LoopUnroll/full-unroll-keep-first-exit.ll b/llvm/test/Transforms/LoopUnroll/full-unroll-keep-first-exit.ll
index 316051715584..cdc8e944715e 100644
--- a/llvm/test/Transforms/LoopUnroll/full-unroll-keep-first-exit.ll
+++ b/llvm/test/Transforms/LoopUnroll/full-unroll-keep-first-exit.ll
@@ -15,12 +15,12 @@ define void @s32_max1(i32 %n, i32* %p) {
; CHECK-NEXT: [[INC:%.*]] = add i32 [[N]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[N]], [[ADD]]
; CHECK-NEXT: br i1 [[CMP]], label [[DO_BODY_1:%.*]], label [[DO_END:%.*]]
-; CHECK: do.end:
-; CHECK-NEXT: ret void
; CHECK: do.body.1:
; CHECK-NEXT: [[ARRAYIDX_1:%.*]] = getelementptr i32, i32* [[P]], i32 [[INC]]
; CHECK-NEXT: store i32 [[INC]], i32* [[ARRAYIDX_1]], align 4
; CHECK-NEXT: br label [[DO_END]]
+; CHECK: do.end:
+; CHECK-NEXT: ret void
;
entry:
%add = add i32 %n, 1
@@ -51,8 +51,6 @@ define void @s32_max2(i32 %n, i32* %p) {
; CHECK-NEXT: [[INC:%.*]] = add i32 [[N]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[N]], [[ADD]]
; CHECK-NEXT: br i1 [[CMP]], label [[DO_BODY_1:%.*]], label [[DO_END:%.*]]
-; CHECK: do.end:
-; CHECK-NEXT: ret void
; CHECK: do.body.1:
; CHECK-NEXT: [[ARRAYIDX_1:%.*]] = getelementptr i32, i32* [[P]], i32 [[INC]]
; CHECK-NEXT: store i32 [[INC]], i32* [[ARRAYIDX_1]], align 4
@@ -60,6 +58,8 @@ define void @s32_max2(i32 %n, i32* %p) {
; CHECK-NEXT: [[ARRAYIDX_2:%.*]] = getelementptr i32, i32* [[P]], i32 [[INC_1]]
; CHECK-NEXT: store i32 [[INC_1]], i32* [[ARRAYIDX_2]], align 4
; CHECK-NEXT: br label [[DO_END]]
+; CHECK: do.end:
+; CHECK-NEXT: ret void
;
entry:
%add = add i32 %n, 2
@@ -163,12 +163,12 @@ define void @u32_max1(i32 %n, i32* %p) {
; CHECK-NEXT: [[INC:%.*]] = add i32 [[N]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[N]], [[ADD]]
; CHECK-NEXT: br i1 [[CMP]], label [[DO_BODY_1:%.*]], label [[DO_END:%.*]]
-; CHECK: do.end:
-; CHECK-NEXT: ret void
; CHECK: do.body.1:
; CHECK-NEXT: [[ARRAYIDX_1:%.*]] = getelementptr i32, i32* [[P]], i32 [[INC]]
; CHECK-NEXT: store i32 [[INC]], i32* [[ARRAYIDX_1]], align 4
; CHECK-NEXT: br label [[DO_END]]
+; CHECK: do.end:
+; CHECK-NEXT: ret void
;
entry:
%add = add i32 %n, 1
@@ -199,8 +199,6 @@ define void @u32_max2(i32 %n, i32* %p) {
; CHECK-NEXT: [[INC:%.*]] = add i32 [[N]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[N]], [[ADD]]
; CHECK-NEXT: br i1 [[CMP]], label [[DO_BODY_1:%.*]], label [[DO_END:%.*]]
-; CHECK: do.end:
-; CHECK-NEXT: ret void
; CHECK: do.body.1:
; CHECK-NEXT: [[ARRAYIDX_1:%.*]] = getelementptr i32, i32* [[P]], i32 [[INC]]
; CHECK-NEXT: store i32 [[INC]], i32* [[ARRAYIDX_1]], align 4
@@ -208,6 +206,8 @@ define void @u32_max2(i32 %n, i32* %p) {
; CHECK-NEXT: [[ARRAYIDX_2:%.*]] = getelementptr i32, i32* [[P]], i32 [[INC_1]]
; CHECK-NEXT: store i32 [[INC_1]], i32* [[ARRAYIDX_2]], align 4
; CHECK-NEXT: br label [[DO_END]]
+; CHECK: do.end:
+; CHECK-NEXT: ret void
;
entry:
%add = add i32 %n, 2
diff --git a/llvm/test/Transforms/LoopUnroll/full-unroll-one-unpredictable-exit.ll b/llvm/test/Transforms/LoopUnroll/full-unroll-one-unpredictable-exit.ll
index 095a7c1e1dd1..b7d7e00fa0c9 100644
--- a/llvm/test/Transforms/LoopUnroll/full-unroll-one-unpredictable-exit.ll
+++ b/llvm/test/Transforms/LoopUnroll/full-unroll-one-unpredictable-exit.ll
@@ -34,11 +34,11 @@ define i1 @test_latch() {
; CHECK-NEXT: [[LOAD2_1:%.*]] = load i64, i64* [[GEP2_1]], align 8
; CHECK-NEXT: [[EXITCOND2_1:%.*]] = icmp eq i64 [[LOAD1_1]], [[LOAD2_1]]
; CHECK-NEXT: br i1 [[EXITCOND2_1]], label [[LATCH_1:%.*]], label [[EXIT]]
+; CHECK: latch.1:
+; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
; CHECK-NEXT: [[EXIT_VAL:%.*]] = phi i1 [ false, [[LOOP]] ], [ false, [[LATCH]] ], [ true, [[LATCH_1]] ]
; CHECK-NEXT: ret i1 [[EXIT_VAL]]
-; CHECK: latch.1:
-; CHECK-NEXT: br label [[EXIT]]
;
start:
%a1 = alloca [2 x i64], align 8
@@ -95,22 +95,22 @@ define i1 @test_non_latch() {
; CHECK-NEXT: [[LOAD2:%.*]] = load i64, i64* [[GEP2]], align 8
; CHECK-NEXT: [[EXITCOND2:%.*]] = icmp eq i64 [[LOAD1]], [[LOAD2]]
; CHECK-NEXT: br i1 [[EXITCOND2]], label [[LOOP_1:%.*]], label [[EXIT:%.*]]
-; CHECK: exit:
-; CHECK-NEXT: [[EXIT_VAL:%.*]] = phi i1 [ false, [[LATCH]] ], [ false, [[LATCH_1:%.*]] ], [ true, [[LOOP_2:%.*]] ], [ false, [[LATCH_2:%.*]] ]
-; CHECK-NEXT: ret i1 [[EXIT_VAL]]
; CHECK: loop.1:
-; CHECK-NEXT: br label [[LATCH_1]]
+; CHECK-NEXT: br label [[LATCH_1:%.*]]
; CHECK: latch.1:
; CHECK-NEXT: [[GEP1_1:%.*]] = getelementptr inbounds [2 x i64], [2 x i64]* [[A1]], i64 0, i64 1
; CHECK-NEXT: [[GEP2_1:%.*]] = getelementptr inbounds [2 x i64], [2 x i64]* [[A2]], i64 0, i64 1
; CHECK-NEXT: [[LOAD1_1:%.*]] = load i64, i64* [[GEP1_1]], align 8
; CHECK-NEXT: [[LOAD2_1:%.*]] = load i64, i64* [[GEP2_1]], align 8
; CHECK-NEXT: [[EXITCOND2_1:%.*]] = icmp eq i64 [[LOAD1_1]], [[LOAD2_1]]
-; CHECK-NEXT: br i1 [[EXITCOND2_1]], label [[LOOP_2]], label [[EXIT]]
+; CHECK-NEXT: br i1 [[EXITCOND2_1]], label [[LOOP_2:%.*]], label [[EXIT]]
; CHECK: loop.2:
-; CHECK-NEXT: br i1 true, label [[EXIT]], label [[LATCH_2]]
+; CHECK-NEXT: br i1 true, label [[EXIT]], label [[LATCH_2:%.*]]
; CHECK: latch.2:
; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[EXIT_VAL:%.*]] = phi i1 [ false, [[LATCH]] ], [ false, [[LATCH_1]] ], [ true, [[LOOP_2]] ], [ false, [[LATCH_2]] ]
+; CHECK-NEXT: ret i1 [[EXIT_VAL]]
;
start:
%a1 = alloca [2 x i64], align 8
diff --git a/llvm/test/Transforms/LoopUnroll/multiple-exits.ll b/llvm/test/Transforms/LoopUnroll/multiple-exits.ll
index 0bea86350b99..9f40f51c10e6 100644
--- a/llvm/test/Transforms/LoopUnroll/multiple-exits.ll
+++ b/llvm/test/Transforms/LoopUnroll/multiple-exits.ll
@@ -14,8 +14,6 @@ define void @test1() {
; CHECK-NEXT: call void @bar()
; CHECK-NEXT: call void @bar()
; CHECK-NEXT: br label [[LATCH_1:%.*]]
-; CHECK: exit:
-; CHECK-NEXT: ret void
; CHECK: latch.1:
</cut>
3 years, 7 months
- 1
- 0
[TCWG CI] 482.sphinx3 slowed down by 6% after llvm: Making the code compliant to the documentation about Floating Point support default values for C/C++. FPP-MODEL=PRECISE enables FFP-CONTRACT(FMA is enabled).
by ci_notify＠linaro.org
After llvm commit f04e387055e495e3e14570087d68e93593cf2918
Author: Zahira Ammarguellat <zahira.ammarguellat(a)intel.com>
Making the code compliant to the documentation about Floating Point
support default values for C/C++. FPP-MODEL=PRECISE enables
FFP-CONTRACT(FMA is enabled).
the following benchmarks slowed down by more than 2%:
- 482.sphinx3 slowed down by 6% from 25875 to 27484 perf samples
- 482.sphinx3:[.] mgau_eval slowed down by 12% from 9996 to 11165 perf samples
Below reproducer instructions can be used to re-build both "first_bad" and "last_good" cross-toolchains used in this bisection. Naturally, the scripts will fail when triggerring benchmarking jobs if you don't have access to Linaro TCWG CI.
For your convenience, we have uploaded tarballs with pre-processed source and assembly files at:
- First_bad save-temps: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-…
- Last_good save-temps: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-…
- Baseline save-temps: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-…
Configuration:
- Benchmark: SPEC CPU2006
- Toolchain: Clang + Glibc + LLVM Linker
- Version: all components were built from their tip of trunk
- Target: aarch64-linux-gnu
- Compiler flags: -O2
- Hardware: NVidia TX1 4x Cortex-A57
This benchmarking CI is work-in-progress, and we welcome feedback and suggestions at linaro-toolchain(a)lists.linaro.org . In our improvement plans is to add support for SPEC CPU2017 benchmarks and provide "perf report/annotate" data behind these reports.
THIS IS THE END OF INTERESTING STUFF. BELOW ARE LINKS TO BUILDS, REPRODUCTION INSTRUCTIONS, AND THE RAW COMMIT.
This commit has regressed these CI configurations:
- tcwg_bmk_llvm_tx1/llvm-master-aarch64-spec2k6-O2
First_bad build: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-…
Last_good build: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-…
Baseline build: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-…
Even more details: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-…
Reproduce builds:
<cut>
mkdir investigate-llvm-f04e387055e495e3e14570087d68e93593cf2918
cd investigate-llvm-f04e387055e495e3e14570087d68e93593cf2918
# Fetch scripts
git clone https://git.linaro.org/toolchain/jenkins-scripts
# Fetch manifests and test.sh script
mkdir -p artifacts/manifests
curl -o artifacts/manifests/build-baseline.sh https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-… --fail
curl -o artifacts/manifests/build-parameters.sh https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-… --fail
curl -o artifacts/test.sh https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-… --fail
chmod +x artifacts/test.sh
# Reproduce the baseline build (build all pre-requisites)
./jenkins-scripts/tcwg_bmk-build.sh @@ artifacts/manifests/build-baseline.sh
# Save baseline build state (which is then restored in artifacts/test.sh)
mkdir -p ./bisect
rsync -a --del --delete-excluded --exclude /bisect/ --exclude /artifacts/ --exclude /llvm/ ./ ./bisect/baseline/
cd llvm
# Reproduce first_bad build
git checkout --detach f04e387055e495e3e14570087d68e93593cf2918
../artifacts/test.sh
# Reproduce last_good build
git checkout --detach 491beae71d69960a3bb0298b17d4ef1f3119b767
../artifacts/test.sh
cd ..
</cut>
Full commit (up to 1000 lines):
<cut>
commit f04e387055e495e3e14570087d68e93593cf2918
Author: Zahira Ammarguellat <zahira.ammarguellat(a)intel.com>
Date: Tue Nov 9 09:35:25 2021 -0500
Making the code compliant to the documentation about Floating Point
support default values for C/C++. FPP-MODEL=PRECISE enables
FFP-CONTRACT(FMA is enabled).
Fix for https://bugs.llvm.org/show_bug.cgi?id=50222
---
clang/docs/ReleaseNotes.rst | 10 +++
clang/docs/UsersManual.rst | 47 +++++++++++-
clang/lib/Driver/ToolChains/Clang.cpp | 48 +++++++-----
clang/test/CodeGen/ffp-contract-option.c | 127 +++++++++++++++++++++++++++++--
clang/test/CodeGen/ffp-model.c | 48 ++++++++++++
clang/test/CodeGen/ppc-emmintrin.c | 4 +-
clang/test/CodeGen/ppc-xmmintrin.c | 4 +-
clang/test/Driver/fp-model.c | 2 +-
clang/test/Misc/ffp-contract.c | 10 +++
9 files changed, 263 insertions(+), 37 deletions(-)
diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index 57c5150becae..00582b689862 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -202,6 +202,16 @@ Arm and AArch64 Support in Clang
architecture features, but will enable certain optimizations specific to
Cortex-A57 CPUs and enable the use of a more accurate scheduling model.
+
+Floating Point Support in Clang
+-------------------------------
+- The -ffp-model=precise now implies -ffp-contract=on rather than
+ -ffp-contract=fast, and the documentation of these features has been
+ clarified. Previously, the documentation claimed that -ffp-model=precise was
+ the default, but this was incorrect because the precise model implied
+ -ffp-contract=fast, whereas the default behavior is -ffp-contract=on.
+ -ffp-model=precise is now exactly the default mode of the compiler.
+
Internal API Changes
--------------------
diff --git a/clang/docs/UsersManual.rst b/clang/docs/UsersManual.rst
index 8c6922db6b37..406efb093d55 100644
--- a/clang/docs/UsersManual.rst
+++ b/clang/docs/UsersManual.rst
@@ -1260,8 +1260,49 @@ installed.
Controlling Floating Point Behavior
-----------------------------------
-Clang provides a number of ways to control floating point behavior. The options
-are listed below.
+Clang provides a number of ways to control floating point behavior, including
+with command line options and source pragmas. This section
+describes the various floating point semantic modes and the corresponding options.
+
+.. csv-table:: Floating Point Semantic Modes
+ :header: "Mode", "Values"
+ :widths: 15, 30, 30
+
+ "ffp-exception-behavior", "{ignore, strict, may_trap}",
+ "fenv_access", "{off, on}", "(none)"
+ "frounding-math", "{dynamic, tonearest, downward, upward, towardzero}"
+ "ffp-contract", "{on, off, fast, fast-honor-pragmas}"
+ "fdenormal-fp-math", "{IEEE, PreserveSign, PositiveZero}"
+ "fdenormal-fp-math-fp32", "{IEEE, PreserveSign, PositiveZero}"
+ "fmath-errno", "{on, off}"
+ "fhonor-nans", "{on, off}"
+ "fhonor-infinities", "{on, off}"
+ "fsigned-zeros", "{on, off}"
+ "freciprocal-math", "{on, off}"
+ "allow_approximate_fns", "{on, off}"
+ "fassociative-math", "{on, off}"
+
+This table describes the option settings that correspond to the three
+floating point semantic models: precise (the default), strict, and fast.
+
+
+.. csv-table:: Floating Point Models
+ :header: "Mode", "Precise", "Strict", "Fast"
+ :widths: 25, 15, 15, 15
+
+ "except_behavior", "ignore", "strict", "ignore"
+ "fenv_access", "off", "on", "off"
+ "rounding_mode", "tonearest", "dynamic", "tonearest"
+ "contract", "on", "off", "fast"
+ "denormal_fp_math", "IEEE", "IEEE", "PreserveSign"
+ "denormal_fp32_math", "IEEE","IEEE", "PreserveSign"
+ "support_math_errno", "on", "on", "off"
+ "no_honor_nans", "off", "off", "on"
+ "no_honor_infinities", "off", "off", "on"
+ "no_signed_zeros", "off", "off", "on"
+ "allow_reciprocal", "off", "off", "on"
+ "allow_approximate_fns", "off", "off", "on"
+ "allow_reassociation", "off", "off", "on"
.. option:: -ffast-math
@@ -1467,7 +1508,7 @@ Note that floating-point operations performed as part of constant initialization
and ``fast``.
Details:
- * ``precise`` Disables optimizations that are not value-safe on floating-point data, although FP contraction (FMA) is enabled (``-ffp-contract=fast``). This is the default behavior.
+ * ``precise`` Disables optimizations that are not value-safe on floating-point data, although FP contraction (FMA) is enabled (``-ffp-contract=on``). This is the default behavior.
* ``strict`` Enables ``-frounding-math`` and ``-ffp-exception-behavior=strict``, and disables contractions (FMA). All of the ``-ffast-math`` enablements are disabled. Enables ``STDC FENV_ACCESS``: by default ``FENV_ACCESS`` is disabled. This option setting behaves as though ``#pragma STDC FENV_ACESS ON`` appeared at the top of the source file.
* ``fast`` Behaves identically to specifying both ``-ffast-math`` and ``ffp-contract=fast``
diff --git a/clang/lib/Driver/ToolChains/Clang.cpp b/clang/lib/Driver/ToolChains/Clang.cpp
index e8ad105a7829..5d6f8e9fba0e 100644
--- a/clang/lib/Driver/ToolChains/Clang.cpp
+++ b/clang/lib/Driver/ToolChains/Clang.cpp
@@ -2666,10 +2666,14 @@ static void RenderFloatingPointOptions(const ToolChain &TC, const Driver &D,
llvm::DenormalMode DenormalFPMath = DefaultDenormalFPMath;
llvm::DenormalMode DenormalFP32Math = DefaultDenormalFP32Math;
- StringRef FPContract = "";
+ // CUDA and HIP don't rely on the frontend to pass an ffp-contract option.
+ // If one wasn't given by the user, don't pass it here.
+ StringRef FPContract;
+ if (!JA.isDeviceOffloading(Action::OFK_Cuda) &&
+ !JA.isOffloading(Action::OFK_HIP))
+ FPContract = "on";
bool StrictFPModel = false;
-
if (const Arg *A = Args.getLastArg(options::OPT_flimited_precision_EQ)) {
CmdArgs.push_back("-mlimit-float-precision");
CmdArgs.push_back(A->getValue());
@@ -2691,7 +2695,7 @@ static void RenderFloatingPointOptions(const ToolChain &TC, const Driver &D,
ReciprocalMath = false;
SignedZeros = true;
// -fno_fast_math restores default denormal and fpcontract handling
- FPContract = "";
+ FPContract = "on";
DenormalFPMath = llvm::DenormalMode::getIEEE();
// FIXME: The target may have picked a non-IEEE default mode here based on
@@ -2711,12 +2715,10 @@ static void RenderFloatingPointOptions(const ToolChain &TC, const Driver &D,
// ffp-model= is a Driver option, it is entirely rewritten into more
// granular options before being passed into cc1.
// Use the gcc option in the switch below.
- if (!FPModel.empty() && !FPModel.equals(Val)) {
+ if (!FPModel.empty() && !FPModel.equals(Val))
D.Diag(clang::diag::warn_drv_overriding_flag_option)
- << Args.MakeArgString("-ffp-model=" + FPModel)
- << Args.MakeArgString("-ffp-model=" + Val);
- FPContract = "";
- }
+ << Args.MakeArgString("-ffp-model=" + FPModel)
+ << Args.MakeArgString("-ffp-model=" + Val);
if (Val.equals("fast")) {
optID = options::OPT_ffast_math;
FPModel = Val;
@@ -2724,7 +2726,7 @@ static void RenderFloatingPointOptions(const ToolChain &TC, const Driver &D,
} else if (Val.equals("precise")) {
optID = options::OPT_ffp_contract;
FPModel = Val;
- FPContract = "fast";
+ FPContract = "on";
PreciseFPModel = true;
} else if (Val.equals("strict")) {
StrictFPModel = true;
@@ -2812,9 +2814,9 @@ static void RenderFloatingPointOptions(const ToolChain &TC, const Driver &D,
case options::OPT_ffp_contract: {
StringRef Val = A->getValue();
if (PreciseFPModel) {
- // -ffp-model=precise enables ffp-contract=fast as a side effect
- // the FPContract value has already been set to a string literal
- // and the Val string isn't a pertinent value.
+ // -ffp-model=precise enables ffp-contract=on.
+ // -ffp-model=precise sets PreciseFPModel to on and Val to
+ // "precise". FPContract is set.
;
} else if (Val.equals("fast") || Val.equals("on") || Val.equals("off"))
FPContract = Val;
@@ -2907,23 +2909,27 @@ static void RenderFloatingPointOptions(const ToolChain &TC, const Driver &D,
AssociativeMath = false;
ReciprocalMath = false;
SignedZeros = true;
- TrappingMath = false;
- RoundingFPMath = false;
// -fno_fast_math restores default denormal and fpcontract handling
DenormalFPMath = DefaultDenormalFPMath;
DenormalFP32Math = llvm::DenormalMode::getIEEE();
- FPContract = "";
+ if (!JA.isDeviceOffloading(Action::OFK_Cuda) &&
+ !JA.isOffloading(Action::OFK_HIP))
+ if (FPContract == "fast") {
+ FPContract = "on";
+ D.Diag(clang::diag::warn_drv_overriding_flag_option)
+ << "-ffp-contract=fast"
+ << "-ffp-contract=on";
+ }
break;
}
if (StrictFPModel) {
// If -ffp-model=strict has been specified on command line but
// subsequent options conflict then emit warning diagnostic.
- if (HonorINFs && HonorNaNs &&
- !AssociativeMath && !ReciprocalMath &&
- SignedZeros && TrappingMath && RoundingFPMath &&
- (FPContract.equals("off") || FPContract.empty()) &&
- DenormalFPMath == llvm::DenormalMode::getIEEE() &&
- DenormalFP32Math == llvm::DenormalMode::getIEEE())
+ if (HonorINFs && HonorNaNs && !AssociativeMath && !ReciprocalMath &&
+ SignedZeros && TrappingMath && RoundingFPMath &&
+ DenormalFPMath == llvm::DenormalMode::getIEEE() &&
+ DenormalFP32Math == llvm::DenormalMode::getIEEE() &&
+ FPContract.equals("off"))
// OK: Current Arg doesn't conflict with -ffp-model=strict
;
else {
diff --git a/clang/test/CodeGen/ffp-contract-option.c b/clang/test/CodeGen/ffp-contract-option.c
index 52b750795940..857a9c2369ef 100644
--- a/clang/test/CodeGen/ffp-contract-option.c
+++ b/clang/test/CodeGen/ffp-contract-option.c
@@ -1,9 +1,120 @@
-// RUN: %clang_cc1 -O3 -ffp-contract=fast -triple=aarch64-apple-darwin -S -o - %s | FileCheck %s
-// REQUIRES: aarch64-registered-target
-
-float fma_test1(float a, float b, float c) {
-// CHECK: fmadd
- float x = a * b;
- float y = x + c;
- return y;
+// REQUIRES: x86-registered-target
+// RUN: %clang_cc1 -triple=x86_64 %s -emit-llvm -o - \
+// RUN:| FileCheck --check-prefixes CHECK,CHECK-DEFAULT %s
+
+// RUN: %clang_cc1 -triple=x86_64 -ffp-contract=off %s -emit-llvm -o - \
+// RUN:| FileCheck --check-prefixes CHECK,CHECK-DEFAULT %s
+
+// RUN: %clang_cc1 -triple=x86_64 -ffp-contract=on %s -emit-llvm -o - \
+// RUN:| FileCheck --check-prefixes CHECK,CHECK-ON %s
+
+// RUN: %clang_cc1 -triple=x86_64 -ffp-contract=fast %s -emit-llvm -o - \
+// RUN:| FileCheck --check-prefixes CHECK,CHECK-CONTRACTFAST %s
+
+// RUN: %clang_cc1 -triple=x86_64 -ffast-math %s -emit-llvm -o - \
+// RUN:| FileCheck --check-prefixes CHECK,CHECK-CONTRACTOFF %s
+
+// RUN: %clang_cc1 -triple=x86_64 -ffast-math -ffp-contract=off %s -emit-llvm \
+// RUN: -o - | FileCheck --check-prefixes CHECK,CHECK-CONTRACTOFF %s
+
+// RUN: %clang_cc1 -triple=x86_64 -ffast-math -ffp-contract=on %s -emit-llvm \
+// RUN: -o - | FileCheck --check-prefixes CHECK,CHECK-ONFAST %s
+
+// RUN: %clang_cc1 -triple=x86_64 -ffast-math -ffp-contract=fast %s -emit-llvm \
+// RUN: -o - | FileCheck --check-prefixes CHECK,CHECK-FASTFAST %s
+
+// RUN: %clang_cc1 -triple=x86_64 -ffp-contract=fast -ffast-math %s \
+// RUN: -emit-llvm \
+// RUN: -o - | FileCheck --check-prefixes CHECK,CHECK-FASTFAST %s
+
+// RUN: %clang_cc1 -triple=x86_64 -ffp-contract=off -fmath-errno \
+// RUN: -fno-rounding-math %s -emit-llvm -o - \
+// RUN: -o - | FileCheck --check-prefixes CHECK,CHECK-NOFAST %s
+
+// RUN: %clang -S -emit-llvm -fno-fast-math %s -o - \
+// RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-FPC-ON
+
+// RUN: %clang -S -emit-llvm -ffp-contract=fast -fno-fast-math \
+// RUN: %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-FPC-ON
+
+// RUN: %clang -S -emit-llvm -ffp-contract=on -fno-fast-math \
+// RUN: %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-FPC-ON
+
+// RUN: %clang -S -emit-llvm -ffp-contract=off -fno-fast-math \
+// RUN: %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-FPC-OFF
+
+// RUN: %clang -S -emit-llvm -ffp-model=fast -fno-fast-math \
+// RUN: %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-FPC-ON
+
+// RUN: %clang -S -emit-llvm -ffp-model=precise -fno-fast-math \
+// RUN: %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-FPC-ON
+
+// RUN: %clang -S -emit-llvm -ffp-model=strict -fno-fast-math \
+// RUN: -target x86_64 %s -o - | FileCheck %s \
+// RUN: --check-prefixes=CHECK,CHECK-FPSC-OFF
+
+// RUN: %clang -S -emit-llvm -ffast-math -fno-fast-math \
+// RUN: %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-FPC-ON
+
+float mymuladd(float x, float y, float z) {
+ // CHECK: define{{.*}} float @mymuladd
+ return x * y + z;
+ // expected-warning{{overriding '-ffp-contract=fast' option with '-ffp-contract=on'}}
+
+ // CHECK-DEFAULT: load float, float*
+ // CHECK-DEFAULT: fmul float
+ // CHECK-DEFAULT: load float, float*
+ // CHECK-DEFAULT: fadd float
+
+ // CHECK-ON: load float, float*
+ // CHECK-ON: load float, float*
+ // CHECK-ON: load float, float*
+ // CHECK-ON: call float @llvm.fmuladd.f32(float {{.*}}, float {{.*}}, float {{.*}})
+
+ // CHECK-CONTRACTFAST: load float, float*
+ // CHECK-CONTRACTFAST: load float, float*
+ // CHECK-CONTRACTFAST: fmul contract float
+ // CHECK-CONTRACTFAST: load float, float*
+ // CHECK-CONTRACTFAST: fadd contract float
+
+ // CHECK-CONTRACTOFF: load float, float*
+ // CHECK-CONTRACTOFF: load float, float*
+ // CHECK-CONTRACTOFF: fmul reassoc nnan ninf nsz arcp afn float
+ // CHECK-CONTRACTOFF: load float, float*
+ // CHECK-CONTRACTOFF: fadd reassoc nnan ninf nsz arcp afn float {{.*}}, {{.*}}
+
+ // CHECK-ONFAST: load float, float*
+ // CHECK-ONFAST: load float, float*
+ // CHECK-ONFAST: load float, float*
+ // CHECK-ONFAST: call reassoc nnan ninf nsz arcp afn float @llvm.fmuladd.f32(float {{.*}}, float {{.*}}, float {{.*}})
+
+ // CHECK-FASTFAST: load float, float*
+ // CHECK-FASTFAST: load float, float*
+ // CHECK-FASTFAST: fmul fast float
+ // CHECK-FASTFAST: load float, float*
+ // CHECK-FASTFAST: fadd fast float {{.*}}, {{.*}}
+
+ // CHECK-NOFAST: load float, float*
+ // CHECK-NOFAST: load float, float*
+ // CHECK-NOFAST: fmul float {{.*}}, {{.*}}
+ // CHECK-NOFAST: load float, float*
+ // CHECK-NOFAST: fadd float {{.*}}, {{.*}}
+
+ // CHECK-FPC-ON: load float, float*
+ // CHECK-FPC-ON: load float, float*
+ // CHECK-FPC-ON: load float, float*
+ // CHECK-FPC-ON: call float @llvm.fmuladd.f32(float {{.*}}, float {{.*}}, float {{.*}})
+
+ // CHECK-FPC-OFF: load float, float*
+ // CHECK-FPC-OFF: load float, float*
+ // CHECK-FPC-OFF: fmul float
+ // CHECK-FPC-OFF: load float, float*
+ // CHECK-FPC-OFF: fadd float {{.*}}, {{.*}}
+
+ // CHECK-FFPC-OFF: load float, float*
+ // CHECK-FFPC-OFF: load float, float*
+ // CHECK-FPSC-OFF: call float @llvm.experimental.constrained.fmul.f32(float {{.*}}, float {{.*}}, {{.*}})
+ // CHECK-FPSC-OFF: load float, float*
+ // CHECK-FPSC-OFF: [[RES:%.*]] = call float @llvm.experimental.constrained.fadd.f32(float {{.*}}, float {{.*}}, {{.*}})
+
}
diff --git a/clang/test/CodeGen/ffp-model.c b/clang/test/CodeGen/ffp-model.c
new file mode 100644
index 000000000000..21dbc8de99aa
--- /dev/null
+++ b/clang/test/CodeGen/ffp-model.c
@@ -0,0 +1,48 @@
+// REQUIRES: x86-registered-target
+// RUN: %clang -S -emit-llvm -ffp-model=fast -emit-llvm %s -o - \
+// RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-FAST
+
+// RUN: %clang -S -emit-llvm -ffp-model=precise %s -o - \
+// RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-PRECISE
+
+// RUN: %clang -S -emit-llvm -ffp-model=strict %s -o - \
+// RUN: -target x86_64 | FileCheck %s --check-prefixes=CHECK,CHECK-STRICT
+
+// RUN: %clang -S -emit-llvm -ffp-model=strict -ffast-math \
+// RUN: -target x86_64 %s -o - | FileCheck %s \
+// RUN: --check-prefixes CHECK,CHECK-STRICT-FAST
+
+// RUN: %clang -S -emit-llvm -ffp-model=precise -ffast-math \
+// RUN: %s -o - | FileCheck %s --check-prefixes CHECK,CHECK-FAST1
+
+float mymuladd(float x, float y, float z) {
+ // CHECK: define{{.*}} float @mymuladd
+ return x * y + z;
+
+ // CHECK-FAST: fmul fast float
+ // CHECK-FAST: load float, float*
+ // CHECK-FAST: fadd fast float
+
+ // CHECK-PRECISE: load float, float*
+ // CHECK-PRECISE: load float, float*
+ // CHECK-PRECISE: load float, float*
+ // CHECK-PRECISE: call float @llvm.fmuladd.f32(float {{.*}}, float {{.*}}, float {{.*}})
+
+ // CHECK-STRICT: load float, float*
+ // CHECK-STRICT: load float, float*
+ // CHECK-STRICT: call float @llvm.experimental.constrained.fmul.f32(float {{.*}}, float {{.*}}, {{.*}})
+ // CHECK-STRICT: load float, float*
+ // CHECK-STRICT: call float @llvm.experimental.constrained.fadd.f32(float {{.*}}, float {{.*}}, {{.*}})
+
+ // CHECK-STRICT-FAST: load float, float*
+ // CHECK-STRICT-FAST: load float, float*
+ // CHECK-STRICT-FAST: call fast float @llvm.experimental.constrained.fmul.f32(float {{.*}}, float {{.*}}, {{.*}})
+ // CHECK-STRICT-FAST: load float, float*
+ // CHECK-STRICT-FAST: call fast float @llvm.experimental.constrained.fadd.f32(float {{.*}}, float {{.*}}, {{.*}}
+
+ // CHECK-FAST1: load float, float*
+ // CHECK-FAST1: load float, float*
+ // CHECK-FAST1: fmul fast float {{.*}}, {{.*}}
+ // CHECK-FAST1: load float, float* {{.*}}
+ // CHECK-FAST1: fadd fast float {{.*}}, {{.*}}
+}
diff --git a/clang/test/CodeGen/ppc-emmintrin.c b/clang/test/CodeGen/ppc-emmintrin.c
index fa3801f50a01..4a246ff92d76 100644
--- a/clang/test/CodeGen/ppc-emmintrin.c
+++ b/clang/test/CodeGen/ppc-emmintrin.c
@@ -2,9 +2,9 @@
// REQUIRES: powerpc-registered-target
// RUN: %clang -S -emit-llvm -target powerpc64-unknown-linux-gnu -mcpu=pwr8 -ffreestanding -DNO_WARN_X86_INTRINSICS %s \
-// RUN: -fno-discard-value-names -mllvm -disable-llvm-optzns -o - | llvm-cxxfilt -n | FileCheck %s --check-prefixes=CHECK,CHECK-BE
+// RUN: -ffp-contract=off -fno-discard-value-names -mllvm -disable-llvm-optzns -o - | llvm-cxxfilt -n | FileCheck %s --check-prefixes=CHECK,CHECK-BE
// RUN: %clang -S -emit-llvm -target powerpc64le-unknown-linux-gnu -mcpu=pwr8 -ffreestanding -DNO_WARN_X86_INTRINSICS %s \
-// RUN: -fno-discard-value-names -mllvm -disable-llvm-optzns -o - | llvm-cxxfilt -n | FileCheck %s --check-prefixes=CHECK,CHECK-LE
+// RUN: -ffp-contract=off -fno-discard-value-names -mllvm -disable-llvm-optzns -o - | llvm-cxxfilt -n | FileCheck %s --check-prefixes=CHECK,CHECK-LE
// CHECK-BE-DAG: @_mm_movemask_pd.perm_mask = internal constant <4 x i32> <i32 -2139062144, i32 -2139062144, i32 -2139062144, i32 -2139078656>, align 16
// CHECK-BE-DAG: @_mm_shuffle_epi32.permute_selectors = internal constant [4 x i32] [i32 66051, i32 67438087, i32 134810123, i32 202182159], align 4
diff --git a/clang/test/CodeGen/ppc-xmmintrin.c b/clang/test/CodeGen/ppc-xmmintrin.c
index d3f18bfbb1e5..4aff7a7c3dda 100644
--- a/clang/test/CodeGen/ppc-xmmintrin.c
+++ b/clang/test/CodeGen/ppc-xmmintrin.c
@@ -2,11 +2,11 @@
// REQUIRES: powerpc-registered-target
// RUN: %clang -S -emit-llvm -target powerpc64-unknown-linux-gnu -mcpu=pwr8 -ffreestanding -DNO_WARN_X86_INTRINSICS %s \
-// RUN: -fno-discard-value-names -mllvm -disable-llvm-optzns -o - | llvm-cxxfilt -n | FileCheck %s --check-prefixes=CHECK,CHECK-BE
+// RUN: -ffp-contract=off -fno-discard-value-names -mllvm -disable-llvm-optzns -o - | llvm-cxxfilt -n | FileCheck %s --check-prefixes=CHECK,CHECK-BE
// RUN: %clang -x c++ -fsyntax-only -target powerpc64-unknown-linux-gnu -mcpu=pwr8 -ffreestanding -DNO_WARN_X86_INTRINSICS %s \
// RUN: -fno-discard-value-names -mllvm -disable-llvm-optzns
// RUN: %clang -S -emit-llvm -target powerpc64le-unknown-linux-gnu -mcpu=pwr8 -ffreestanding -DNO_WARN_X86_INTRINSICS %s \
-// RUN: -fno-discard-value-names -mllvm -disable-llvm-optzns -o - | llvm-cxxfilt -n | FileCheck %s --check-prefixes=CHECK,CHECK-LE
+// RUN: -ffp-contract=off -fno-discard-value-names -mllvm -disable-llvm-optzns -o - | llvm-cxxfilt -n | FileCheck %s --check-prefixes=CHECK,CHECK-LE
// RUN: %clang -x c++ -fsyntax-only -target powerpc64le-unknown-linux-gnu -mcpu=pwr8 -ffreestanding -DNO_WARN_X86_INTRINSICS %s \
// RUN: -fno-discard-value-names -mllvm -disable-llvm-optzns
diff --git a/clang/test/Driver/fp-model.c b/clang/test/Driver/fp-model.c
index 5fa9d110dd83..0824b3e2c596 100644
--- a/clang/test/Driver/fp-model.c
+++ b/clang/test/Driver/fp-model.c
@@ -99,7 +99,7 @@
// RUN: %clang -### -nostdinc -ffp-model=precise -c %s 2>&1 \
// RUN: | FileCheck --check-prefix=CHECK-FPM-PRECISE %s
// CHECK-FPM-PRECISE: "-cc1"
-// CHECK-FPM-PRECISE: "-ffp-contract=fast"
+// CHECK-FPM-PRECISE: "-ffp-contract=on"
// CHECK-FPM-PRECISE: "-fno-rounding-math"
// RUN: %clang -### -nostdinc -ffp-model=strict -c %s 2>&1 \
diff --git a/clang/test/Misc/ffp-contract.c b/clang/test/Misc/ffp-contract.c
new file mode 100644
index 000000000000..0d26905d4ef2
--- /dev/null
+++ b/clang/test/Misc/ffp-contract.c
@@ -0,0 +1,10 @@
+// RUN: %clang_cc1 -O3 -ffp-contract=fast -triple=aarch64-apple-darwin \
+// RUN: -S -o - %s | FileCheck --check-prefix=CHECK-FMADD %s
+// REQUIRES: aarch64-registered-target
+
+float fma_test1(float a, float b, float c) {
+ // CHECK-FMADD: fmadd
+ float x = a * b;
+ float y = x + c;
+ return y;
+}
</cut>
3 years, 7 months
- 1
- 0
[ACTIVITY] week ending Nov. 14 2021
by Alex Bennée
VirtIO Initiative ([STR-9])
===========================
- project admin
[STR-9] <https://linaro.atlassian.net/browse/STR-9>
[upstream rust-vmm sync meeting]
<https://etherpad.opendev.org/p/rust-vmm-sync-2021&sa=D&source=calendar&ust=…>
[proposal] <https://github.com/rust-vmm/vhost-device/pull/57>
vhost-device maintainer effort ([UM-196])
- did a bunch of review on [vhost-device crate]
[UM-196] <https://linaro.atlassian.net/browse/UM-196>
[vhost-device crate] <https://github.com/rust-vmm/vhost-device>
QEMU Upstream Work ([UM-2])
===========================
[UM-2] <https://linaro.atlassian.net/browse/UM-2>
Upstream MTTCG tests ([QEMU-52])
- posted [kvm-unit-tests PATCH v3 0/3] GIC ITS tests Message-Id:
<20211112114734.3058678-1-alex.bennee(a)linaro.org>
- might as well flush the tree state as I left it
- posted [RFC PATCH] hw/intc: clean-up error reporting for failed
ITS cmd Message-Id:
<20211112170454.3158925-1-alex.bennee(a)linaro.org>
- re-based [mttcg tests to current state and fixed up]
[QEMU-52] <https://linaro.atlassian.net/browse/QEMU-52>
[mttcg tests to current state and fixed up]
<https://github.com/stsquad/qemu/tree/mttcg/current-tests-v8>
Completed Reviews [2/2]
=======================
[PATCH v2 0/3] Some watchpoint-related patches
Message-Id: <163662450348.125458.5494710452733592356.stgit@pasha-ThinkPad-X280>
[PATCH 0/5] Update linux-headers + NOIRQ support for KVM gdbstub
Message-Id: <20211111110604.207376-1-pbonzini(a)redhat.com>
Absences
========
- none
Current Review Queue
====================
TODO [PATCH] cpu-models-x86.rst: Tidy up a couple of things
Message-Id: <20211015100718.17828-1-pbonzini(a)redhat.com>
===================================================================================================================
TODO [PATCH 00/16] fdt: Make OF_BOARD a boolean option
Message-Id: <20211013010120.96851-1-sjg(a)chromium.org>
===========================================================================================================
TODO [PATCH v4 00/41] linux-user: Streamline handling of SIGSEGV
Message-Id: <20211006172307.780893-1-richard.henderson(a)linaro.org>
==================================================================================================================================
TODO [PATCH] softmmu: fix watchpoint processing in icount mode
Message-Id: <163101424137.678744.18360776310711795413.stgit@pasha-ThinkPad-X280>
==============================================================================================================================================
--
Alex Bennée
3 years, 7 months
- 1
- 0
[ACTIVITY] report week ending 11 Nov
by Peter Maydell
Progress (short week, 3 days)
* UM-2 [QEMU upstream maintainership]
- recent changes to QEMU's PSCI emulation broke booting of guest code
at EL3 on the imx7 board, which was previously accidentally
relying on PSCI-emulation-via-SMC not getting in its way despite
being enabled. We need to make this board disable PSCI when the
guest code is booting to EL3, as the virt board does, but it's
trickier here because the CPU-creation code is hidden inside a
model of an SoC object. After some on-list discussion I have a
plan for how to restructure this, and need to write some code...
* QEMU-420 [GICv4 emulation]
- re-read the GIC architecture specification, acquired a better
understanding of the required work, and broke this epic down into
stories
- discussed with Leif how the ITS support should be landed in the
sbsa-ref board
Misc:
* higher-than-usual amount of meetings and meeting-prep this week
-- PMM
3 years, 7 months
- 1
- 0
[TCWG CI] 456.hmmer slowed down by 3% after llvm: [flang] Fix crash in semantic error recovery situation
by ci_notify＠linaro.org
After llvm commit f411c1dd95092139c8b992260705ac0b75c8583f
Author: Peter Klausler <pklausler(a)nvidia.com>
[flang] Fix crash in semantic error recovery situation
the following benchmarks slowed down by more than 2%:
- 456.hmmer slowed down by 3% from 7600 to 7806 perf samples
Below reproducer instructions can be used to re-build both "first_bad" and "last_good" cross-toolchains used in this bisection. Naturally, the scripts will fail when triggerring benchmarking jobs if you don't have access to Linaro TCWG CI.
For your convenience, we have uploaded tarballs with pre-processed source and assembly files at:
- First_bad save-temps: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-…
- Last_good save-temps: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-…
- Baseline save-temps: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-…
Configuration:
- Benchmark: SPEC CPU2006
- Toolchain: Clang + Glibc + LLVM Linker
- Version: all components were built from their tip of trunk
- Target: aarch64-linux-gnu
- Compiler flags: -O2 -flto
- Hardware: NVidia TX1 4x Cortex-A57
This benchmarking CI is work-in-progress, and we welcome feedback and suggestions at linaro-toolchain(a)lists.linaro.org . In our improvement plans is to add support for SPEC CPU2017 benchmarks and provide "perf report/annotate" data behind these reports.
THIS IS THE END OF INTERESTING STUFF. BELOW ARE LINKS TO BUILDS, REPRODUCTION INSTRUCTIONS, AND THE RAW COMMIT.
This commit has regressed these CI configurations:
- tcwg_bmk_llvm_tx1/llvm-master-aarch64-spec2k6-O2_LTO
First_bad build: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-…
Last_good build: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-…
Baseline build: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-…
Even more details: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-…
Reproduce builds:
<cut>
mkdir investigate-llvm-f411c1dd95092139c8b992260705ac0b75c8583f
cd investigate-llvm-f411c1dd95092139c8b992260705ac0b75c8583f
# Fetch scripts
git clone https://git.linaro.org/toolchain/jenkins-scripts
# Fetch manifests and test.sh script
mkdir -p artifacts/manifests
curl -o artifacts/manifests/build-baseline.sh https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-… --fail
curl -o artifacts/manifests/build-parameters.sh https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-… --fail
curl -o artifacts/test.sh https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-… --fail
chmod +x artifacts/test.sh
# Reproduce the baseline build (build all pre-requisites)
./jenkins-scripts/tcwg_bmk-build.sh @@ artifacts/manifests/build-baseline.sh
# Save baseline build state (which is then restored in artifacts/test.sh)
mkdir -p ./bisect
rsync -a --del --delete-excluded --exclude /bisect/ --exclude /artifacts/ --exclude /llvm/ ./ ./bisect/baseline/
cd llvm
# Reproduce first_bad build
git checkout --detach f411c1dd95092139c8b992260705ac0b75c8583f
../artifacts/test.sh
# Reproduce last_good build
git checkout --detach c0b298fc213c1b33e97ca72fba58597365375875
../artifacts/test.sh
cd ..
</cut>
Full commit (up to 1000 lines):
<cut>
commit f411c1dd95092139c8b992260705ac0b75c8583f
Author: Peter Klausler <pklausler(a)nvidia.com>
Date: Tue Nov 2 16:41:15 2021 -0700
[flang] Fix crash in semantic error recovery situation
A CHECK() in semantics is triggering when analyzing a program
with an undefined derived type pointer because the CHECK is
expecting a new error message to have been issued in a function
but not allowing for the case that a diagnostic could have been
produced earlier. Adjust the predicate.
Differential Revision: https://reviews.llvm.org/D113307
---
flang/lib/Semantics/expression.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/flang/lib/Semantics/expression.cpp b/flang/lib/Semantics/expression.cpp
index 331b9b2cf5bc..8ee8c9a9c9ce 100644
--- a/flang/lib/Semantics/expression.cpp
+++ b/flang/lib/Semantics/expression.cpp
@@ -1916,7 +1916,7 @@ auto ExpressionAnalyzer::AnalyzeProcedureComponentRef(
"Base of procedure component reference is not a derived-type object"_err_en_US);
}
}
- CHECK(!GetContextualMessages().empty());
+ CHECK(context_.AnyFatalError());
return std::nullopt;
}
</cut>
3 years, 7 months
- 1
- 0
ARM Cortex A55 support
by Stefan Johansson A
Hello,
We have been using Linaro GCC 7.5-2019.12 for the A53.
As we move on to new tech there seems to be no support for "-
mcpu=cortex-a55".
Today, we use the aarch64-elf- toolchain.
What GCC do you suggest we start using for A55 ?
Thanks,
Stefan
3 years, 7 months
- 2
- 1
[TCWG CI] 473.astar:[.] wayobj::makebound2 grew in size by 14% after llvm: [Clang/Test]: Rename enable_noundef_analysis to disable-noundef-analysis and turn it off by default
by ci_notify＠linaro.org
After llvm commit 7584ef766a7219b6ee5a400637206d26e0fa98ac
Author: Juneyoung Lee <aqjune(a)gmail.com>
[Clang/Test]: Rename enable_noundef_analysis to disable-noundef-analysis and turn it off by default
the following hot functions grew in size by more than 10% (but their benchmarks grew in size by less than 1%):
- 473.astar:[.] wayobj::makebound2 grew in size by 14% from 404 to 462 bytes
Below reproducer instructions can be used to re-build both "first_bad" and "last_good" cross-toolchains used in this bisection. Naturally, the scripts will fail when triggerring benchmarking jobs if you don't have access to Linaro TCWG CI.
For your convenience, we have uploaded tarballs with pre-processed source and assembly files at:
- First_bad save-temps: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_apm-llvm-master-…
- Last_good save-temps: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_apm-llvm-master-…
- Baseline save-temps: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_apm-llvm-master-…
Configuration:
- Benchmark: SPEC CPU2006
- Toolchain: Clang + Glibc + LLVM Linker
- Version: all components were built from their tip of trunk
- Target: arm-linux-gnueabihf
- Compiler flags: -Oz -mthumb
- Hardware: APM Mustang 8x X-Gene1
This benchmarking CI is work-in-progress, and we welcome feedback and suggestions at linaro-toolchain(a)lists.linaro.org . In our improvement plans is to add support for SPEC CPU2017 benchmarks and provide "perf report/annotate" data behind these reports.
THIS IS THE END OF INTERESTING STUFF. BELOW ARE LINKS TO BUILDS, REPRODUCTION INSTRUCTIONS, AND THE RAW COMMIT.
This commit has regressed these CI configurations:
- tcwg_bmk_llvm_apm/llvm-master-arm-spec2k6-Oz
First_bad build: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_apm-llvm-master-…
Last_good build: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_apm-llvm-master-…
Baseline build: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_apm-llvm-master-…
Even more details: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_apm-llvm-master-…
Reproduce builds:
<cut>
mkdir investigate-llvm-7584ef766a7219b6ee5a400637206d26e0fa98ac
cd investigate-llvm-7584ef766a7219b6ee5a400637206d26e0fa98ac
# Fetch scripts
git clone https://git.linaro.org/toolchain/jenkins-scripts
# Fetch manifests and test.sh script
mkdir -p artifacts/manifests
curl -o artifacts/manifests/build-baseline.sh https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_apm-llvm-master-… --fail
curl -o artifacts/manifests/build-parameters.sh https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_apm-llvm-master-… --fail
curl -o artifacts/test.sh https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_apm-llvm-master-… --fail
chmod +x artifacts/test.sh
# Reproduce the baseline build (build all pre-requisites)
./jenkins-scripts/tcwg_bmk-build.sh @@ artifacts/manifests/build-baseline.sh
# Save baseline build state (which is then restored in artifacts/test.sh)
mkdir -p ./bisect
rsync -a --del --delete-excluded --exclude /bisect/ --exclude /artifacts/ --exclude /llvm/ ./ ./bisect/baseline/
cd llvm
# Reproduce first_bad build
git checkout --detach 7584ef766a7219b6ee5a400637206d26e0fa98ac
../artifacts/test.sh
# Reproduce last_good build
git checkout --detach 1ab9a2906e19cca87cafac25cc31231a36de4843
../artifacts/test.sh
cd ..
</cut>
Full commit (up to 1000 lines):
<cut>
commit 7584ef766a7219b6ee5a400637206d26e0fa98ac
Author: Juneyoung Lee <aqjune(a)gmail.com>
Date: Sat Nov 6 15:34:49 2021 +0900
[Clang/Test]: Rename enable_noundef_analysis to disable-noundef-analysis and turn it off by default
Turning on `enable_noundef_analysis` flag allows better codegen by removing freeze instructions.
I modified clang by renaming `enable_noundef_analysis` flag to `disable-noundef-analysis` and turning it off by default.
Test updates are made as a separate patch: D108453
Reviewed By: eugenis
Differential Revision: https://reviews.llvm.org/D105169
---
clang/include/clang/Basic/CodeGenOptions.def | 2 +-
clang/include/clang/Driver/Options.td | 6 +-
clang/lib/CodeGen/CGCall.cpp | 4 +-
clang/test/CXX/except/except.spec/p14-ir.cpp | 4 +-
.../expr.prim/expr.prim.lambda/blocks-irgen.mm | 4 +-
clang/test/CodeGen/2005-01-02-ConstantInits.c | 10 +-
clang/test/CodeGen/2006-05-19-SingleEltReturn.c | 2 +-
clang/test/CodeGen/2007-06-18-SextAttrAggregate.c | 2 +-
.../test/CodeGen/2009-02-13-zerosize-union-field.c | 2 +-
clang/test/CodeGen/2009-05-04-EnumInreg.c | 2 +-
clang/test/CodeGen/64bit-swiftcall.c | 8 +-
clang/test/CodeGen/RISCV/riscv-inline-asm.c | 2 +-
clang/test/CodeGen/RISCV/riscv32-ilp32-abi.c | 8 +-
.../test/CodeGen/RISCV/riscv32-ilp32-ilp32f-abi.c | 8 +-
.../RISCV/riscv32-ilp32-ilp32f-ilp32d-abi.c | 48 +-
clang/test/CodeGen/RISCV/riscv32-ilp32d-abi.c | 24 +-
clang/test/CodeGen/RISCV/riscv32-ilp32f-abi.c | 6 +-
.../test/CodeGen/RISCV/riscv32-ilp32f-ilp32d-abi.c | 16 +-
clang/test/CodeGen/RISCV/riscv64-lp64-abi.c | 6 +-
clang/test/CodeGen/RISCV/riscv64-lp64-lp64f-abi.c | 4 +-
.../CodeGen/RISCV/riscv64-lp64-lp64f-lp64d-abi.c | 58 +-
clang/test/CodeGen/RISCV/riscv64-lp64d-abi.c | 12 +-
clang/test/CodeGen/RISCV/riscv64-lp64f-lp64d-abi.c | 16 +-
clang/test/CodeGen/SystemZ/systemz-abi-vector.c | 18 +-
clang/test/CodeGen/SystemZ/systemz-abi.c | 22 +-
clang/test/CodeGen/SystemZ/systemz-inline-asm.c | 24 +-
clang/test/CodeGen/WebAssembly/wasm-arguments.c | 38 +-
.../test/CodeGen/WebAssembly/wasm-main_argc_argv.c | 2 +-
clang/test/CodeGen/X86/avx-union.c | 6 +-
clang/test/CodeGen/X86/avx512fp16-complex-abi.c | 2 +-
clang/test/CodeGen/X86/ms-x86-intrinsics.c | 32 +-
clang/test/CodeGen/X86/strictfp_builtins.c | 8 +-
clang/test/CodeGen/X86/x86-atomic-long_double.c | 36 +-
.../CodeGen/X86/x86-inline-asm-min-vector-width.c | 12 +-
clang/test/CodeGen/X86/x86-long-double.cpp | 6 +-
clang/test/CodeGen/X86/x86-soft-float.c | 4 +-
clang/test/CodeGen/X86/x86-vec-i128.c | 22 +-
clang/test/CodeGen/X86/x86_32-arguments-darwin.c | 62 +-
clang/test/CodeGen/X86/x86_32-arguments-iamcu.c | 24 +-
clang/test/CodeGen/X86/x86_32-arguments-linux.c | 30 +-
clang/test/CodeGen/X86/x86_32-arguments-nommx.c | 4 +-
clang/test/CodeGen/X86/x86_32-arguments-realign.c | 2 +-
clang/test/CodeGen/X86/x86_32-arguments-win32.c | 12 +-
clang/test/CodeGen/X86/x86_64-arguments-nacl.c | 6 +-
clang/test/CodeGen/X86/x86_64-arguments-win32.c | 12 +-
clang/test/CodeGen/X86/x86_64-arguments.c | 82 +-
clang/test/CodeGen/X86/x86_64-longdouble.c | 36 +-
clang/test/CodeGen/aapcs-align.cpp | 56 +-
clang/test/CodeGen/aapcs64-align.cpp | 34 +-
clang/test/CodeGen/aarch64-args.cpp | 18 +-
clang/test/CodeGen/aarch64-byval-temp.c | 8 +-
clang/test/CodeGen/aarch64-neon-3v.c | 160 +-
clang/test/CodeGen/aarch64-neon-across.c | 88 +-
clang/test/CodeGen/aarch64-neon-dot-product.c | 24 +-
clang/test/CodeGen/aarch64-neon-extract.c | 48 +-
clang/test/CodeGen/aarch64-neon-fcvt-intrinsics.c | 42 +-
clang/test/CodeGen/aarch64-neon-fma.c | 44 +-
clang/test/CodeGen/aarch64-neon-ldst-one.c | 540 ++--
clang/test/CodeGen/aarch64-neon-scalar-copy.c | 48 +-
.../CodeGen/aarch64-neon-scalar-x-indexed-elem.c | 80 +-
clang/test/CodeGen/aarch64-neon-tbl.c | 144 +-
clang/test/CodeGen/aarch64-neon-vcombine.c | 28 +-
clang/test/CodeGen/aarch64-neon-vget-hilo.c | 56 +-
clang/test/CodeGen/aarch64-neon-vget.c | 96 +-
clang/test/CodeGen/aarch64-poly128.c | 62 +-
clang/test/CodeGen/aarch64-poly64.c | 96 +-
clang/test/CodeGen/aarch64-strictfp-builtins.c | 8 +-
...4-sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.c | 16 +-
...sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.cpp | 8 +-
clang/test/CodeGen/aarch64-varargs.c | 2 +-
clang/test/CodeGen/address-space-field1.c | 2 +-
clang/test/CodeGen/address-space.c | 2 +-
clang/test/CodeGen/aix-alignment.c | 8 +-
clang/test/CodeGen/aix-altivec.c | 10 +-
clang/test/CodeGen/aix-ignore-xcoff-visibility.cpp | 12 +-
clang/test/CodeGen/aix-return.c | 16 +-
clang/test/CodeGen/aix-struct-arg.c | 44 +-
clang/test/CodeGen/aix-vaargs.c | 4 +-
clang/test/CodeGen/alias.c | 12 +-
clang/test/CodeGen/align_value.cpp | 63 +-
clang/test/CodeGen/alloc-align-attr.c | 46 +-
clang/test/CodeGen/alloc-fns-alignment.c | 2 +-
clang/test/CodeGen/alloc-size-fnptr.c | 12 +-
clang/test/CodeGen/arc/arguments.c | 26 +-
clang/test/CodeGen/arithmetic-fence-builtin.c | 10 +-
clang/test/CodeGen/arm-aapcs-vfp.c | 24 +-
clang/test/CodeGen/arm-abi-vector.c | 48 +-
clang/test/CodeGen/arm-arguments.c | 10 +-
clang/test/CodeGen/arm-bf16-params-returns.c | 10 +-
clang/test/CodeGen/arm-byval-align.c | 2 +-
clang/test/CodeGen/arm-cmse-attr.c | 4 +-
clang/test/CodeGen/arm-cmse-call.c | 4 +-
clang/test/CodeGen/arm-float-helpers.c | 76 +-
clang/test/CodeGen/arm-fp16-arguments.c | 12 +-
clang/test/CodeGen/arm-homogenous.c | 2 +-
clang/test/CodeGen/arm-mangle-bf16.cpp | 2 +-
clang/test/CodeGen/arm-neon-directed-rounding.c | 30 +-
clang/test/CodeGen/arm-neon-dot-product.c | 16 +-
clang/test/CodeGen/arm-neon-fma.c | 8 +-
clang/test/CodeGen/arm-neon-numeric-maxmin.c | 8 +-
clang/test/CodeGen/arm-neon-vcvtX.c | 32 +-
clang/test/CodeGen/arm-swiftcall.c | 6 +-
clang/test/CodeGen/arm-varargs.c | 2 +-
clang/test/CodeGen/arm-vector-arguments.c | 10 +-
clang/test/CodeGen/arm-vfp16-arguments.c | 12 +-
clang/test/CodeGen/arm64-aapcs-arguments.c | 12 +-
clang/test/CodeGen/arm64-abi-vector.c | 42 +-
clang/test/CodeGen/arm64-arguments.c | 96 +-
clang/test/CodeGen/arm64-microsoft-arguments.cpp | 6 +-
clang/test/CodeGen/arm64_32.c | 2 +-
clang/test/CodeGen/arm64_vcopy.c | 20 +-
clang/test/CodeGen/arm64_vdupq_n_f64.c | 12 +-
clang/test/CodeGen/armv7k-abi.c | 6 +-
clang/test/CodeGen/asm-label.c | 12 +-
.../assume-aligned-and-alloc-align-attributes.c | 12 +-
clang/test/CodeGen/atomic-arm64.c | 2 +-
clang/test/CodeGen/atomic-ops-libcall.c | 34 +-
clang/test/CodeGen/atomic-ops.c | 44 +-
clang/test/CodeGen/atomic_ops.c | 10 +-
clang/test/CodeGen/atomics-inlining.c | 52 +-
clang/test/CodeGen/attr-func-def.c | 4 +-
clang/test/CodeGen/attr-naked.c | 2 +-
clang/test/CodeGen/attr-no-tail.c | 8 +-
clang/test/CodeGen/attr-nomerge.cpp | 20 +-
clang/test/CodeGen/attr-noundef.cpp | 4 +-
clang/test/CodeGen/attr-target-mv-func-ptrs.c | 4 +-
clang/test/CodeGen/attr-target-mv-va-args.c | 24 +-
clang/test/CodeGen/attr-target-mv.c | 28 +-
clang/test/CodeGen/attr-x86-interrupt.c | 16 +-
clang/test/CodeGen/attributes.c | 2 +-
clang/test/CodeGen/available-externally-hidden.cpp | 2 +-
clang/test/CodeGen/available-externally-suppress.c | 2 +-
clang/test/CodeGen/avr/struct.c | 4 +-
clang/test/CodeGen/big-atomic-ops.c | 30 +-
clang/test/CodeGen/bittest-intrin.c | 8 +-
clang/test/CodeGen/blocks.c | 6 +-
clang/test/CodeGen/bool-convert.c | 2 +-
clang/test/CodeGen/builtin-align-array.c | 8 +-
clang/test/CodeGen/builtin-align.c | 24 +-
clang/test/CodeGen/builtin-assume-aligned.c | 31 +-
clang/test/CodeGen/builtin-attributes.c | 20 +-
clang/test/CodeGen/builtin-memfns.c | 4 +-
clang/test/CodeGen/builtin-sqrt.c | 2 +-
clang/test/CodeGen/builtins-arm.c | 24 +-
clang/test/CodeGen/builtins-memcpy-inline.c | 8 +-
clang/test/CodeGen/builtins-ms.c | 4 +-
clang/test/CodeGen/builtins-multiprecision.c | 4 +-
clang/test/CodeGen/builtins-overflow.c | 12 +-
clang/test/CodeGen/builtins-ppc-xlcompat-macros.c | 4 +-
clang/test/CodeGen/builtins.c | 44 +-
clang/test/CodeGen/c-strings.c | 2 +-
clang/test/CodeGen/c11atomics-ios.c | 8 +-
clang/test/CodeGen/c11atomics.c | 52 +-
clang/test/CodeGen/calling-conv-ignored.c | 32 +-
...-assumption-attribute-align_value-on-lvalue.cpp | 2 +-
...ssumption-attribute-align_value-on-paramvar.cpp | 4 +-
...-attribute-alloc_align-on-function-variable.cpp | 6 +-
...ssumption-attribute-alloc_align-on-function.cpp | 8 +-
...ibute-assume_aligned-on-function-two-params.cpp | 6 +-
...mption-attribute-assume_aligned-on-function.cpp | 8 +-
...uiltin_assume_aligned-three-params-variable.cpp | 2 +-
...umption-builtin_assume_aligned-three-params.cpp | 2 +-
...ssumption-builtin_assume_aligned-two-params.cpp | 2 +-
.../CodeGen/catch-alignment-assumption-openmp.cpp | 2 +-
.../CodeGen/catch-implicit-integer-sign-changes.c | 18 +-
...icit-signed-integer-truncation-or-sign-change.c | 10 +-
...tr-and-nonzero-offset-when-nullptr-is-defined.c | 2 +-
.../CodeGen/catch-nullptr-and-nonzero-offset.c | 14 +-
.../test/CodeGen/catch-pointer-overflow-volatile.c | 2 +-
clang/test/CodeGen/catch-pointer-overflow.c | 16 +-
clang/test/CodeGen/cfi-check-fail.c | 2 +-
clang/test/CodeGen/cfi-check-fail2.c | 2 +-
clang/test/CodeGen/cmse-clear-arg.c | 2 +-
clang/test/CodeGen/complex-builtins.c | 228 +-
clang/test/CodeGen/complex-indirect.c | 2 +-
clang/test/CodeGen/complex-libcalls.c | 228 +-
clang/test/CodeGen/complex-math.c | 12 +-
clang/test/CodeGen/complex-strictfp.c | 42 +-
clang/test/CodeGen/constructor-attribute.c | 2 +-
clang/test/CodeGen/debug-info-block-vars.c | 2 +-
clang/test/CodeGen/debug-info-pseudo-probe.cpp | 4 +-
clang/test/CodeGen/decl.c | 2 +-
clang/test/CodeGen/default-address-space.c | 4 +-
clang/test/CodeGen/exceptions-seh-finally.c | 14 +-
clang/test/CodeGen/exceptions-seh-leave.c | 30 +-
clang/test/CodeGen/exceptions-seh-nested-finally.c | 4 +-
clang/test/CodeGen/exceptions-seh.c | 26 +-
clang/test/CodeGen/exceptions.c | 2 +-
clang/test/CodeGen/ext-int-cc.c | 58 +-
clang/test/CodeGen/extend-arg-64.c | 2 +-
clang/test/CodeGen/fp-function-attrs.cpp | 6 +-
clang/test/CodeGen/fp-options-to-fast-math-flags.c | 18 +-
clang/test/CodeGen/fpconstrained-cmp-double.c | 24 +-
clang/test/CodeGen/fpconstrained-cmp-float.c | 24 +-
clang/test/CodeGen/function-attributes.c | 20 +-
clang/test/CodeGen/functions.c | 4 +-
clang/test/CodeGen/hexagon-hvx-abi.c | 8 +-
clang/test/CodeGen/incomplete-function-type-2.c | 2 +-
clang/test/CodeGen/indirect-noundef.cpp | 2 +-
clang/test/CodeGen/inline.c | 4 +-
clang/test/CodeGen/lanai-arguments.c | 12 +-
clang/test/CodeGen/lanai-regparm.c | 12 +-
clang/test/CodeGen/libcall-declarations.c | 636 ++--
clang/test/CodeGen/libcalls.c | 54 +-
clang/test/CodeGen/long_double_fp128.cpp | 14 +-
clang/test/CodeGen/malign-double-x86-nacl.c | 6 +-
clang/test/CodeGen/mangle-blocks.c | 6 +-
clang/test/CodeGen/mangle-windows.c | 2 +-
clang/test/CodeGen/math-builtins-long.c | 386 +--
clang/test/CodeGen/math-builtins.c | 648 ++--
clang/test/CodeGen/math-libcalls.c | 474 +--
clang/test/CodeGen/matrix-cast.c | 26 +-
clang/test/CodeGen/matrix-type-builtins.c | 4 +-
.../test/CodeGen/matrix-type-operators-fast-math.c | 12 +-
clang/test/CodeGen/matrix-type-operators.c | 84 +-
clang/test/CodeGen/memcmp-inline-builtin-to-asm.c | 2 +-
clang/test/CodeGen/memcpy-inline-builtin.c | 2 +-
clang/test/CodeGen/microsoft-call-conv-x64.c | 2 +-
clang/test/CodeGen/microsoft-call-conv.c | 2 +-
clang/test/CodeGen/mingw-long-double.c | 12 +-
clang/test/CodeGen/mips-unsigned-ext-var.c | 6 +-
clang/test/CodeGen/mips-unsigned-extend.c | 6 +-
clang/test/CodeGen/mips-vector-arg.c | 16 +-
clang/test/CodeGen/mips-zero-sized-struct.c | 6 +-
clang/test/CodeGen/mips64-padding-arg.c | 24 +-
clang/test/CodeGen/mrtd.c | 6 +-
clang/test/CodeGen/ms-inline-asm.c | 2 +-
clang/test/CodeGen/ms-intrinsics-cpuid.c | 4 +-
clang/test/CodeGen/ms-intrinsics-other.c | 2 +-
clang/test/CodeGen/ms-mixed-ptr-sizes.c | 20 +-
clang/test/CodeGen/ms_abi.c | 4 +-
clang/test/CodeGen/ms_abi_aarch64.c | 4 +-
clang/test/CodeGen/named_reg_global.c | 2 +-
clang/test/CodeGen/no-bitfield-type-align.c | 2 +-
clang/test/CodeGen/no-builtin.cpp | 12 +-
clang/test/CodeGen/no-prototype.c | 2 +-
clang/test/CodeGen/noduplicate-cxx11-test.cpp | 2 +-
.../CodeGen/non-power-of-2-alignment-assumptions.c | 10 +-
clang/test/CodeGen/nonnull.c | 28 +-
clang/test/CodeGen/nrvo-tracking.cpp | 2 +-
clang/test/CodeGen/nvptx-abi.c | 10 +-
clang/test/CodeGen/object-size.c | 4 +-
clang/test/CodeGen/padding-init.c | 6 +-
clang/test/CodeGen/pass-by-value-noalias.c | 4 +-
clang/test/CodeGen/pass-object-size.c | 114 +-
clang/test/CodeGen/pch-dllexport.cpp | 4 +-
clang/test/CodeGen/powerpc-c99complex.c | 14 +-
clang/test/CodeGen/ppc-emmintrin.c | 750 ++---
clang/test/CodeGen/ppc-mm-malloc-le.c | 8 +-
clang/test/CodeGen/ppc-mm-malloc.c | 8 +-
clang/test/CodeGen/ppc-mmintrin.c | 124 +-
clang/test/CodeGen/ppc-pmmintrin.c | 177 +-
clang/test/CodeGen/ppc-signbit.c | 2 +-
clang/test/CodeGen/ppc-smmintrin.c | 32 +-
clang/test/CodeGen/ppc-tmmintrin.c | 290 +-
clang/test/CodeGen/ppc-xmmintrin.c | 400 +--
clang/test/CodeGen/ppc64-align-struct.c | 26 +-
clang/test/CodeGen/ppc64-complex-parms.c | 38 +-
clang/test/CodeGen/ppc64-complex-return.c | 20 +-
clang/test/CodeGen/ppc64-extend.c | 4 +-
clang/test/CodeGen/ppc64-inline-asm.c | 14 +-
clang/test/CodeGen/ppc64-long-double.cpp | 6 +-
clang/test/CodeGen/ppc64-soft-float.c | 6 +-
clang/test/CodeGen/ppc64-vector.c | 10 +-
clang/test/CodeGen/ppc64le-aggregates.c | 8 +-
clang/test/CodeGen/ppc64le-f128Aggregates.c | 4 +-
clang/test/CodeGen/ppc64le-varargs-f128.c | 12 +-
clang/test/CodeGen/pr25786.c | 4 +-
clang/test/CodeGen/pr5406.c | 2 +-
clang/test/CodeGen/pr9614.c | 4 +-
clang/test/CodeGen/pragma-weak.c | 2 +-
clang/test/CodeGen/ps4-dllimport-dllexport.c | 2 +-
clang/test/CodeGen/regcall.c | 100 +-
clang/test/CodeGen/regparm-flag.c | 12 +-
clang/test/CodeGen/regparm-struct.c | 36 +-
clang/test/CodeGen/regparm.c | 6 +-
clang/test/CodeGen/renderscript.c | 14 +-
clang/test/CodeGen/restrict.c | 10 +-
.../sanitize-thread-no-checking-at-run-time.m | 2 +-
clang/test/CodeGen/sparc-arguments.c | 4 +-
clang/test/CodeGen/sparcv8-abi.c | 6 +-
clang/test/CodeGen/sparcv8-inline-asm.c | 2 +-
clang/test/CodeGen/sparcv9-abi.c | 16 +-
clang/test/CodeGen/spir-half-type.cpp | 2 +-
clang/test/CodeGen/stack-protector.c | 4 +-
clang/test/CodeGen/stdcall-fastcall.c | 24 +-
clang/test/CodeGen/strictfp_builtins.c | 26 +-
clang/test/CodeGen/swift-async-call-conv.c | 22 +-
clang/test/CodeGen/switch-dce.c | 4 +-
clang/test/CodeGen/sysv_abi.c | 8 +-
clang/test/CodeGen/temporary-lifetime.cpp | 4 +-
clang/test/CodeGen/transparent-union-redecl.c | 8 +-
clang/test/CodeGen/transparent-union.c | 8 +-
clang/test/CodeGen/ubsan-function.cpp | 2 +-
.../CodeGen/unique-internal-linkage-names-dwarf.c | 4 +-
.../unique-internal-linkage-names-dwarf.cpp | 12 +-
.../test/CodeGen/unique-internal-linkage-names.cpp | 16 +-
clang/test/CodeGen/variadic-null-win64.c | 12 +-
clang/test/CodeGen/ve-abi.c | 34 +-
clang/test/CodeGen/vectorcall.c | 86 +-
clang/test/CodeGen/vla.c | 22 +-
clang/test/CodeGen/win64-i128.c | 4 +-
clang/test/CodeGen/windows-itanium.c | 2 +-
.../CodeGen/windows-on-arm-dllimport-dllexport.c | 2 +-
.../CodeGen/windows-seh-EHa-CppCatchDotDotDot.cpp | 2 +-
.../test/CodeGen/windows-seh-EHa-CppCondiTemps.cpp | 18 +-
clang/test/CodeGen/windows-seh-EHa-CppDtors01.cpp | 2 +-
.../test/CodeGen/windows-seh-EHa-TryInFinally.cpp | 4 +-
clang/test/CodeGen/windows-seh-abnormal-exits.c | 2 +-
clang/test/CodeGen/windows-swiftcall.c | 22 +-
clang/test/CodeGen/x86_32-align-linux.c | 6 +-
clang/test/CodeGen/xcore-abi.c | 14 +-
clang/test/CodeGen/xray-log-args.cpp | 4 +-
clang/test/CodeGenCUDA/address-spaces.cu | 2 +-
.../CodeGenCUDA/amdgpu-kernel-arg-pointer-type.cu | 10 +-
clang/test/CodeGenCUDA/builtins-amdgcn.cu | 2 +-
clang/test/CodeGenCUDA/cuda-builtin-vars.cu | 2 +-
clang/test/CodeGenCUDA/kernel-args-alignment.cu | 2 +-
clang/test/CodeGenCUDA/kernel-args.cu | 8 +-
clang/test/CodeGenCUDA/kernel-stub-name.cu | 4 +-
clang/test/CodeGenCUDA/lambda.cu | 8 +-
clang/test/CodeGenCUDA/redux-builtins.cu | 2 +-
clang/test/CodeGenCUDA/surface.cu | 4 +-
clang/test/CodeGenCUDA/texture.cu | 6 +-
clang/test/CodeGenCUDA/unnamed-types.cu | 8 +-
clang/test/CodeGenCUDA/usual-deallocators.cu | 36 +-
clang/test/CodeGenCUDA/vtbl.cu | 2 +-
.../CodeGenCXX/2009-05-04-PureConstNounwind.cpp | 10 +-
.../test/CodeGenCXX/2011-12-19-init-list-ctor.cpp | 6 +-
.../diamond-virtual-inheritance.cpp | 2 +-
.../CodeGenCXX/RelativeVTablesABI/dynamic-cast.cpp | 8 +-
.../RelativeVTablesABI/member-function-pointer.cpp | 2 +-
.../RelativeVTablesABI/multiple-inheritance.cpp | 2 +-
.../parent-and-child-in-comdats.cpp | 2 +-
.../CodeGenCXX/RelativeVTablesABI/type-info.cpp | 2 +-
.../CodeGenCXX/RelativeVTablesABI/vbase-offset.cpp | 2 +-
.../RelativeVTablesABI/virtual-function-call.cpp | 2 +-
clang/test/CodeGenCXX/address-space-cast.cpp | 14 +-
clang/test/CodeGenCXX/address-space-ref.cpp | 8 +-
clang/test/CodeGenCXX/aix-alignment.cpp | 6 +-
.../aix-static-init-temp-spec-and-inline-var.cpp | 14 +-
clang/test/CodeGenCXX/aix-static-init.cpp | 4 +-
.../test/CodeGenCXX/align-avx-complete-objects.cpp | 4 +-
clang/test/CodeGenCXX/alignment.cpp | 20 +-
clang/test/CodeGenCXX/alloc-size.cpp | 16 +-
.../test/CodeGenCXX/amdgcn-automatic-variable.cpp | 10 +-
clang/test/CodeGenCXX/amdgcn-func-arg.cpp | 24 +-
clang/test/CodeGenCXX/amdgcn_declspec_get.cpp | 2 +-
clang/test/CodeGenCXX/anonymous-namespaces.cpp | 4 +-
.../test/CodeGenCXX/apple-kext-indirect-call-2.cpp | 8 +-
clang/test/CodeGenCXX/apple-kext-linkage.cpp | 4 +-
clang/test/CodeGenCXX/arm-cc.cpp | 4 +-
clang/test/CodeGenCXX/arm-swiftcall.cpp | 2 +-
clang/test/CodeGenCXX/arm.cpp | 4 +-
clang/test/CodeGenCXX/arm64-constructor-return.cpp | 4 +-
clang/test/CodeGenCXX/arm64-darwinpcs.cpp | 4 +-
clang/test/CodeGenCXX/atomic-dllexport.cpp | 4 +-
clang/test/CodeGenCXX/atomic-inline.cpp | 2 +-
clang/test/CodeGenCXX/atomicinit.cpp | 8 +-
.../CodeGenCXX/attr-cpuspecific-outoflinedefs.cpp | 28 +-
clang/test/CodeGenCXX/attr-disable-tail-calls.cpp | 12 +-
clang/test/CodeGenCXX/attr-musttail.cpp | 40 +-
clang/test/CodeGenCXX/attr-notail.cpp | 10 +-
clang/test/CodeGenCXX/attr-target-mv-diff-ns.cpp | 42 +-
clang/test/CodeGenCXX/attr-target-mv-func-ptrs.cpp | 6 +-
clang/test/CodeGenCXX/attr-target-mv-inalloca.cpp | 16 +-
.../CodeGenCXX/attr-target-mv-member-funcs.cpp | 96 +-
.../CodeGenCXX/attr-target-mv-out-of-line-defs.cpp | 22 +-
clang/test/CodeGenCXX/attr-target-mv-overloads.cpp | 36 +-
...used-member-function-implicit-instantiation.cpp | 2 +-
clang/test/CodeGenCXX/attr-x86-interrupt.cpp | 24 +-
clang/test/CodeGenCXX/blocks-cxx11.cpp | 16 +-
clang/test/CodeGenCXX/blocks.cpp | 4 +-
clang/test/CodeGenCXX/builtin-calling-conv.cpp | 18 +-
.../CodeGenCXX/builtin-is-constant-evaluated.cpp | 8 +-
.../CodeGenCXX/builtin-operator-new-delete.cpp | 20 +-
clang/test/CodeGenCXX/builtin-source-location.cpp | 20 +-
clang/test/CodeGenCXX/builtin_FUNCTION.cpp | 6 +-
clang/test/CodeGenCXX/builtin_LINE.cpp | 24 +-
clang/test/CodeGenCXX/builtins.cpp | 4 +-
clang/test/CodeGenCXX/call-with-static-chain.cpp | 16 +-
clang/test/CodeGenCXX/catch-undef-behavior.cpp | 10 +-
clang/test/CodeGenCXX/cfi-cast.cpp | 4 +-
clang/test/CodeGenCXX/cfi-multiple-inheritance.cpp | 2 +-
.../test/CodeGenCXX/cfi-vcall-check-after-args.cpp | 2 +-
clang/test/CodeGenCXX/clang-sections.cpp | 2 +-
clang/test/CodeGenCXX/compound-literals.cpp | 6 +-
clang/test/CodeGenCXX/condition.cpp | 30 +-
clang/test/CodeGenCXX/conditional-gnu-ext.cpp | 14 +-
clang/test/CodeGenCXX/conditional-temporaries.cpp | 44 +-
clang/test/CodeGenCXX/const-init-cxx11.cpp | 16 +-
.../constructor-destructor-return-this.cpp | 100 +-
clang/test/CodeGenCXX/constructor-direct-call.cpp | 14 +-
clang/test/CodeGenCXX/constructor-init.cpp | 10 +-
clang/test/CodeGenCXX/constructors.cpp | 24 +-
clang/test/CodeGenCXX/convert-to-fptr.cpp | 4 +-
clang/test/CodeGenCXX/copy-assign-synthesis-1.cpp | 2 +-
clang/test/CodeGenCXX/copy-constructor-elim-2.cpp | 2 +-
.../CodeGenCXX/copy-constructor-synthesis-2.cpp | 2 +-
.../test/CodeGenCXX/copy-constructor-synthesis.cpp | 6 +-
clang/test/CodeGenCXX/copy-elision.cpp | 2 +-
clang/test/CodeGenCXX/copy-initialization.cpp | 2 +-
clang/test/CodeGenCXX/cxx-abi-switch.cpp | 4 +-
clang/test/CodeGenCXX/cxx0x-delegating-ctors.cpp | 2 +-
.../CodeGenCXX/cxx0x-initializer-constructors.cpp | 14 +-
.../CodeGenCXX/cxx0x-initializer-references.cpp | 4 +-
.../CodeGenCXX/cxx11-initializer-aggregate.cpp | 4 +-
.../CodeGenCXX/cxx11-initializer-array-new.cpp | 30 +-
.../CodeGenCXX/cxx11-thread-local-reference.cpp | 6 +-
.../CodeGenCXX/cxx11-thread-local-visibility.cpp | 8 +-
clang/test/CodeGenCXX/cxx11-thread-local.cpp | 38 +-
.../test/CodeGenCXX/cxx11-user-defined-literal.cpp | 20 +-
clang/test/CodeGenCXX/cxx1y-init-captures.cpp | 12 +-
.../CodeGenCXX/cxx1y-initializer-aggregate.cpp | 6 +-
clang/test/CodeGenCXX/cxx1y-sized-deallocation.cpp | 48 +-
.../CodeGenCXX/cxx1y-variable-template-linkage.cpp | 10 +-
clang/test/CodeGenCXX/cxx1y-variable-template.cpp | 2 +-
clang/test/CodeGenCXX/cxx1z-aligned-allocation.cpp | 68 +-
clang/test/CodeGenCXX/cxx1z-copy-omission.cpp | 8 +-
clang/test/CodeGenCXX/cxx1z-decomposition.cpp | 4 +-
clang/test/CodeGenCXX/cxx1z-init-statement.cpp | 4 +-
.../CodeGenCXX/cxx1z-initializer-aggregate.cpp | 20 +-
clang/test/CodeGenCXX/cxx1z-inline-variables.cpp | 8 +-
clang/test/CodeGenCXX/cxx2a-consteval.cpp | 11 +-
clang/test/CodeGenCXX/cxx2a-destroying-delete.cpp | 38 +-
.../debug-info-codeview-heapallocsite.cpp | 6 +-
.../test/CodeGenCXX/debug-info-destroy-helper.cpp | 48 +-
clang/test/CodeGenCXX/debug-info-globalinit.cpp | 6 +-
clang/test/CodeGenCXX/debug-info-line.cpp | 4 +-
clang/test/CodeGenCXX/debug-info-nested-exprs.cpp | 84 +-
clang/test/CodeGenCXX/debug-info-static-fns.cpp | 2 +-
clang/test/CodeGenCXX/debug-info-thunk-msabi.cpp | 2 +-
clang/test/CodeGenCXX/decl-ref-init.cpp | 4 +-
clang/test/CodeGenCXX/default-arg-temps.cpp | 4 +-
clang/test/CodeGenCXX/default-arguments.cpp | 2 +-
clang/test/CodeGenCXX/default_calling_conv.cpp | 24 +-
clang/test/CodeGenCXX/delete-two-arg.cpp | 8 +-
clang/test/CodeGenCXX/delete.cpp | 6 +-
clang/test/CodeGenCXX/derived-to-base-conv.cpp | 6 +-
clang/test/CodeGenCXX/derived-to-base.cpp | 4 +-
clang/test/CodeGenCXX/destructors.cpp | 8 +-
clang/test/CodeGenCXX/devirtualize-ms-dtor.cpp | 2 +-
.../devirtualize-virtual-function-calls-final.cpp | 34 +-
.../devirtualize-virtual-function-calls.cpp | 2 +-
clang/test/CodeGenCXX/dllexport-ctor-closure.cpp | 10 +-
clang/test/CodeGenCXX/dllexport-dtor-thunks.cpp | 2 +-
clang/test/CodeGenCXX/dllexport-members.cpp | 12 +-
.../CodeGenCXX/dllexport-no-dllexport-inlines.cpp | 18 +-
clang/test/CodeGenCXX/dllexport.cpp | 12 +-
clang/test/CodeGenCXX/dllimport-members.cpp | 12 +-
clang/test/CodeGenCXX/dllimport-runtime-fns.cpp | 6 +-
clang/test/CodeGenCXX/dllimport.cpp | 18 +-
clang/test/CodeGenCXX/eh.cpp | 10 +-
.../CodeGenCXX/empty-nontrivially-copyable.cpp | 6 +-
clang/test/CodeGenCXX/exceptions-cxx-new.cpp | 10 +-
.../CodeGenCXX/exceptions-seh-filter-captures.cpp | 24 +-
.../CodeGenCXX/exceptions-seh-filter-uwtable.cpp | 2 +-
clang/test/CodeGenCXX/exceptions-seh.cpp | 16 +-
clang/test/CodeGenCXX/exceptions.cpp | 4 +-
clang/test/CodeGenCXX/explicit-instantiation.cpp | 32 +-
clang/test/CodeGenCXX/ext-int.cpp | 16 +-
clang/test/CodeGenCXX/fastcall.cpp | 2 +-
clang/test/CodeGenCXX/float128-declarations.cpp | 20 +-
clang/test/CodeGenCXX/float16-declarations.cpp | 8 +-
clang/test/CodeGenCXX/for-cond-var.cpp | 16 +-
clang/test/CodeGenCXX/for-range-temporaries.cpp | 2 +-
clang/test/CodeGenCXX/for-range.cpp | 20 +-
clang/test/CodeGenCXX/forward-enum.cpp | 2 +-
clang/test/CodeGenCXX/fp16-mangle-arg-return.cpp | 4 +-
clang/test/CodeGenCXX/fp16-mangle.cpp | 4 +-
clang/test/CodeGenCXX/fp16-overload.cpp | 4 +-
clang/test/CodeGenCXX/global-init.cpp | 2 +-
clang/test/CodeGenCXX/goto.cpp | 6 +-
clang/test/CodeGenCXX/homogeneous-aggregates.cpp | 28 +-
clang/test/CodeGenCXX/ibm128-declarations.cpp | 24 +-
.../CodeGenCXX/implicit-copy-assign-operator.cpp | 2 +-
.../test/CodeGenCXX/implicit-copy-constructor.cpp | 2 +-
clang/test/CodeGenCXX/inalloca-overaligned.cpp | 38 +-
clang/test/CodeGenCXX/inalloca-stmtexpr.cpp | 2 +-
clang/test/CodeGenCXX/inalloca-vector.cpp | 40 +-
.../CodeGenCXX/inheriting-constructor-cleanup.cpp | 4 +-
clang/test/CodeGenCXX/inheriting-constructor.cpp | 10 +-
clang/test/CodeGenCXX/init-invariant.cpp | 14 +-
clang/test/CodeGenCXX/init-priority-attr.cpp | 10 +-
.../CodeGenCXX/initializer-list-ctor-order.cpp | 2 +-
clang/test/CodeGenCXX/inline-functions.cpp | 2 +-
clang/test/CodeGenCXX/lambda-conversion-op-cc.cpp | 56 +-
.../lambda-expressions-inside-auto-functions.cpp | 8 +-
.../lambda-expressions-nested-linkage.cpp | 10 +-
clang/test/CodeGenCXX/lambda-expressions.cpp | 30 +-
clang/test/CodeGenCXX/lifetime-sanitizer.cpp | 2 +-
clang/test/CodeGenCXX/linkage.cpp | 2 +-
clang/test/CodeGenCXX/mangle-abi-tag.cpp | 2 +-
clang/test/CodeGenCXX/mangle-exprs.cpp | 8 +-
clang/test/CodeGenCXX/mangle-extern-local.cpp | 6 +-
clang/test/CodeGenCXX/mangle-lambdas.cpp | 102 +-
clang/test/CodeGenCXX/mangle-ms-cxx11.cpp | 4 +-
.../CodeGenCXX/mangle-ms-templates-memptrs-2.cpp | 2 +-
clang/test/CodeGenCXX/mangle-ms-vector-types.cpp | 14 +-
clang/test/CodeGenCXX/mangle-ms.cpp | 10 +-
clang/test/CodeGenCXX/mangle-this-cxx11.cpp | 4 +-
clang/test/CodeGenCXX/mangle-win-ccs.cpp | 24 +-
clang/test/CodeGenCXX/mangle-win64-ccs.cpp | 14 +-
clang/test/CodeGenCXX/mangle.cpp | 32 +-
clang/test/CodeGenCXX/matrix-casts.cpp | 8 +-
clang/test/CodeGenCXX/matrix-type-builtins.cpp | 56 +-
clang/test/CodeGenCXX/matrix-type-operators.cpp | 48 +-
clang/test/CodeGenCXX/matrix-type.cpp | 2 +-
.../CodeGenCXX/member-expr-references-variable.cpp | 40 +-
clang/test/CodeGenCXX/member-expressions.cpp | 2 +-
.../CodeGenCXX/member-function-pointer-calls.cpp | 8 +-
clang/test/CodeGenCXX/member-init-assignment.cpp | 2 +-
clang/test/CodeGenCXX/member-templates.cpp | 4 +-
clang/test/CodeGenCXX/microsoft-abi-arg-order.cpp | 16 +-
.../CodeGenCXX/microsoft-abi-array-cookies.cpp | 8 +-
clang/test/CodeGenCXX/microsoft-abi-byval-sret.cpp | 8 +-
.../test/CodeGenCXX/microsoft-abi-byval-thunks.cpp | 16 +-
.../test/CodeGenCXX/microsoft-abi-byval-vararg.cpp | 12 +-
.../CodeGenCXX/microsoft-abi-cdecl-method-sret.cpp | 8 +-
.../test/CodeGenCXX/microsoft-abi-dynamic-cast.cpp | 22 +-
clang/test/CodeGenCXX/microsoft-abi-eh-catch.cpp | 6 +-
.../test/CodeGenCXX/microsoft-abi-eh-cleanups.cpp | 56 +-
.../CodeGenCXX/microsoft-abi-extern-template.cpp | 8 +-
.../CodeGenCXX/microsoft-abi-member-pointers.cpp | 42 +-
clang/test/CodeGenCXX/microsoft-abi-methods.cpp | 10 +-
...crosoft-abi-multiple-nonvirtual-inheritance.cpp | 10 +-
.../CodeGenCXX/microsoft-abi-sret-and-byval.cpp | 78 +-
.../microsoft-abi-static-initializers.cpp | 24 +-
clang/test/CodeGenCXX/microsoft-abi-structors.cpp | 2 +-
.../CodeGenCXX/microsoft-abi-this-nullable.cpp | 2 +-
.../microsoft-abi-thread-safe-statics.cpp | 2 +-
clang/test/CodeGenCXX/microsoft-abi-throw.cpp | 4 +-
clang/test/CodeGenCXX/microsoft-abi-thunks.cpp | 14 +-
clang/test/CodeGenCXX/microsoft-abi-typeid.cpp | 16 +-
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clang/test/CodeGenCXX/microsoft-abi-vbase-dtor.cpp | 2 +-
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.../microsoft-abi-virtual-inheritance.cpp | 54 +-
.../microsoft-abi-virtual-member-pointers.cpp | 56 +-
.../CodeGenCXX/microsoft-abi-vmemptr-conflicts.cpp | 34 +-
.../CodeGenCXX/microsoft-abi-vmemptr-fastcall.cpp | 4 +-
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clang/test/CodeGenCXX/microsoft-compatibility.cpp | 2 +-
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clang/test/CodeGenCXX/microsoft-interface.cpp | 10 +-
clang/test/CodeGenCXX/microsoft-new.cpp | 8 +-
clang/test/CodeGenCXX/mips-size_t-ptrdiff_t.cpp | 12 +-
clang/test/CodeGenCXX/ms-inline-asm-fields.cpp | 2 +-
clang/test/CodeGenCXX/ms-inline-asm-return.cpp | 2 +-
clang/test/CodeGenCXX/ms-property.cpp | 48 +-
clang/test/CodeGenCXX/ms-thunks-ehspec.cpp | 4 +-
clang/test/CodeGenCXX/ms-thunks-unprototyped.cpp | 18 +-
clang/test/CodeGenCXX/ms-union-member-ref.cpp | 6 +-
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clang/test/CodeGenCXX/multi-dim-operator-new.cpp | 6 +-
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clang/test/CodeGenCXX/new-array-init.cpp | 18 +-
clang/test/CodeGenCXX/new-infallible.cpp | 4 +-
clang/test/CodeGenCXX/new-overflow.cpp | 30 +-
clang/test/CodeGenCXX/new.cpp | 56 +-
clang/test/CodeGenCXX/noescape.cpp | 22 +-
clang/test/CodeGenCXX/nonconst-init.cpp | 2 +-
clang/test/CodeGenCXX/nrvo.cpp | 4 +-
clang/test/CodeGenCXX/observe-noexcept.cpp | 4 +-
clang/test/CodeGenCXX/operator-new.cpp | 8 +-
clang/test/CodeGenCXX/partial-destruction.cpp | 22 +-
clang/test/CodeGenCXX/pass-by-value-noalias.cpp | 16 +-
clang/test/CodeGenCXX/pass-object-size.cpp | 8 +-
clang/test/CodeGenCXX/pod-member-memcpys.cpp | 4 +-
clang/test/CodeGenCXX/powerpc-byval.cpp | 2 +-
clang/test/CodeGenCXX/pr13396.cpp | 12 +-
clang/test/CodeGenCXX/pr20897.cpp | 4 +-
clang/test/CodeGenCXX/pr24097.cpp | 2 +-
clang/test/CodeGenCXX/pr28360.cpp | 2 +-
clang/test/CodeGenCXX/pr9130.cpp | 2 +-
clang/test/CodeGenCXX/pragma-visibility.cpp | 2 +-
clang/test/CodeGenCXX/redefine_extname.cpp | 2 +-
clang/test/CodeGenCXX/reference-cast.cpp | 12 +-
clang/test/CodeGenCXX/references.cpp | 2 +-
clang/test/CodeGenCXX/regcall.cpp | 42 +-
clang/test/CodeGenCXX/regparm.cpp | 6 +-
clang/test/CodeGenCXX/runtime-dllstorage.cpp | 14 +-
clang/test/CodeGenCXX/runtimecc.cpp | 2 +-
clang/test/CodeGenCXX/rvalue-references.cpp | 12 +-
clang/test/CodeGenCXX/split-stacks.cpp | 12 +-
clang/test/CodeGenCXX/stack-reuse-miscompile.cpp | 8 +-
clang/test/CodeGenCXX/stack-reuse.cpp | 2 +-
clang/test/CodeGenCXX/static-data-member.cpp | 4 +-
clang/test/CodeGenCXX/static-destructor.cpp | 4 +-
clang/test/CodeGenCXX/static-init-1.cpp | 8 +-
clang/test/CodeGenCXX/static-init-wasm.cpp | 4 +-
clang/test/CodeGenCXX/static-init.cpp | 14 +-
.../CodeGenCXX/static-local-in-local-class.cpp | 20 +-
clang/test/CodeGenCXX/stmtexpr.cpp | 16 +-
clang/test/CodeGenCXX/switch-case-folding-2.cpp | 2 +-
clang/test/CodeGenCXX/temp-order.cpp | 18 +-
clang/test/CodeGenCXX/template-anonymous-types.cpp | 12 +-
clang/test/CodeGenCXX/temporaries.cpp | 48 +-
clang/test/CodeGenCXX/this-nonnull.cpp | 8 +-
clang/test/CodeGenCXX/thunk-linkonce-odr.cpp | 4 +-
clang/test/CodeGenCXX/thunk-returning-memptr.cpp | 2 +-
clang/test/CodeGenCXX/thunks-ehspec.cpp | 6 +-
clang/test/CodeGenCXX/thunks.cpp | 20 +-
clang/test/CodeGenCXX/tls-init-funcs.cpp | 10 +-
clang/test/CodeGenCXX/trivial_abi.cpp | 46 +-
clang/test/CodeGenCXX/ubsan-suppress-checks.cpp | 16 +-
clang/test/CodeGenCXX/ubsan-vtable-checks.cpp | 4 +-
clang/test/CodeGenCXX/uncopyable-args.cpp | 48 +-
clang/test/CodeGenCXX/unknown-anytype.cpp | 28 +-
clang/test/CodeGenCXX/value-init.cpp | 4 +-
clang/test/CodeGenCXX/varargs.cpp | 2 +-
clang/test/CodeGenCXX/variadic-templates.cpp | 2 +-
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clang/test/CodeGenCXX/virtual-bases.cpp | 8 +-
clang/test/CodeGenCXX/virtual-operator-call.cpp | 4 +-
.../visibility-inlines-hidden-staticvar.cpp | 44 +-
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clang/test/CodeGenCXX/vla-consruct.cpp | 4 +-
clang/test/CodeGenCXX/vla-lambda-capturing.cpp | 6 +-
clang/test/CodeGenCXX/vla.cpp | 4 +-
clang/test/CodeGenCXX/volatile.cpp | 2 +-
clang/test/CodeGenCXX/vtable-assume-load.cpp | 2 +-
.../CodeGenCXX/vtable-available-externally.cpp | 16 +-
clang/test/CodeGenCXX/wasm-args-returns.cpp | 4 +-
clang/test/CodeGenCXX/wasm-eh.cpp | 8 +-
.../windows-on-arm-itanium-thread-local.cpp | 2 +-
clang/test/CodeGenCXX/windows-x86-swiftcall.cpp | 6 +-
clang/test/CodeGenCXX/x86_32-arguments.cpp | 8 +-
clang/test/CodeGenCXX/x86_64-arguments-avx.cpp | 2 +-
.../test/CodeGenCXX/x86_64-arguments-nacl-x32.cpp | 2 +-
clang/test/CodeGenCXX/x86_64-arguments.cpp | 2 +-
.../CodeGenCoroutines/coro-alloc-exp-namespace.cpp | 26 +-
clang/test/CodeGenCoroutines/coro-alloc.cpp | 26 +-
.../CodeGenCoroutines/coro-await-exp-namespace.cpp | 2 +-
clang/test/CodeGenCoroutines/coro-await.cpp | 2 +-
clang/test/CodeGenCoroutines/coro-builtins.c | 2 +-
.../coro-cleanup-exp-namespace.cpp | 6 +-
clang/test/CodeGenCoroutines/coro-cleanup.cpp | 6 +-
.../CodeGenCoroutines/coro-gro-exp-namespace.cpp | 6 +-
.../coro-gro-nrvo-exp-namespace.cpp | 8 +-
clang/test/CodeGenCoroutines/coro-gro-nrvo.cpp | 8 +-
clang/test/CodeGenCoroutines/coro-gro.cpp | 6 +-
.../coro-params-exp-namespace.cpp | 22 +-
clang/test/CodeGenCoroutines/coro-params.cpp | 22 +-
.../coro-promise-dtor-exp-namespace.cpp | 2 +-
clang/test/CodeGenCoroutines/coro-promise-dtor.cpp | 2 +-
.../coro-ret-void-exp-namespace.cpp | 2 +-
clang/test/CodeGenCoroutines/coro-ret-void.cpp | 2 +-
.../coro-return-exp-namespace.cpp | 6 +-
clang/test/CodeGenCoroutines/coro-return.cpp | 6 +-
.../coro-symmetric-transfer-01-exp-namespace.cpp | 4 +-
.../coro-symmetric-transfer-01.cpp | 2 +-
clang/test/CodeGenObjC/arc-blocks.m | 44 +-
clang/test/CodeGenObjC/arc-foreach.m | 4 +-
clang/test/CodeGenObjC/arc-literals.m | 16 +-
clang/test/CodeGenObjC/arc-no-arc-exceptions.m | 6 +-
clang/test/CodeGenObjC/arc-precise-lifetime.m | 4 +-
clang/test/CodeGenObjC/arc-property.m | 10 +-
clang/test/CodeGenObjC/arc-ternary-op.m | 4 +-
clang/test/CodeGenObjC/arc.m | 44 +-
.../CodeGenObjC/arm-atomic-scalar-setter-getter.m | 4 +-
clang/test/CodeGenObjC/atomic-aggregate-property.m | 4 +-
.../test/CodeGenObjC/availability-cf-link-guard.m | 2 +-
clang/test/CodeGenObjC/blocks.m | 4 +-
clang/test/CodeGenObjC/builtin-constant-p.m | 4 +-
clang/test/CodeGenObjC/class-stubs.m | 10 +-
clang/test/CodeGenObjC/debug-info-blocks.m | 2 +-
clang/test/CodeGenObjC/debug-info-nested-blocks.m | 2 +-
clang/test/CodeGenObjC/exceptions.m | 16 +-
clang/test/CodeGenObjC/for-in.m | 2 +-
clang/test/CodeGenObjC/fragile-arc.m | 8 +-
clang/test/CodeGenObjC/gnu-exceptions.m | 4 +-
clang/test/CodeGenObjC/implicit-objc_msgSend.m | 2 +-
clang/test/CodeGenObjC/ivar-invariant.m | 2 +-
clang/test/CodeGenObjC/local-static-block.m | 2 +-
clang/test/CodeGenObjC/mangle-blocks.m | 6 +-
clang/test/CodeGenObjC/matrix-type-builtins.m | 16 +-
clang/test/CodeGenObjC/matrix-type-operators.m | 10 +-
clang/test/CodeGenObjC/noescape.m | 10 +-
.../CodeGenObjC/nontrivial-c-struct-exception.m | 2 +-
.../nontrivial-c-struct-within-struct-name.m | 6 +-
.../CodeGenObjC/nsvalue-objc-boxable-ios-arc.m | 12 +-
clang/test/CodeGenObjC/nsvalue-objc-boxable-ios.m | 12 +-
.../CodeGenObjC/nsvalue-objc-boxable-mac-arc.m | 12 +-
clang/test/CodeGenObjC/nsvalue-objc-boxable-mac.m | 12 +-
.../CodeGenObjC/objc-container-subscripting-1.m | 8 +-
clang/test/CodeGenObjC/objc-literal-tests.m | 26 +-
.../CodeGenObjC/objc-non-trivial-struct-nrvo.m | 6 +-
clang/test/CodeGenObjC/objfw.m | 2 +-
clang/test/CodeGenObjC/optimize-ivar-offset-load.m | 2 +-
clang/test/CodeGenObjC/os_log.m | 12 +-
clang/test/CodeGenObjC/parameterized_classes.m | 2 +-
clang/test/CodeGenObjC/pass-by-value-noalias.m | 4 +-
clang/test/CodeGenObjC/property-array-type.m | 2 +-
clang/test/CodeGenObjC/property-atomic-bool.m | 4 +-
clang/test/CodeGenObjC/property-ref-cast-to-void.m | 4 +-
clang/test/CodeGenObjC/property.m | 10 +-
clang/test/CodeGenObjC/return-objc-object.mm | 4 +-
clang/test/CodeGenObjC/stret_lookup.m | 4 +-
clang/test/CodeGenObjC/strong-in-c-struct.m | 54 +-
.../test/CodeGenObjC/tentative-cfconstantstring.m | 2 +-
clang/test/CodeGenObjC/terminate.m | 8 +-
clang/test/CodeGenObjC/ubsan-bool.m | 6 +-
clang/test/CodeGenObjC/ubsan-nonnull.m | 12 +-
clang/test/CodeGenObjC/ubsan-nullability.m | 4 +-
clang/test/CodeGenObjC/weak-in-c-struct.m | 30 +-
clang/test/CodeGenObjCXX/arc-attrs.mm | 18 +-
clang/test/CodeGenObjCXX/arc-blocks.mm | 6 +-
clang/test/CodeGenObjCXX/arc-cxx11-init-list.mm | 2 +-
clang/test/CodeGenObjCXX/arc-cxx11-member-init.mm | 4 +-
clang/test/CodeGenObjCXX/arc-exceptions.mm | 8 +-
.../CodeGenObjCXX/arc-forwarded-lambda-call.mm | 8 +-
clang/test/CodeGenObjCXX/arc-globals.mm | 4 +-
clang/test/CodeGenObjCXX/arc-list-init-destruct.mm | 2 +-
clang/test/CodeGenObjCXX/arc-mangle.mm | 22 +-
clang/test/CodeGenObjCXX/arc-marker-funclet.mm | 2 +-
clang/test/CodeGenObjCXX/arc-move.mm | 6 +-
clang/test/CodeGenObjCXX/arc-new-delete.mm | 16 +-
clang/test/CodeGenObjCXX/arc-references.mm | 6 +-
clang/test/CodeGenObjCXX/arc-rv-attr.mm | 2 +-
.../CodeGenObjCXX/arc-special-member-functions.mm | 2 +-
clang/test/CodeGenObjCXX/arc.mm | 44 +-
.../CodeGenObjCXX/auto-release-result-assert.mm | 8 +-
clang/test/CodeGenObjCXX/block-default-arg.mm | 4 +-
clang/test/CodeGenObjCXX/block-nested-in-lambda.mm | 4 +-
clang/test/CodeGenObjCXX/copy.mm | 2 +-
.../CodeGenObjCXX/implicit-copy-assign-operator.mm | 2 +-
.../CodeGenObjCXX/implicit-copy-constructor.mm | 2 +-
.../inheriting-constructor-cleanup.mm | 2 +-
clang/test/CodeGenObjCXX/lambda-expressions.mm | 20 +-
clang/test/CodeGenObjCXX/lambda-to-block.mm | 18 +-
clang/test/CodeGenObjCXX/literals.mm | 8 +-
.../test/CodeGenObjCXX/lvalue-reference-getter.mm | 4 +-
clang/test/CodeGenObjCXX/mangle-blocks.mm | 8 +-
clang/test/CodeGenObjCXX/message-reference.mm | 2 +-
clang/test/CodeGenObjCXX/message.mm | 4 +-
.../CodeGenObjCXX/objc-container-subscripting.mm | 2 +-
clang/test/CodeGenObjCXX/objc-struct-cxx-abi.mm | 54 +-
clang/test/CodeGenObjCXX/objc-weak.mm | 4 +-
.../CodeGenObjCXX/property-dot-copy-elision.mm | 6 +-
clang/test/CodeGenObjCXX/property-dot-reference.mm | 22 +-
.../test/CodeGenObjCXX/property-lvalue-capture.mm | 6 +-
clang/test/CodeGenObjCXX/property-lvalue-lambda.mm | 2 +-
.../CodeGenObjCXX/property-object-reference-1.mm | 2 +-
.../CodeGenObjCXX/property-object-reference-2.mm | 14 +-
clang/test/CodeGenObjCXX/property-objects.mm | 14 +-
clang/test/CodeGenObjCXX/property-reference.mm | 6 +-
clang/test/CodeGenObjCXX/selector-expr-lvalue.mm | 2 +-
.../CodeGenObjCXX/synthesized-property-cleanup.mm | 2 +-
.../ubsan-nullability-return-notypeloc.mm | 2 +-
clang/test/CodeGenOpenCL/addr-space-struct-arg.cl | 20 +-
clang/test/CodeGenOpenCL/address-spaces.cl | 10 +-
.../CodeGenOpenCL/amdgcn-automatic-variable.cl | 8 +-
.../test/CodeGenOpenCL/amdgpu-abi-struct-coerce.cl | 48 +-
clang/test/CodeGenOpenCL/amdgpu-call-kernel.cl | 2 +-
clang/test/CodeGenOpenCL/amdgpu-nullptr.cl | 8 +-
clang/test/CodeGenOpenCL/as_type.cl | 26 +-
clang/test/CodeGenOpenCL/atomic-ops-libcall.cl | 54 +-
clang/test/CodeGenOpenCL/blocks.cl | 12 +-
clang/test/CodeGenOpenCL/byval.cl | 4 +-
.../test/CodeGenOpenCL/cl20-device-side-enqueue.cl | 6 +-
clang/test/CodeGenOpenCL/const-str-array-decay.cl | 2 +-
.../CodeGenOpenCL/constant-addr-space-globals.cl | 2 +-
clang/test/CodeGenOpenCL/convergent.cl | 4 +-
clang/test/CodeGenOpenCL/fpmath.cl | 4 +-
clang/test/CodeGenOpenCL/half.cl | 8 +-
.../kernels-have-spir-cc-by-default.cl | 8 +-
clang/test/CodeGenOpenCL/no-half.cl | 4 +-
clang/test/CodeGenOpenCL/overload.cl | 20 +-
clang/test/CodeGenOpenCL/printf.cl | 12 +-
clang/test/CodeGenOpenCL/size_t.cl | 60 +-
clang/test/CodeGenOpenCL/spir-calling-conv.cl | 10 +-
.../CodeGenOpenCLCXX/address-space-deduction.clcpp | 2 +-
.../CodeGenOpenCLCXX/addrspace-derived-base.clcpp | 4 +-
.../CodeGenOpenCLCXX/addrspace-new-delete.clcpp | 2 +-
.../test/CodeGenOpenCLCXX/addrspace-of-this.clcpp | 32 +-
.../CodeGenOpenCLCXX/addrspace-operators.clcpp | 4 +-
.../CodeGenOpenCLCXX/addrspace-references.clcpp | 2 +-
.../CodeGenOpenCLCXX/addrspace-with-class.clcpp | 22 +-
.../CodeGenOpenCLCXX/template-address-spaces.clcpp | 6 +-
.../test/CodeGenSYCL/address-space-conversions.cpp | 52 +-
clang/test/CodeGenSYCL/address-space-mangling.cpp | 16 +-
clang/test/CodeGenSYCL/unique_stable_name.cpp | 40 +-
clang/test/Headers/ms-arm64-intrin.cpp | 6 +-
clang/test/Headers/stdarg.cpp | 28 +-
clang/test/Modules/codegen-extern-template.cpp | 2 +-
clang/test/Modules/codegen.test | 2 +-
clang/test/Modules/cxx-irgen.cpp | 2 +-
clang/test/Modules/initializers.cpp | 4 +-
clang/test/Modules/templates.mm | 8 +-
clang/test/OpenMP/allocate_codegen.cpp | 2 +-
clang/test/OpenMP/allocate_codegen_attr.cpp | 2 +-
clang/test/OpenMP/assumes_include_nvptx.cpp | 6 +-
clang/test/OpenMP/atomic_capture_codegen.cpp | 28 +-
clang/test/OpenMP/atomic_codegen.cpp | 8 +-
clang/test/OpenMP/atomic_read_codegen.c | 14 +-
clang/test/OpenMP/atomic_update_codegen.cpp | 28 +-
clang/test/OpenMP/atomic_write_codegen.c | 18 +-
clang/test/OpenMP/cancel_codegen.cpp | 104 +-
clang/test/OpenMP/cancellation_point_codegen.cpp | 28 +-
clang/test/OpenMP/debug-info-complex-byval.cpp | 49 +-
clang/test/OpenMP/debug-info-openmp-array.cpp | 6 +-
clang/test/OpenMP/declare_mapper_codegen.cpp | 20 +-
clang/test/OpenMP/declare_reduction_codegen.c | 48 +-
clang/test/OpenMP/declare_reduction_codegen.cpp | 46 +-
.../declare_reduction_codegen_in_templates.cpp | 2 +-
clang/test/OpenMP/declare_target_codegen.cpp | 4 +-
.../declare_target_codegen_globalization.cpp | 12 +-
clang/test/OpenMP/declare_target_link_codegen.cpp | 4 +-
clang/test/OpenMP/declare_variant_mixed_codegen.c | 12 +-
clang/test/OpenMP/distribute_codegen.cpp | 304 +-
.../OpenMP/distribute_firstprivate_codegen.cpp | 329 +-
.../test/OpenMP/distribute_lastprivate_codegen.cpp | 361 ++-
.../OpenMP/distribute_parallel_for_codegen.cpp | 576 ++--
...istribute_parallel_for_firstprivate_codegen.cpp | 385 ++-
.../OpenMP/distribute_parallel_for_if_codegen.cpp | 320 +-
...distribute_parallel_for_lastprivate_codegen.cpp | 449 ++-
...distribute_parallel_for_num_threads_codegen.cpp | 481 ++-
.../distribute_parallel_for_private_codegen.cpp | 425 ++-
.../distribute_parallel_for_proc_bind_codegen.cpp | 29 +-
...tribute_parallel_for_reduction_task_codegen.cpp | 44 +-
.../distribute_parallel_for_simd_codegen.cpp | 592 ++--
...bute_parallel_for_simd_firstprivate_codegen.cpp | 1362 ++++-----
.../distribute_parallel_for_simd_if_codegen.cpp | 3192 ++++++++++----------
...ibute_parallel_for_simd_lastprivate_codegen.cpp | 1336 ++++----
...ibute_parallel_for_simd_num_threads_codegen.cpp | 2640 ++++++++--------
...istribute_parallel_for_simd_private_codegen.cpp | 1288 ++++----
...tribute_parallel_for_simd_proc_bind_codegen.cpp | 236 +-
clang/test/OpenMP/distribute_private_codegen.cpp | 345 ++-
clang/test/OpenMP/distribute_simd_codegen.cpp | 512 ++--
.../distribute_simd_firstprivate_codegen.cpp | 944 +++---
.../OpenMP/distribute_simd_lastprivate_codegen.cpp | 1008 +++----
.../OpenMP/distribute_simd_private_codegen.cpp | 1056 +++----
.../OpenMP/distribute_simd_reduction_codegen.cpp | 272 +-
clang/test/OpenMP/for_codegen.cpp | 16 +-
clang/test/OpenMP/for_firstprivate_codegen.cpp | 313 +-
clang/test/OpenMP/for_lastprivate_codegen.cpp | 601 ++--
clang/test/OpenMP/for_linear_codegen.cpp | 165 +-
clang/test/OpenMP/for_private_codegen.cpp | 177 +-
clang/test/OpenMP/for_reduction_codegen.cpp | 760 ++---
clang/test/OpenMP/for_reduction_codegen_UDR.cpp | 936 +++---
clang/test/OpenMP/for_reduction_task_codegen.cpp | 36 +-
clang/test/OpenMP/for_scan_codegen.cpp | 2 +-
clang/test/OpenMP/for_simd_codegen.cpp | 6 +-
clang/test/OpenMP/for_simd_scan_codegen.cpp | 2 +-
clang/test/OpenMP/function-attr.cpp | 8 +-
clang/test/OpenMP/irbuilder_for_iterator.cpp | 24 +-
clang/test/OpenMP/irbuilder_for_rangefor.cpp | 28 +-
clang/test/OpenMP/irbuilder_for_unsigned.c | 6 +-
...builder_unroll_partial_heuristic_constant_for.c | 2 +-
...builder_unroll_partial_heuristic_for_collapse.c | 380 ++-
...rbuilder_unroll_partial_heuristic_runtime_for.c | 2 +-
clang/test/OpenMP/master_taskloop_codegen.cpp | 10 +-
.../master_taskloop_firstprivate_codegen.cpp | 22 +-
.../master_taskloop_in_reduction_codegen.cpp | 12 +-
.../OpenMP/master_taskloop_lastprivate_codegen.cpp | 22 +-
.../OpenMP/master_taskloop_private_codegen.cpp | 22 +-
.../OpenMP/master_taskloop_reduction_codegen.cpp | 22 +-
clang/test/OpenMP/master_taskloop_simd_codegen.cpp | 8 +-
.../master_taskloop_simd_firstprivate_codegen.cpp | 22 +-
.../master_taskloop_simd_in_reduction_codegen.cpp | 12 +-
.../master_taskloop_simd_lastprivate_codegen.cpp | 22 +-
.../master_taskloop_simd_private_codegen.cpp | 22 +-
.../master_taskloop_simd_reduction_codegen.cpp | 22 +-
clang/test/OpenMP/nvptx_allocate_codegen.cpp | 8 +-
clang/test/OpenMP/nvptx_data_sharing.cpp | 8 +-
.../nvptx_declare_target_var_ctor_dtor_codegen.cpp | 28 +-
.../OpenMP/nvptx_declare_variant_name_mangling.cpp | 4 +-
...tx_distribute_parallel_generic_mode_codegen.cpp | 48 +-
clang/test/OpenMP/nvptx_lambda_capturing.cpp | 122 +-
.../OpenMP/nvptx_multi_target_parallel_codegen.cpp | 18 +-
.../test/OpenMP/nvptx_nested_parallel_codegen.cpp | 72 +-
clang/test/OpenMP/nvptx_parallel_codegen.cpp | 52 +-
clang/test/OpenMP/nvptx_parallel_for_codegen.cpp | 6 +-
clang/test/OpenMP/nvptx_target_codegen.cpp | 10 +-
.../OpenMP/nvptx_target_firstprivate_codegen.cpp | 8 +-
.../test/OpenMP/nvptx_target_parallel_codegen.cpp | 48 +-
.../nvptx_target_parallel_num_threads_codegen.cpp | 48 +-
.../nvptx_target_parallel_reduction_codegen.cpp | 18 +-
...get_parallel_reduction_codegen_tbaa_PR46146.cpp | 10 +-
clang/test/OpenMP/nvptx_target_printf_codegen.c | 4 +-
clang/test/OpenMP/nvptx_target_teams_codegen.cpp | 48 +-
.../nvptx_target_teams_distribute_codegen.cpp | 18 +-
...arget_teams_distribute_parallel_for_codegen.cpp | 144 +-
...istribute_parallel_for_generic_mode_codegen.cpp | 72 +-
..._teams_distribute_parallel_for_simd_codegen.cpp | 72 +-
.../nvptx_target_teams_distribute_simd_codegen.cpp | 22 +-
clang/test/OpenMP/nvptx_teams_codegen.cpp | 32 +-
.../test/OpenMP/nvptx_teams_reduction_codegen.cpp | 162 +-
.../test/OpenMP/nvptx_unsupported_type_codegen.cpp | 4 +-
clang/test/OpenMP/openmp_offload_codegen.cpp | 2 +-
clang/test/OpenMP/openmp_win_codegen.cpp | 7 +-
clang/test/OpenMP/ordered_codegen.cpp | 76 +-
clang/test/OpenMP/parallel_codegen.cpp | 100 +-
clang/test/OpenMP/parallel_copyin_codegen.cpp | 613 ++--
.../test/OpenMP/parallel_firstprivate_codegen.cpp | 44 +-
clang/test/OpenMP/parallel_for_codegen.cpp | 224 +-
.../parallel_for_lastprivate_conditional.cpp | 17 +-
clang/test/OpenMP/parallel_for_linear_codegen.cpp | 93 +-
.../OpenMP/parallel_for_reduction_task_codegen.cpp | 36 +-
clang/test/OpenMP/parallel_for_scan_codegen.cpp | 2 +-
.../OpenMP/parallel_for_simd_aligned_codegen.cpp | 72 +-
clang/test/OpenMP/parallel_for_simd_codegen.cpp | 6 +-
.../test/OpenMP/parallel_for_simd_scan_codegen.cpp | 2 +-
clang/test/OpenMP/parallel_if_codegen.cpp | 100 +-
clang/test/OpenMP/parallel_if_codegen_PR51349.cpp | 2 +-
clang/test/OpenMP/parallel_master_codegen.cpp | 63 +-
.../parallel_master_reduction_task_codegen.cpp | 36 +-
.../OpenMP/parallel_master_taskloop_codegen.cpp | 60 +-
...rallel_master_taskloop_firstprivate_codegen.cpp | 20 +-
...arallel_master_taskloop_lastprivate_codegen.cpp | 282 +-
.../parallel_master_taskloop_private_codegen.cpp | 20 +-
.../parallel_master_taskloop_reduction_codegen.cpp | 22 +-
.../parallel_master_taskloop_simd_codegen.cpp | 160 +-
...l_master_taskloop_simd_firstprivate_codegen.cpp | 20 +-
...el_master_taskloop_simd_lastprivate_codegen.cpp | 470 +--
...rallel_master_taskloop_simd_private_codegen.cpp | 20 +-
...llel_master_taskloop_simd_reduction_codegen.cpp | 22 +-
clang/test/OpenMP/parallel_num_threads_codegen.cpp | 4 +-
clang/test/OpenMP/parallel_private_codegen.cpp | 261 +-
clang/test/OpenMP/parallel_reduction_codegen.cpp | 501 ++-
.../OpenMP/parallel_reduction_task_codegen.cpp | 36 +-
clang/test/OpenMP/parallel_sections_codegen.cpp | 13 +-
.../parallel_sections_reduction_task_codegen.cpp | 36 +-
clang/test/OpenMP/reduction_compound_op.cpp | 12 +-
.../test/OpenMP/sections_firstprivate_codegen.cpp | 321 +-
clang/test/OpenMP/sections_lastprivate_codegen.cpp | 433 ++-
clang/test/OpenMP/sections_private_codegen.cpp | 189 +-
clang/test/OpenMP/sections_reduction_codegen.cpp | 353 ++-
.../OpenMP/sections_reduction_task_codegen.cpp | 36 +-
clang/test/OpenMP/simd_codegen.cpp | 8 +-
clang/test/OpenMP/single_codegen.cpp | 597 ++--
clang/test/OpenMP/single_firstprivate_codegen.cpp | 321 +-
clang/test/OpenMP/single_private_codegen.cpp | 189 +-
clang/test/OpenMP/target_codegen.cpp | 12 +-
.../test/OpenMP/target_codegen_global_capture.cpp | 104 +-
clang/test/OpenMP/target_defaultmap_codegen_01.cpp | 676 ++---
clang/test/OpenMP/target_depend_codegen.cpp | 14 +-
clang/test/OpenMP/target_enter_data_codegen.cpp | 2 +-
.../OpenMP/target_enter_data_depend_codegen.cpp | 8 +-
clang/test/OpenMP/target_exit_data_codegen.cpp | 2 +-
.../OpenMP/target_exit_data_depend_codegen.cpp | 8 +-
clang/test/OpenMP/target_firstprivate_codegen.cpp | 12 +-
clang/test/OpenMP/target_map_codegen_00.cpp | 2 +-
clang/test/OpenMP/target_map_codegen_01.cpp | 4 +-
clang/test/OpenMP/target_map_codegen_02.cpp | 2 +-
clang/test/OpenMP/target_map_codegen_03.cpp | 96 +-
clang/test/OpenMP/target_map_codegen_04.cpp | 2 +-
clang/test/OpenMP/target_map_codegen_05.cpp | 2 +-
clang/test/OpenMP/target_map_codegen_06.cpp | 2 +-
clang/test/OpenMP/target_map_codegen_07.cpp | 2 +-
clang/test/OpenMP/target_map_codegen_11.cpp | 2 +-
clang/test/OpenMP/target_map_codegen_12.cpp | 2 +-
clang/test/OpenMP/target_map_codegen_13.cpp | 2 +-
clang/test/OpenMP/target_map_codegen_14.cpp | 4 +-
clang/test/OpenMP/target_map_codegen_15.cpp | 2 +-
clang/test/OpenMP/target_map_codegen_17.cpp | 2 +-
clang/test/OpenMP/target_map_codegen_24.cpp | 2 +-
clang/test/OpenMP/target_map_names.cpp | 2 +-
clang/test/OpenMP/target_map_names_attr.cpp | 2 +-
clang/test/OpenMP/target_parallel_codegen.cpp | 608 ++--
.../test/OpenMP/target_parallel_debug_codegen.cpp | 24 +-
.../test/OpenMP/target_parallel_depend_codegen.cpp | 12 +-
clang/test/OpenMP/target_parallel_for_codegen.cpp | 672 ++---
.../OpenMP/target_parallel_for_debug_codegen.cpp | 24 +-
.../OpenMP/target_parallel_for_depend_codegen.cpp | 12 +-
.../target_parallel_for_reduction_task_codegen.cpp | 40 +-
.../OpenMP/target_parallel_for_simd_codegen.cpp | 1008 +++----
.../target_parallel_for_simd_depend_codegen.cpp | 12 +-
clang/test/OpenMP/target_parallel_if_codegen.cpp | 464 +--
.../OpenMP/target_parallel_num_threads_codegen.cpp | 464 +--
.../target_parallel_reduction_task_codegen.cpp | 40 +-
clang/test/OpenMP/target_private_codegen.cpp | 4 +-
clang/test/OpenMP/target_reduction_codegen.cpp | 2 +-
clang/test/OpenMP/target_simd_codegen.cpp | 6 +-
clang/test/OpenMP/target_simd_depend_codegen.cpp | 12 +-
clang/test/OpenMP/target_teams_codegen.cpp | 928 +++---
clang/test/OpenMP/target_teams_depend_codegen.cpp | 12 +-
.../OpenMP/target_teams_distribute_codegen.cpp | 656 ++--
.../target_teams_distribute_collapse_codegen.cpp | 89 +-
.../target_teams_distribute_depend_codegen.cpp | 12 +-
...rget_teams_distribute_dist_schedule_codegen.cpp | 184 +-
...arget_teams_distribute_firstprivate_codegen.cpp | 573 ++--
...target_teams_distribute_lastprivate_codegen.cpp | 361 ++-
...arget_teams_distribute_parallel_for_codegen.cpp | 118 +-
</cut>
3 years, 7 months
- 1
- 0
[TCWG CI] 464.h264ref slowed down by 6% after llvm: [Clang/Test]: Rename enable_noundef_analysis to disable-noundef-analysis and turn it off by default
by ci_notify＠linaro.org
After llvm commit aacfbb953eb705af2ecfeb95a6262818fa85dd92
Author: hyeongyukim <gusrb406(a)snu.ac.kr>
[Clang/Test]: Rename enable_noundef_analysis to disable-noundef-analysis and turn it off by default
the following benchmarks slowed down by more than 2%:
- 464.h264ref slowed down by 6% from 10889 to 11584 perf samples
Below reproducer instructions can be used to re-build both "first_bad" and "last_good" cross-toolchains used in this bisection. Naturally, the scripts will fail when triggerring benchmarking jobs if you don't have access to Linaro TCWG CI.
For your convenience, we have uploaded tarballs with pre-processed source and assembly files at:
- First_bad save-temps: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-…
- Last_good save-temps: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-…
- Baseline save-temps: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-…
Configuration:
- Benchmark: SPEC CPU2006
- Toolchain: Clang + Glibc + LLVM Linker
- Version: all components were built from their tip of trunk
- Target: aarch64-linux-gnu
- Compiler flags: -O2 -flto
- Hardware: NVidia TX1 4x Cortex-A57
This benchmarking CI is work-in-progress, and we welcome feedback and suggestions at linaro-toolchain(a)lists.linaro.org . In our improvement plans is to add support for SPEC CPU2017 benchmarks and provide "perf report/annotate" data behind these reports.
THIS IS THE END OF INTERESTING STUFF. BELOW ARE LINKS TO BUILDS, REPRODUCTION INSTRUCTIONS, AND THE RAW COMMIT.
This commit has regressed these CI configurations:
- tcwg_bmk_llvm_tx1/llvm-master-aarch64-spec2k6-O2_LTO
First_bad build: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-…
Last_good build: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-…
Baseline build: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-…
Even more details: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-…
Reproduce builds:
<cut>
mkdir investigate-llvm-aacfbb953eb705af2ecfeb95a6262818fa85dd92
cd investigate-llvm-aacfbb953eb705af2ecfeb95a6262818fa85dd92
# Fetch scripts
git clone https://git.linaro.org/toolchain/jenkins-scripts
# Fetch manifests and test.sh script
mkdir -p artifacts/manifests
curl -o artifacts/manifests/build-baseline.sh https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-… --fail
curl -o artifacts/manifests/build-parameters.sh https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-… --fail
curl -o artifacts/test.sh https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-… --fail
chmod +x artifacts/test.sh
# Reproduce the baseline build (build all pre-requisites)
./jenkins-scripts/tcwg_bmk-build.sh @@ artifacts/manifests/build-baseline.sh
# Save baseline build state (which is then restored in artifacts/test.sh)
mkdir -p ./bisect
rsync -a --del --delete-excluded --exclude /bisect/ --exclude /artifacts/ --exclude /llvm/ ./ ./bisect/baseline/
cd llvm
# Reproduce first_bad build
git checkout --detach aacfbb953eb705af2ecfeb95a6262818fa85dd92
../artifacts/test.sh
# Reproduce last_good build
git checkout --detach b5aef90d4656c5188759d03e2c5c3dc3d8bb398b
../artifacts/test.sh
cd ..
</cut>
Full commit (up to 1000 lines):
<cut>
commit aacfbb953eb705af2ecfeb95a6262818fa85dd92
Author: hyeongyukim <gusrb406(a)snu.ac.kr>
Date: Fri Oct 15 19:26:07 2021 +0900
[Clang/Test]: Rename enable_noundef_analysis to disable-noundef-analysis and turn it off by default
Turning on `enable_noundef_analysis` flag allows better codegen by removing freeze instructions.
I modified clang by renaming `enable_noundef_analysis` flag to `disable-noundef-analysis` and turning it off by default.
Test updates are made as a separate patch: D108453
Reviewed By: eugenis
Differential Revision: https://reviews.llvm.org/D105169
[Clang/Test]: Rename enable_noundef_analysis to disable-noundef-analysis and turn it off by default (2)
This patch updates test files after D105169.
Autogenerated test codes are changed by `utils/update_cc_test_checks.py,` and non-autogenerated test codes are changed as follows:
(1) I wrote a python script that (partially) updates the tests using regex: {F18594904} The script is not perfect, but I believe it gives hints about which patterns are updated to have `noundef` attached.
(2) The remaining tests are updated manually.
Reviewed By: eugenis
Differential Revision: https://reviews.llvm.org/D108453
Resolve lit failures in clang after 8ca4b3e's land
Fix lit test failures in clang-ppc* and clang-x64-windows-msvc
Fix missing failures in clang-ppc64be* and retry fixing clang-x64-windows-msvc
Fix internal_clone(aarch64) inline assembly
---
clang/include/clang/Basic/CodeGenOptions.def | 2 +-
clang/include/clang/Driver/Options.td | 6 +-
clang/lib/CodeGen/CGCall.cpp | 4 +-
clang/test/CXX/except/except.spec/p14-ir.cpp | 4 +-
.../expr.prim/expr.prim.lambda/blocks-irgen.mm | 4 +-
clang/test/CodeGen/2005-01-02-ConstantInits.c | 10 +-
clang/test/CodeGen/2006-05-19-SingleEltReturn.c | 2 +-
clang/test/CodeGen/2007-06-18-SextAttrAggregate.c | 2 +-
.../test/CodeGen/2009-02-13-zerosize-union-field.c | 2 +-
clang/test/CodeGen/2009-05-04-EnumInreg.c | 2 +-
clang/test/CodeGen/64bit-swiftcall.c | 8 +-
clang/test/CodeGen/RISCV/riscv-inline-asm.c | 2 +-
clang/test/CodeGen/RISCV/riscv32-ilp32-abi.c | 8 +-
.../test/CodeGen/RISCV/riscv32-ilp32-ilp32f-abi.c | 8 +-
.../RISCV/riscv32-ilp32-ilp32f-ilp32d-abi.c | 48 +-
clang/test/CodeGen/RISCV/riscv32-ilp32d-abi.c | 24 +-
clang/test/CodeGen/RISCV/riscv32-ilp32f-abi.c | 6 +-
.../test/CodeGen/RISCV/riscv32-ilp32f-ilp32d-abi.c | 16 +-
clang/test/CodeGen/RISCV/riscv64-lp64-abi.c | 6 +-
clang/test/CodeGen/RISCV/riscv64-lp64-lp64f-abi.c | 4 +-
.../CodeGen/RISCV/riscv64-lp64-lp64f-lp64d-abi.c | 58 +-
clang/test/CodeGen/RISCV/riscv64-lp64d-abi.c | 12 +-
clang/test/CodeGen/RISCV/riscv64-lp64f-lp64d-abi.c | 16 +-
clang/test/CodeGen/SystemZ/systemz-abi-vector.c | 18 +-
clang/test/CodeGen/SystemZ/systemz-abi.c | 22 +-
clang/test/CodeGen/SystemZ/systemz-inline-asm.c | 24 +-
clang/test/CodeGen/WebAssembly/wasm-arguments.c | 38 +-
.../test/CodeGen/WebAssembly/wasm-main_argc_argv.c | 2 +-
clang/test/CodeGen/X86/avx-union.c | 6 +-
clang/test/CodeGen/X86/avx512fp16-complex-abi.c | 2 +-
clang/test/CodeGen/X86/ms-x86-intrinsics.c | 32 +-
clang/test/CodeGen/X86/strictfp_builtins.c | 8 +-
clang/test/CodeGen/X86/x86-atomic-long_double.c | 36 +-
.../CodeGen/X86/x86-inline-asm-min-vector-width.c | 12 +-
clang/test/CodeGen/X86/x86-long-double.cpp | 6 +-
clang/test/CodeGen/X86/x86-soft-float.c | 4 +-
clang/test/CodeGen/X86/x86-vec-i128.c | 22 +-
clang/test/CodeGen/X86/x86_32-arguments-darwin.c | 62 +-
clang/test/CodeGen/X86/x86_32-arguments-iamcu.c | 24 +-
clang/test/CodeGen/X86/x86_32-arguments-linux.c | 30 +-
clang/test/CodeGen/X86/x86_32-arguments-nommx.c | 4 +-
clang/test/CodeGen/X86/x86_32-arguments-realign.c | 2 +-
clang/test/CodeGen/X86/x86_32-arguments-win32.c | 12 +-
clang/test/CodeGen/X86/x86_64-arguments-nacl.c | 6 +-
clang/test/CodeGen/X86/x86_64-arguments-win32.c | 12 +-
clang/test/CodeGen/X86/x86_64-arguments.c | 82 +-
clang/test/CodeGen/X86/x86_64-longdouble.c | 36 +-
clang/test/CodeGen/aapcs-align.cpp | 56 +-
clang/test/CodeGen/aapcs64-align.cpp | 34 +-
clang/test/CodeGen/aarch64-args.cpp | 18 +-
clang/test/CodeGen/aarch64-byval-temp.c | 8 +-
clang/test/CodeGen/aarch64-neon-3v.c | 160 +-
clang/test/CodeGen/aarch64-neon-across.c | 88 +-
clang/test/CodeGen/aarch64-neon-dot-product.c | 24 +-
clang/test/CodeGen/aarch64-neon-extract.c | 48 +-
clang/test/CodeGen/aarch64-neon-fcvt-intrinsics.c | 42 +-
clang/test/CodeGen/aarch64-neon-fma.c | 44 +-
clang/test/CodeGen/aarch64-neon-ldst-one.c | 540 ++--
clang/test/CodeGen/aarch64-neon-scalar-copy.c | 48 +-
.../CodeGen/aarch64-neon-scalar-x-indexed-elem.c | 80 +-
clang/test/CodeGen/aarch64-neon-tbl.c | 144 +-
clang/test/CodeGen/aarch64-neon-vcombine.c | 28 +-
clang/test/CodeGen/aarch64-neon-vget-hilo.c | 56 +-
clang/test/CodeGen/aarch64-neon-vget.c | 96 +-
clang/test/CodeGen/aarch64-poly128.c | 62 +-
clang/test/CodeGen/aarch64-poly64.c | 96 +-
clang/test/CodeGen/aarch64-strictfp-builtins.c | 8 +-
...4-sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.c | 16 +-
...sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.cpp | 8 +-
clang/test/CodeGen/aarch64-varargs.c | 2 +-
clang/test/CodeGen/address-space-field1.c | 2 +-
clang/test/CodeGen/address-space.c | 2 +-
clang/test/CodeGen/aix-alignment.c | 8 +-
clang/test/CodeGen/aix-altivec.c | 10 +-
clang/test/CodeGen/aix-ignore-xcoff-visibility.cpp | 12 +-
clang/test/CodeGen/aix-return.c | 16 +-
clang/test/CodeGen/aix-struct-arg.c | 44 +-
clang/test/CodeGen/aix-vaargs.c | 4 +-
clang/test/CodeGen/alias.c | 12 +-
clang/test/CodeGen/align_value.cpp | 63 +-
clang/test/CodeGen/alloc-align-attr.c | 46 +-
clang/test/CodeGen/alloc-fns-alignment.c | 2 +-
clang/test/CodeGen/alloc-size-fnptr.c | 12 +-
clang/test/CodeGen/arc/arguments.c | 26 +-
clang/test/CodeGen/arithmetic-fence-builtin.c | 10 +-
clang/test/CodeGen/arm-aapcs-vfp.c | 24 +-
clang/test/CodeGen/arm-abi-vector.c | 48 +-
clang/test/CodeGen/arm-arguments.c | 10 +-
clang/test/CodeGen/arm-bf16-params-returns.c | 10 +-
clang/test/CodeGen/arm-byval-align.c | 2 +-
clang/test/CodeGen/arm-cmse-attr.c | 4 +-
clang/test/CodeGen/arm-cmse-call.c | 4 +-
clang/test/CodeGen/arm-float-helpers.c | 76 +-
clang/test/CodeGen/arm-fp16-arguments.c | 12 +-
clang/test/CodeGen/arm-homogenous.c | 2 +-
clang/test/CodeGen/arm-mangle-bf16.cpp | 2 +-
clang/test/CodeGen/arm-neon-directed-rounding.c | 30 +-
clang/test/CodeGen/arm-neon-dot-product.c | 16 +-
clang/test/CodeGen/arm-neon-fma.c | 8 +-
clang/test/CodeGen/arm-neon-numeric-maxmin.c | 8 +-
clang/test/CodeGen/arm-neon-vcvtX.c | 32 +-
clang/test/CodeGen/arm-swiftcall.c | 6 +-
clang/test/CodeGen/arm-varargs.c | 2 +-
clang/test/CodeGen/arm-vector-arguments.c | 10 +-
clang/test/CodeGen/arm-vfp16-arguments.c | 12 +-
clang/test/CodeGen/arm64-aapcs-arguments.c | 12 +-
clang/test/CodeGen/arm64-abi-vector.c | 42 +-
clang/test/CodeGen/arm64-arguments.c | 96 +-
clang/test/CodeGen/arm64-microsoft-arguments.cpp | 6 +-
clang/test/CodeGen/arm64_32.c | 2 +-
clang/test/CodeGen/arm64_vcopy.c | 20 +-
clang/test/CodeGen/arm64_vdupq_n_f64.c | 12 +-
clang/test/CodeGen/armv7k-abi.c | 6 +-
clang/test/CodeGen/asm-label.c | 12 +-
.../assume-aligned-and-alloc-align-attributes.c | 12 +-
clang/test/CodeGen/atomic-arm64.c | 2 +-
clang/test/CodeGen/atomic-ops-libcall.c | 34 +-
clang/test/CodeGen/atomic-ops.c | 44 +-
clang/test/CodeGen/atomic_ops.c | 10 +-
clang/test/CodeGen/atomics-inlining.c | 52 +-
clang/test/CodeGen/attr-func-def.c | 4 +-
clang/test/CodeGen/attr-naked.c | 2 +-
clang/test/CodeGen/attr-no-tail.c | 8 +-
clang/test/CodeGen/attr-nomerge.cpp | 20 +-
clang/test/CodeGen/attr-noundef.cpp | 4 +-
clang/test/CodeGen/attr-target-mv-func-ptrs.c | 4 +-
clang/test/CodeGen/attr-target-mv-va-args.c | 24 +-
clang/test/CodeGen/attr-target-mv.c | 28 +-
clang/test/CodeGen/attr-x86-interrupt.c | 16 +-
clang/test/CodeGen/attributes.c | 2 +-
clang/test/CodeGen/available-externally-hidden.cpp | 2 +-
clang/test/CodeGen/available-externally-suppress.c | 2 +-
clang/test/CodeGen/avr/struct.c | 4 +-
clang/test/CodeGen/big-atomic-ops.c | 30 +-
clang/test/CodeGen/bittest-intrin.c | 8 +-
clang/test/CodeGen/blocks.c | 6 +-
clang/test/CodeGen/bool-convert.c | 2 +-
clang/test/CodeGen/builtin-align-array.c | 8 +-
clang/test/CodeGen/builtin-align.c | 24 +-
clang/test/CodeGen/builtin-assume-aligned.c | 31 +-
clang/test/CodeGen/builtin-attributes.c | 20 +-
clang/test/CodeGen/builtin-memfns.c | 4 +-
clang/test/CodeGen/builtin-sqrt.c | 2 +-
clang/test/CodeGen/builtins-arm.c | 24 +-
clang/test/CodeGen/builtins-memcpy-inline.c | 8 +-
clang/test/CodeGen/builtins-ms.c | 4 +-
clang/test/CodeGen/builtins-multiprecision.c | 4 +-
clang/test/CodeGen/builtins-overflow.c | 12 +-
clang/test/CodeGen/builtins-ppc-xlcompat-macros.c | 4 +-
clang/test/CodeGen/builtins.c | 44 +-
clang/test/CodeGen/c-strings.c | 2 +-
clang/test/CodeGen/c11atomics-ios.c | 8 +-
clang/test/CodeGen/c11atomics.c | 52 +-
clang/test/CodeGen/calling-conv-ignored.c | 32 +-
...-assumption-attribute-align_value-on-lvalue.cpp | 2 +-
...ssumption-attribute-align_value-on-paramvar.cpp | 4 +-
...-attribute-alloc_align-on-function-variable.cpp | 6 +-
...ssumption-attribute-alloc_align-on-function.cpp | 8 +-
...ibute-assume_aligned-on-function-two-params.cpp | 6 +-
...mption-attribute-assume_aligned-on-function.cpp | 8 +-
...uiltin_assume_aligned-three-params-variable.cpp | 2 +-
...umption-builtin_assume_aligned-three-params.cpp | 2 +-
...ssumption-builtin_assume_aligned-two-params.cpp | 2 +-
.../CodeGen/catch-alignment-assumption-openmp.cpp | 2 +-
.../CodeGen/catch-implicit-integer-sign-changes.c | 18 +-
...icit-signed-integer-truncation-or-sign-change.c | 10 +-
...tr-and-nonzero-offset-when-nullptr-is-defined.c | 2 +-
.../CodeGen/catch-nullptr-and-nonzero-offset.c | 14 +-
.../test/CodeGen/catch-pointer-overflow-volatile.c | 2 +-
clang/test/CodeGen/catch-pointer-overflow.c | 16 +-
clang/test/CodeGen/cfi-check-fail.c | 2 +-
clang/test/CodeGen/cfi-check-fail2.c | 2 +-
clang/test/CodeGen/cmse-clear-arg.c | 2 +-
clang/test/CodeGen/complex-builtins.c | 228 +-
clang/test/CodeGen/complex-indirect.c | 2 +-
clang/test/CodeGen/complex-libcalls.c | 228 +-
clang/test/CodeGen/complex-math.c | 12 +-
clang/test/CodeGen/complex-strictfp.c | 42 +-
clang/test/CodeGen/constructor-attribute.c | 2 +-
clang/test/CodeGen/debug-info-block-vars.c | 2 +-
clang/test/CodeGen/debug-info-pseudo-probe.cpp | 4 +-
clang/test/CodeGen/decl.c | 2 +-
clang/test/CodeGen/default-address-space.c | 4 +-
clang/test/CodeGen/exceptions-seh-finally.c | 14 +-
clang/test/CodeGen/exceptions-seh-leave.c | 30 +-
clang/test/CodeGen/exceptions-seh-nested-finally.c | 4 +-
clang/test/CodeGen/exceptions-seh.c | 26 +-
clang/test/CodeGen/exceptions.c | 2 +-
clang/test/CodeGen/ext-int-cc.c | 58 +-
clang/test/CodeGen/extend-arg-64.c | 2 +-
clang/test/CodeGen/fp-function-attrs.cpp | 6 +-
clang/test/CodeGen/fp-options-to-fast-math-flags.c | 18 +-
clang/test/CodeGen/fpconstrained-cmp-double.c | 24 +-
clang/test/CodeGen/fpconstrained-cmp-float.c | 24 +-
clang/test/CodeGen/function-attributes.c | 20 +-
clang/test/CodeGen/functions.c | 4 +-
clang/test/CodeGen/hexagon-hvx-abi.c | 8 +-
clang/test/CodeGen/incomplete-function-type-2.c | 2 +-
clang/test/CodeGen/indirect-noundef.cpp | 2 +-
clang/test/CodeGen/inline.c | 4 +-
clang/test/CodeGen/lanai-arguments.c | 12 +-
clang/test/CodeGen/lanai-regparm.c | 12 +-
clang/test/CodeGen/libcall-declarations.c | 636 ++--
clang/test/CodeGen/libcalls.c | 54 +-
clang/test/CodeGen/long_double_fp128.cpp | 14 +-
clang/test/CodeGen/malign-double-x86-nacl.c | 6 +-
clang/test/CodeGen/mangle-blocks.c | 6 +-
clang/test/CodeGen/mangle-windows.c | 2 +-
clang/test/CodeGen/math-builtins-long.c | 386 +--
clang/test/CodeGen/math-builtins.c | 648 ++--
clang/test/CodeGen/math-libcalls.c | 474 +--
clang/test/CodeGen/matrix-cast.c | 26 +-
clang/test/CodeGen/matrix-type-builtins.c | 4 +-
.../test/CodeGen/matrix-type-operators-fast-math.c | 12 +-
clang/test/CodeGen/matrix-type-operators.c | 84 +-
clang/test/CodeGen/memcmp-inline-builtin-to-asm.c | 2 +-
clang/test/CodeGen/memcpy-inline-builtin.c | 2 +-
clang/test/CodeGen/microsoft-call-conv-x64.c | 2 +-
clang/test/CodeGen/microsoft-call-conv.c | 2 +-
clang/test/CodeGen/mingw-long-double.c | 12 +-
clang/test/CodeGen/mips-unsigned-ext-var.c | 6 +-
clang/test/CodeGen/mips-unsigned-extend.c | 6 +-
clang/test/CodeGen/mips-vector-arg.c | 16 +-
clang/test/CodeGen/mips-zero-sized-struct.c | 6 +-
clang/test/CodeGen/mips64-padding-arg.c | 24 +-
clang/test/CodeGen/mrtd.c | 6 +-
clang/test/CodeGen/ms-inline-asm.c | 2 +-
clang/test/CodeGen/ms-intrinsics-cpuid.c | 4 +-
clang/test/CodeGen/ms-intrinsics-other.c | 2 +-
clang/test/CodeGen/ms-mixed-ptr-sizes.c | 20 +-
clang/test/CodeGen/ms_abi.c | 4 +-
clang/test/CodeGen/ms_abi_aarch64.c | 4 +-
clang/test/CodeGen/named_reg_global.c | 2 +-
clang/test/CodeGen/no-bitfield-type-align.c | 2 +-
clang/test/CodeGen/no-builtin.cpp | 12 +-
clang/test/CodeGen/no-prototype.c | 2 +-
clang/test/CodeGen/noduplicate-cxx11-test.cpp | 2 +-
.../CodeGen/non-power-of-2-alignment-assumptions.c | 10 +-
clang/test/CodeGen/nonnull.c | 28 +-
clang/test/CodeGen/nrvo-tracking.cpp | 2 +-
clang/test/CodeGen/nvptx-abi.c | 10 +-
clang/test/CodeGen/object-size.c | 4 +-
clang/test/CodeGen/padding-init.c | 6 +-
clang/test/CodeGen/pass-by-value-noalias.c | 4 +-
clang/test/CodeGen/pass-object-size.c | 114 +-
clang/test/CodeGen/pch-dllexport.cpp | 4 +-
clang/test/CodeGen/powerpc-c99complex.c | 14 +-
clang/test/CodeGen/ppc-emmintrin.c | 750 ++---
clang/test/CodeGen/ppc-mm-malloc-le.c | 8 +-
clang/test/CodeGen/ppc-mm-malloc.c | 8 +-
clang/test/CodeGen/ppc-mmintrin.c | 124 +-
clang/test/CodeGen/ppc-pmmintrin.c | 177 +-
clang/test/CodeGen/ppc-signbit.c | 2 +-
clang/test/CodeGen/ppc-smmintrin.c | 32 +-
clang/test/CodeGen/ppc-tmmintrin.c | 290 +-
clang/test/CodeGen/ppc-xmmintrin.c | 400 +--
clang/test/CodeGen/ppc64-align-struct.c | 26 +-
clang/test/CodeGen/ppc64-complex-parms.c | 38 +-
clang/test/CodeGen/ppc64-complex-return.c | 20 +-
clang/test/CodeGen/ppc64-extend.c | 4 +-
clang/test/CodeGen/ppc64-inline-asm.c | 14 +-
clang/test/CodeGen/ppc64-long-double.cpp | 6 +-
clang/test/CodeGen/ppc64-soft-float.c | 6 +-
clang/test/CodeGen/ppc64-vector.c | 10 +-
clang/test/CodeGen/ppc64le-aggregates.c | 8 +-
clang/test/CodeGen/ppc64le-f128Aggregates.c | 4 +-
clang/test/CodeGen/ppc64le-varargs-f128.c | 12 +-
clang/test/CodeGen/pr25786.c | 4 +-
clang/test/CodeGen/pr5406.c | 2 +-
clang/test/CodeGen/pr9614.c | 4 +-
clang/test/CodeGen/pragma-weak.c | 2 +-
clang/test/CodeGen/ps4-dllimport-dllexport.c | 2 +-
clang/test/CodeGen/regcall.c | 100 +-
clang/test/CodeGen/regparm-flag.c | 12 +-
clang/test/CodeGen/regparm-struct.c | 36 +-
clang/test/CodeGen/regparm.c | 6 +-
clang/test/CodeGen/renderscript.c | 14 +-
clang/test/CodeGen/restrict.c | 10 +-
.../sanitize-thread-no-checking-at-run-time.m | 2 +-
clang/test/CodeGen/sparc-arguments.c | 4 +-
clang/test/CodeGen/sparcv8-abi.c | 6 +-
clang/test/CodeGen/sparcv8-inline-asm.c | 2 +-
clang/test/CodeGen/sparcv9-abi.c | 16 +-
clang/test/CodeGen/spir-half-type.cpp | 2 +-
clang/test/CodeGen/stack-protector.c | 4 +-
clang/test/CodeGen/stdcall-fastcall.c | 24 +-
clang/test/CodeGen/strictfp_builtins.c | 26 +-
clang/test/CodeGen/swift-async-call-conv.c | 22 +-
clang/test/CodeGen/switch-dce.c | 4 +-
clang/test/CodeGen/sysv_abi.c | 8 +-
clang/test/CodeGen/temporary-lifetime.cpp | 4 +-
clang/test/CodeGen/transparent-union-redecl.c | 8 +-
clang/test/CodeGen/transparent-union.c | 8 +-
clang/test/CodeGen/ubsan-function.cpp | 2 +-
.../CodeGen/unique-internal-linkage-names-dwarf.c | 4 +-
.../unique-internal-linkage-names-dwarf.cpp | 12 +-
.../test/CodeGen/unique-internal-linkage-names.cpp | 16 +-
clang/test/CodeGen/variadic-null-win64.c | 12 +-
clang/test/CodeGen/ve-abi.c | 34 +-
clang/test/CodeGen/vectorcall.c | 86 +-
clang/test/CodeGen/vla.c | 22 +-
clang/test/CodeGen/win64-i128.c | 4 +-
clang/test/CodeGen/windows-itanium.c | 2 +-
.../CodeGen/windows-on-arm-dllimport-dllexport.c | 2 +-
.../CodeGen/windows-seh-EHa-CppCatchDotDotDot.cpp | 2 +-
.../test/CodeGen/windows-seh-EHa-CppCondiTemps.cpp | 18 +-
clang/test/CodeGen/windows-seh-EHa-CppDtors01.cpp | 2 +-
.../test/CodeGen/windows-seh-EHa-TryInFinally.cpp | 4 +-
clang/test/CodeGen/windows-seh-abnormal-exits.c | 2 +-
clang/test/CodeGen/windows-swiftcall.c | 22 +-
clang/test/CodeGen/x86_32-align-linux.c | 6 +-
clang/test/CodeGen/xcore-abi.c | 14 +-
clang/test/CodeGen/xray-log-args.cpp | 4 +-
clang/test/CodeGenCUDA/address-spaces.cu | 2 +-
.../CodeGenCUDA/amdgpu-kernel-arg-pointer-type.cu | 10 +-
clang/test/CodeGenCUDA/builtins-amdgcn.cu | 2 +-
clang/test/CodeGenCUDA/cuda-builtin-vars.cu | 2 +-
clang/test/CodeGenCUDA/kernel-args-alignment.cu | 2 +-
clang/test/CodeGenCUDA/kernel-args.cu | 8 +-
clang/test/CodeGenCUDA/kernel-stub-name.cu | 4 +-
clang/test/CodeGenCUDA/lambda.cu | 8 +-
clang/test/CodeGenCUDA/redux-builtins.cu | 2 +-
clang/test/CodeGenCUDA/surface.cu | 4 +-
clang/test/CodeGenCUDA/texture.cu | 6 +-
clang/test/CodeGenCUDA/unnamed-types.cu | 8 +-
clang/test/CodeGenCUDA/usual-deallocators.cu | 36 +-
clang/test/CodeGenCUDA/vtbl.cu | 2 +-
.../CodeGenCXX/2009-05-04-PureConstNounwind.cpp | 10 +-
.../test/CodeGenCXX/2011-12-19-init-list-ctor.cpp | 6 +-
.../diamond-virtual-inheritance.cpp | 2 +-
.../CodeGenCXX/RelativeVTablesABI/dynamic-cast.cpp | 8 +-
.../RelativeVTablesABI/member-function-pointer.cpp | 2 +-
.../RelativeVTablesABI/multiple-inheritance.cpp | 2 +-
.../parent-and-child-in-comdats.cpp | 2 +-
.../CodeGenCXX/RelativeVTablesABI/type-info.cpp | 2 +-
.../CodeGenCXX/RelativeVTablesABI/vbase-offset.cpp | 2 +-
.../RelativeVTablesABI/virtual-function-call.cpp | 2 +-
clang/test/CodeGenCXX/address-space-cast.cpp | 14 +-
clang/test/CodeGenCXX/address-space-ref.cpp | 8 +-
clang/test/CodeGenCXX/aix-alignment.cpp | 6 +-
.../aix-static-init-temp-spec-and-inline-var.cpp | 14 +-
clang/test/CodeGenCXX/aix-static-init.cpp | 4 +-
.../test/CodeGenCXX/align-avx-complete-objects.cpp | 4 +-
clang/test/CodeGenCXX/alignment.cpp | 20 +-
clang/test/CodeGenCXX/alloc-size.cpp | 16 +-
.../test/CodeGenCXX/amdgcn-automatic-variable.cpp | 10 +-
clang/test/CodeGenCXX/amdgcn-func-arg.cpp | 24 +-
clang/test/CodeGenCXX/amdgcn_declspec_get.cpp | 2 +-
clang/test/CodeGenCXX/anonymous-namespaces.cpp | 4 +-
.../test/CodeGenCXX/apple-kext-indirect-call-2.cpp | 8 +-
clang/test/CodeGenCXX/apple-kext-linkage.cpp | 4 +-
clang/test/CodeGenCXX/arm-cc.cpp | 4 +-
clang/test/CodeGenCXX/arm-swiftcall.cpp | 2 +-
clang/test/CodeGenCXX/arm.cpp | 4 +-
clang/test/CodeGenCXX/arm64-constructor-return.cpp | 4 +-
clang/test/CodeGenCXX/arm64-darwinpcs.cpp | 4 +-
clang/test/CodeGenCXX/atomic-dllexport.cpp | 4 +-
clang/test/CodeGenCXX/atomic-inline.cpp | 2 +-
clang/test/CodeGenCXX/atomicinit.cpp | 8 +-
.../CodeGenCXX/attr-cpuspecific-outoflinedefs.cpp | 28 +-
clang/test/CodeGenCXX/attr-disable-tail-calls.cpp | 12 +-
clang/test/CodeGenCXX/attr-musttail.cpp | 40 +-
clang/test/CodeGenCXX/attr-notail.cpp | 10 +-
clang/test/CodeGenCXX/attr-target-mv-diff-ns.cpp | 42 +-
clang/test/CodeGenCXX/attr-target-mv-func-ptrs.cpp | 6 +-
clang/test/CodeGenCXX/attr-target-mv-inalloca.cpp | 16 +-
.../CodeGenCXX/attr-target-mv-member-funcs.cpp | 96 +-
.../CodeGenCXX/attr-target-mv-out-of-line-defs.cpp | 22 +-
clang/test/CodeGenCXX/attr-target-mv-overloads.cpp | 36 +-
...used-member-function-implicit-instantiation.cpp | 2 +-
clang/test/CodeGenCXX/attr-x86-interrupt.cpp | 24 +-
clang/test/CodeGenCXX/blocks-cxx11.cpp | 16 +-
clang/test/CodeGenCXX/blocks.cpp | 4 +-
clang/test/CodeGenCXX/builtin-calling-conv.cpp | 18 +-
.../CodeGenCXX/builtin-is-constant-evaluated.cpp | 8 +-
.../CodeGenCXX/builtin-operator-new-delete.cpp | 20 +-
clang/test/CodeGenCXX/builtin-source-location.cpp | 20 +-
clang/test/CodeGenCXX/builtin_FUNCTION.cpp | 6 +-
clang/test/CodeGenCXX/builtin_LINE.cpp | 24 +-
clang/test/CodeGenCXX/builtins.cpp | 4 +-
clang/test/CodeGenCXX/call-with-static-chain.cpp | 16 +-
clang/test/CodeGenCXX/catch-undef-behavior.cpp | 10 +-
clang/test/CodeGenCXX/cfi-cast.cpp | 4 +-
clang/test/CodeGenCXX/cfi-multiple-inheritance.cpp | 2 +-
.../test/CodeGenCXX/cfi-vcall-check-after-args.cpp | 2 +-
clang/test/CodeGenCXX/clang-sections.cpp | 2 +-
clang/test/CodeGenCXX/compound-literals.cpp | 6 +-
clang/test/CodeGenCXX/condition.cpp | 30 +-
clang/test/CodeGenCXX/conditional-gnu-ext.cpp | 14 +-
clang/test/CodeGenCXX/conditional-temporaries.cpp | 44 +-
clang/test/CodeGenCXX/const-init-cxx11.cpp | 16 +-
.../constructor-destructor-return-this.cpp | 100 +-
clang/test/CodeGenCXX/constructor-direct-call.cpp | 14 +-
clang/test/CodeGenCXX/constructor-init.cpp | 10 +-
clang/test/CodeGenCXX/constructors.cpp | 24 +-
clang/test/CodeGenCXX/convert-to-fptr.cpp | 4 +-
clang/test/CodeGenCXX/copy-assign-synthesis-1.cpp | 2 +-
clang/test/CodeGenCXX/copy-constructor-elim-2.cpp | 2 +-
.../CodeGenCXX/copy-constructor-synthesis-2.cpp | 2 +-
.../test/CodeGenCXX/copy-constructor-synthesis.cpp | 6 +-
clang/test/CodeGenCXX/copy-elision.cpp | 2 +-
clang/test/CodeGenCXX/copy-initialization.cpp | 2 +-
clang/test/CodeGenCXX/cxx-abi-switch.cpp | 4 +-
clang/test/CodeGenCXX/cxx0x-delegating-ctors.cpp | 2 +-
.../CodeGenCXX/cxx0x-initializer-constructors.cpp | 14 +-
.../CodeGenCXX/cxx0x-initializer-references.cpp | 4 +-
.../CodeGenCXX/cxx11-initializer-aggregate.cpp | 4 +-
.../CodeGenCXX/cxx11-initializer-array-new.cpp | 30 +-
.../CodeGenCXX/cxx11-thread-local-reference.cpp | 6 +-
.../CodeGenCXX/cxx11-thread-local-visibility.cpp | 8 +-
clang/test/CodeGenCXX/cxx11-thread-local.cpp | 38 +-
.../test/CodeGenCXX/cxx11-user-defined-literal.cpp | 20 +-
clang/test/CodeGenCXX/cxx1y-init-captures.cpp | 12 +-
.../CodeGenCXX/cxx1y-initializer-aggregate.cpp | 6 +-
clang/test/CodeGenCXX/cxx1y-sized-deallocation.cpp | 48 +-
.../CodeGenCXX/cxx1y-variable-template-linkage.cpp | 10 +-
clang/test/CodeGenCXX/cxx1y-variable-template.cpp | 2 +-
clang/test/CodeGenCXX/cxx1z-aligned-allocation.cpp | 68 +-
clang/test/CodeGenCXX/cxx1z-copy-omission.cpp | 8 +-
clang/test/CodeGenCXX/cxx1z-decomposition.cpp | 4 +-
clang/test/CodeGenCXX/cxx1z-init-statement.cpp | 4 +-
.../CodeGenCXX/cxx1z-initializer-aggregate.cpp | 20 +-
clang/test/CodeGenCXX/cxx1z-inline-variables.cpp | 8 +-
clang/test/CodeGenCXX/cxx2a-consteval.cpp | 11 +-
clang/test/CodeGenCXX/cxx2a-destroying-delete.cpp | 38 +-
.../debug-info-codeview-heapallocsite.cpp | 6 +-
.../test/CodeGenCXX/debug-info-destroy-helper.cpp | 48 +-
clang/test/CodeGenCXX/debug-info-globalinit.cpp | 6 +-
clang/test/CodeGenCXX/debug-info-line.cpp | 4 +-
clang/test/CodeGenCXX/debug-info-nested-exprs.cpp | 84 +-
clang/test/CodeGenCXX/debug-info-static-fns.cpp | 2 +-
clang/test/CodeGenCXX/debug-info-thunk-msabi.cpp | 2 +-
clang/test/CodeGenCXX/decl-ref-init.cpp | 4 +-
clang/test/CodeGenCXX/default-arg-temps.cpp | 4 +-
clang/test/CodeGenCXX/default-arguments.cpp | 2 +-
clang/test/CodeGenCXX/default_calling_conv.cpp | 24 +-
clang/test/CodeGenCXX/delete-two-arg.cpp | 8 +-
clang/test/CodeGenCXX/delete.cpp | 6 +-
clang/test/CodeGenCXX/derived-to-base-conv.cpp | 6 +-
clang/test/CodeGenCXX/derived-to-base.cpp | 4 +-
clang/test/CodeGenCXX/destructors.cpp | 8 +-
clang/test/CodeGenCXX/devirtualize-ms-dtor.cpp | 2 +-
.../devirtualize-virtual-function-calls-final.cpp | 34 +-
.../devirtualize-virtual-function-calls.cpp | 2 +-
clang/test/CodeGenCXX/dllexport-ctor-closure.cpp | 10 +-
clang/test/CodeGenCXX/dllexport-dtor-thunks.cpp | 2 +-
clang/test/CodeGenCXX/dllexport-members.cpp | 12 +-
.../CodeGenCXX/dllexport-no-dllexport-inlines.cpp | 18 +-
clang/test/CodeGenCXX/dllexport.cpp | 12 +-
clang/test/CodeGenCXX/dllimport-members.cpp | 12 +-
clang/test/CodeGenCXX/dllimport-runtime-fns.cpp | 6 +-
clang/test/CodeGenCXX/dllimport.cpp | 18 +-
clang/test/CodeGenCXX/eh.cpp | 10 +-
.../CodeGenCXX/empty-nontrivially-copyable.cpp | 6 +-
clang/test/CodeGenCXX/exceptions-cxx-new.cpp | 10 +-
.../CodeGenCXX/exceptions-seh-filter-captures.cpp | 24 +-
.../CodeGenCXX/exceptions-seh-filter-uwtable.cpp | 2 +-
clang/test/CodeGenCXX/exceptions-seh.cpp | 16 +-
clang/test/CodeGenCXX/exceptions.cpp | 4 +-
clang/test/CodeGenCXX/explicit-instantiation.cpp | 32 +-
clang/test/CodeGenCXX/ext-int.cpp | 16 +-
clang/test/CodeGenCXX/fastcall.cpp | 2 +-
clang/test/CodeGenCXX/float128-declarations.cpp | 20 +-
clang/test/CodeGenCXX/float16-declarations.cpp | 8 +-
clang/test/CodeGenCXX/for-cond-var.cpp | 16 +-
clang/test/CodeGenCXX/for-range-temporaries.cpp | 2 +-
clang/test/CodeGenCXX/for-range.cpp | 20 +-
clang/test/CodeGenCXX/forward-enum.cpp | 2 +-
clang/test/CodeGenCXX/fp16-mangle-arg-return.cpp | 4 +-
clang/test/CodeGenCXX/fp16-mangle.cpp | 4 +-
clang/test/CodeGenCXX/fp16-overload.cpp | 4 +-
clang/test/CodeGenCXX/global-init.cpp | 2 +-
clang/test/CodeGenCXX/goto.cpp | 6 +-
clang/test/CodeGenCXX/homogeneous-aggregates.cpp | 28 +-
clang/test/CodeGenCXX/ibm128-declarations.cpp | 24 +-
.../CodeGenCXX/implicit-copy-assign-operator.cpp | 2 +-
.../test/CodeGenCXX/implicit-copy-constructor.cpp | 2 +-
clang/test/CodeGenCXX/inalloca-overaligned.cpp | 38 +-
clang/test/CodeGenCXX/inalloca-stmtexpr.cpp | 2 +-
clang/test/CodeGenCXX/inalloca-vector.cpp | 40 +-
.../CodeGenCXX/inheriting-constructor-cleanup.cpp | 4 +-
clang/test/CodeGenCXX/inheriting-constructor.cpp | 10 +-
clang/test/CodeGenCXX/init-invariant.cpp | 14 +-
clang/test/CodeGenCXX/init-priority-attr.cpp | 10 +-
.../CodeGenCXX/initializer-list-ctor-order.cpp | 2 +-
clang/test/CodeGenCXX/inline-functions.cpp | 2 +-
clang/test/CodeGenCXX/lambda-conversion-op-cc.cpp | 56 +-
.../lambda-expressions-inside-auto-functions.cpp | 8 +-
.../lambda-expressions-nested-linkage.cpp | 10 +-
clang/test/CodeGenCXX/lambda-expressions.cpp | 30 +-
clang/test/CodeGenCXX/lifetime-sanitizer.cpp | 2 +-
clang/test/CodeGenCXX/linkage.cpp | 2 +-
clang/test/CodeGenCXX/mangle-abi-tag.cpp | 2 +-
clang/test/CodeGenCXX/mangle-exprs.cpp | 8 +-
clang/test/CodeGenCXX/mangle-extern-local.cpp | 6 +-
clang/test/CodeGenCXX/mangle-lambdas.cpp | 102 +-
clang/test/CodeGenCXX/mangle-ms-cxx11.cpp | 4 +-
.../CodeGenCXX/mangle-ms-templates-memptrs-2.cpp | 2 +-
clang/test/CodeGenCXX/mangle-ms-vector-types.cpp | 14 +-
clang/test/CodeGenCXX/mangle-ms.cpp | 10 +-
clang/test/CodeGenCXX/mangle-this-cxx11.cpp | 4 +-
clang/test/CodeGenCXX/mangle-win-ccs.cpp | 24 +-
clang/test/CodeGenCXX/mangle-win64-ccs.cpp | 14 +-
clang/test/CodeGenCXX/mangle.cpp | 32 +-
clang/test/CodeGenCXX/matrix-casts.cpp | 8 +-
clang/test/CodeGenCXX/matrix-type-builtins.cpp | 56 +-
clang/test/CodeGenCXX/matrix-type-operators.cpp | 48 +-
clang/test/CodeGenCXX/matrix-type.cpp | 2 +-
.../CodeGenCXX/member-expr-references-variable.cpp | 40 +-
clang/test/CodeGenCXX/member-expressions.cpp | 2 +-
.../CodeGenCXX/member-function-pointer-calls.cpp | 8 +-
clang/test/CodeGenCXX/member-init-assignment.cpp | 2 +-
clang/test/CodeGenCXX/member-templates.cpp | 4 +-
clang/test/CodeGenCXX/microsoft-abi-arg-order.cpp | 16 +-
.../CodeGenCXX/microsoft-abi-array-cookies.cpp | 8 +-
clang/test/CodeGenCXX/microsoft-abi-byval-sret.cpp | 8 +-
.../test/CodeGenCXX/microsoft-abi-byval-thunks.cpp | 16 +-
.../test/CodeGenCXX/microsoft-abi-byval-vararg.cpp | 12 +-
.../CodeGenCXX/microsoft-abi-cdecl-method-sret.cpp | 8 +-
.../test/CodeGenCXX/microsoft-abi-dynamic-cast.cpp | 22 +-
clang/test/CodeGenCXX/microsoft-abi-eh-catch.cpp | 6 +-
.../test/CodeGenCXX/microsoft-abi-eh-cleanups.cpp | 56 +-
.../CodeGenCXX/microsoft-abi-extern-template.cpp | 8 +-
.../CodeGenCXX/microsoft-abi-member-pointers.cpp | 42 +-
clang/test/CodeGenCXX/microsoft-abi-methods.cpp | 10 +-
...crosoft-abi-multiple-nonvirtual-inheritance.cpp | 10 +-
.../CodeGenCXX/microsoft-abi-sret-and-byval.cpp | 78 +-
.../microsoft-abi-static-initializers.cpp | 24 +-
clang/test/CodeGenCXX/microsoft-abi-structors.cpp | 2 +-
.../CodeGenCXX/microsoft-abi-this-nullable.cpp | 2 +-
.../microsoft-abi-thread-safe-statics.cpp | 2 +-
clang/test/CodeGenCXX/microsoft-abi-throw.cpp | 4 +-
clang/test/CodeGenCXX/microsoft-abi-thunks.cpp | 14 +-
clang/test/CodeGenCXX/microsoft-abi-typeid.cpp | 16 +-
.../test/CodeGenCXX/microsoft-abi-unknown-arch.cpp | 2 +-
clang/test/CodeGenCXX/microsoft-abi-vbase-dtor.cpp | 2 +-
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.../microsoft-abi-virtual-inheritance.cpp | 54 +-
.../microsoft-abi-virtual-member-pointers.cpp | 56 +-
.../CodeGenCXX/microsoft-abi-vmemptr-conflicts.cpp | 34 +-
.../CodeGenCXX/microsoft-abi-vmemptr-fastcall.cpp | 4 +-
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clang/test/CodeGenCXX/microsoft-compatibility.cpp | 2 +-
.../CodeGenCXX/microsoft-inaccessible-base.cpp | 4 +-
clang/test/CodeGenCXX/microsoft-interface.cpp | 10 +-
clang/test/CodeGenCXX/microsoft-new.cpp | 8 +-
clang/test/CodeGenCXX/mips-size_t-ptrdiff_t.cpp | 12 +-
clang/test/CodeGenCXX/ms-inline-asm-fields.cpp | 2 +-
clang/test/CodeGenCXX/ms-inline-asm-return.cpp | 2 +-
clang/test/CodeGenCXX/ms-property.cpp | 48 +-
clang/test/CodeGenCXX/ms-thunks-ehspec.cpp | 4 +-
clang/test/CodeGenCXX/ms-thunks-unprototyped.cpp | 18 +-
clang/test/CodeGenCXX/ms-union-member-ref.cpp | 6 +-
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clang/test/CodeGenCXX/multi-dim-operator-new.cpp | 6 +-
clang/test/CodeGenCXX/new-alias.cpp | 2 +-
clang/test/CodeGenCXX/new-array-init.cpp | 18 +-
clang/test/CodeGenCXX/new-infallible.cpp | 4 +-
clang/test/CodeGenCXX/new-overflow.cpp | 30 +-
clang/test/CodeGenCXX/new.cpp | 56 +-
clang/test/CodeGenCXX/noescape.cpp | 22 +-
clang/test/CodeGenCXX/nonconst-init.cpp | 2 +-
clang/test/CodeGenCXX/nrvo.cpp | 4 +-
clang/test/CodeGenCXX/observe-noexcept.cpp | 4 +-
clang/test/CodeGenCXX/operator-new.cpp | 8 +-
clang/test/CodeGenCXX/partial-destruction.cpp | 22 +-
clang/test/CodeGenCXX/pass-by-value-noalias.cpp | 16 +-
clang/test/CodeGenCXX/pass-object-size.cpp | 8 +-
clang/test/CodeGenCXX/pod-member-memcpys.cpp | 4 +-
clang/test/CodeGenCXX/powerpc-byval.cpp | 2 +-
clang/test/CodeGenCXX/pr13396.cpp | 12 +-
clang/test/CodeGenCXX/pr20897.cpp | 4 +-
clang/test/CodeGenCXX/pr24097.cpp | 2 +-
clang/test/CodeGenCXX/pr28360.cpp | 2 +-
clang/test/CodeGenCXX/pr9130.cpp | 2 +-
clang/test/CodeGenCXX/pragma-visibility.cpp | 2 +-
clang/test/CodeGenCXX/redefine_extname.cpp | 2 +-
clang/test/CodeGenCXX/reference-cast.cpp | 12 +-
clang/test/CodeGenCXX/references.cpp | 2 +-
clang/test/CodeGenCXX/regcall.cpp | 42 +-
clang/test/CodeGenCXX/regparm.cpp | 6 +-
clang/test/CodeGenCXX/runtime-dllstorage.cpp | 14 +-
clang/test/CodeGenCXX/runtimecc.cpp | 2 +-
clang/test/CodeGenCXX/rvalue-references.cpp | 12 +-
clang/test/CodeGenCXX/split-stacks.cpp | 12 +-
clang/test/CodeGenCXX/stack-reuse-miscompile.cpp | 8 +-
clang/test/CodeGenCXX/stack-reuse.cpp | 2 +-
clang/test/CodeGenCXX/static-data-member.cpp | 4 +-
clang/test/CodeGenCXX/static-destructor.cpp | 4 +-
clang/test/CodeGenCXX/static-init-1.cpp | 8 +-
clang/test/CodeGenCXX/static-init-wasm.cpp | 4 +-
clang/test/CodeGenCXX/static-init.cpp | 14 +-
.../CodeGenCXX/static-local-in-local-class.cpp | 20 +-
clang/test/CodeGenCXX/stmtexpr.cpp | 16 +-
clang/test/CodeGenCXX/switch-case-folding-2.cpp | 2 +-
clang/test/CodeGenCXX/temp-order.cpp | 18 +-
clang/test/CodeGenCXX/template-anonymous-types.cpp | 12 +-
clang/test/CodeGenCXX/temporaries.cpp | 48 +-
clang/test/CodeGenCXX/this-nonnull.cpp | 8 +-
clang/test/CodeGenCXX/thunk-linkonce-odr.cpp | 4 +-
clang/test/CodeGenCXX/thunk-returning-memptr.cpp | 2 +-
clang/test/CodeGenCXX/thunks-ehspec.cpp | 6 +-
clang/test/CodeGenCXX/thunks.cpp | 20 +-
clang/test/CodeGenCXX/tls-init-funcs.cpp | 10 +-
clang/test/CodeGenCXX/trivial_abi.cpp | 46 +-
clang/test/CodeGenCXX/ubsan-suppress-checks.cpp | 16 +-
clang/test/CodeGenCXX/ubsan-vtable-checks.cpp | 4 +-
clang/test/CodeGenCXX/uncopyable-args.cpp | 48 +-
clang/test/CodeGenCXX/unknown-anytype.cpp | 28 +-
clang/test/CodeGenCXX/value-init.cpp | 4 +-
clang/test/CodeGenCXX/varargs.cpp | 2 +-
clang/test/CodeGenCXX/variadic-templates.cpp | 2 +-
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clang/test/CodeGenCXX/virtual-bases.cpp | 8 +-
clang/test/CodeGenCXX/virtual-operator-call.cpp | 4 +-
.../visibility-inlines-hidden-staticvar.cpp | 44 +-
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clang/test/CodeGenCXX/vla-consruct.cpp | 4 +-
clang/test/CodeGenCXX/vla-lambda-capturing.cpp | 6 +-
clang/test/CodeGenCXX/vla.cpp | 4 +-
clang/test/CodeGenCXX/volatile.cpp | 2 +-
clang/test/CodeGenCXX/vtable-assume-load.cpp | 2 +-
.../CodeGenCXX/vtable-available-externally.cpp | 16 +-
clang/test/CodeGenCXX/wasm-args-returns.cpp | 4 +-
clang/test/CodeGenCXX/wasm-eh.cpp | 8 +-
.../windows-on-arm-itanium-thread-local.cpp | 2 +-
clang/test/CodeGenCXX/windows-x86-swiftcall.cpp | 6 +-
clang/test/CodeGenCXX/x86_32-arguments.cpp | 8 +-
clang/test/CodeGenCXX/x86_64-arguments-avx.cpp | 2 +-
.../test/CodeGenCXX/x86_64-arguments-nacl-x32.cpp | 2 +-
clang/test/CodeGenCXX/x86_64-arguments.cpp | 2 +-
.../CodeGenCoroutines/coro-alloc-exp-namespace.cpp | 26 +-
clang/test/CodeGenCoroutines/coro-alloc.cpp | 26 +-
.../CodeGenCoroutines/coro-await-exp-namespace.cpp | 2 +-
clang/test/CodeGenCoroutines/coro-await.cpp | 4 +
clang/test/CodeGenCoroutines/coro-builtins.c | 2 +-
.../coro-cleanup-exp-namespace.cpp | 6 +-
clang/test/CodeGenCoroutines/coro-cleanup.cpp | 6 +-
.../CodeGenCoroutines/coro-gro-exp-namespace.cpp | 6 +-
.../coro-gro-nrvo-exp-namespace.cpp | 8 +-
clang/test/CodeGenCoroutines/coro-gro-nrvo.cpp | 8 +-
clang/test/CodeGenCoroutines/coro-gro.cpp | 6 +-
.../coro-params-exp-namespace.cpp | 22 +-
clang/test/CodeGenCoroutines/coro-params.cpp | 22 +-
.../coro-promise-dtor-exp-namespace.cpp | 2 +-
clang/test/CodeGenCoroutines/coro-promise-dtor.cpp | 2 +-
.../coro-ret-void-exp-namespace.cpp | 2 +-
clang/test/CodeGenCoroutines/coro-ret-void.cpp | 5 +
.../coro-return-exp-namespace.cpp | 6 +-
clang/test/CodeGenCoroutines/coro-return.cpp | 6 +-
.../coro-symmetric-transfer-01.cpp | 26 +-
clang/test/CodeGenObjC/arc-blocks.m | 44 +-
clang/test/CodeGenObjC/arc-foreach.m | 4 +-
clang/test/CodeGenObjC/arc-literals.m | 16 +-
clang/test/CodeGenObjC/arc-no-arc-exceptions.m | 6 +-
clang/test/CodeGenObjC/arc-precise-lifetime.m | 4 +-
clang/test/CodeGenObjC/arc-property.m | 10 +-
clang/test/CodeGenObjC/arc-ternary-op.m | 4 +-
clang/test/CodeGenObjC/arc.m | 44 +-
.../CodeGenObjC/arm-atomic-scalar-setter-getter.m | 4 +-
clang/test/CodeGenObjC/atomic-aggregate-property.m | 4 +-
.../test/CodeGenObjC/availability-cf-link-guard.m | 2 +-
clang/test/CodeGenObjC/blocks.m | 4 +-
clang/test/CodeGenObjC/builtin-constant-p.m | 4 +-
clang/test/CodeGenObjC/class-stubs.m | 10 +-
clang/test/CodeGenObjC/debug-info-blocks.m | 2 +-
clang/test/CodeGenObjC/debug-info-nested-blocks.m | 2 +-
clang/test/CodeGenObjC/exceptions.m | 16 +-
clang/test/CodeGenObjC/for-in.m | 2 +-
clang/test/CodeGenObjC/fragile-arc.m | 8 +-
clang/test/CodeGenObjC/gnu-exceptions.m | 4 +-
clang/test/CodeGenObjC/implicit-objc_msgSend.m | 2 +-
clang/test/CodeGenObjC/ivar-invariant.m | 2 +-
clang/test/CodeGenObjC/local-static-block.m | 2 +-
clang/test/CodeGenObjC/mangle-blocks.m | 6 +-
clang/test/CodeGenObjC/matrix-type-builtins.m | 16 +-
clang/test/CodeGenObjC/matrix-type-operators.m | 10 +-
clang/test/CodeGenObjC/noescape.m | 10 +-
.../CodeGenObjC/nontrivial-c-struct-exception.m | 2 +-
.../nontrivial-c-struct-within-struct-name.m | 6 +-
.../CodeGenObjC/nsvalue-objc-boxable-ios-arc.m | 12 +-
clang/test/CodeGenObjC/nsvalue-objc-boxable-ios.m | 12 +-
.../CodeGenObjC/nsvalue-objc-boxable-mac-arc.m | 12 +-
clang/test/CodeGenObjC/nsvalue-objc-boxable-mac.m | 12 +-
.../CodeGenObjC/objc-container-subscripting-1.m | 8 +-
clang/test/CodeGenObjC/objc-literal-tests.m | 26 +-
.../CodeGenObjC/objc-non-trivial-struct-nrvo.m | 6 +-
clang/test/CodeGenObjC/objfw.m | 2 +-
clang/test/CodeGenObjC/optimize-ivar-offset-load.m | 2 +-
clang/test/CodeGenObjC/os_log.m | 12 +-
clang/test/CodeGenObjC/parameterized_classes.m | 2 +-
clang/test/CodeGenObjC/pass-by-value-noalias.m | 4 +-
clang/test/CodeGenObjC/property-array-type.m | 2 +-
clang/test/CodeGenObjC/property-atomic-bool.m | 4 +-
clang/test/CodeGenObjC/property-ref-cast-to-void.m | 4 +-
clang/test/CodeGenObjC/property.m | 10 +-
clang/test/CodeGenObjC/return-objc-object.mm | 4 +-
clang/test/CodeGenObjC/stret_lookup.m | 4 +-
clang/test/CodeGenObjC/strong-in-c-struct.m | 54 +-
.../test/CodeGenObjC/tentative-cfconstantstring.m | 2 +-
clang/test/CodeGenObjC/terminate.m | 8 +-
clang/test/CodeGenObjC/ubsan-bool.m | 6 +-
clang/test/CodeGenObjC/ubsan-nonnull.m | 12 +-
clang/test/CodeGenObjC/ubsan-nullability.m | 4 +-
clang/test/CodeGenObjC/weak-in-c-struct.m | 30 +-
clang/test/CodeGenObjCXX/arc-attrs.mm | 18 +-
clang/test/CodeGenObjCXX/arc-blocks.mm | 6 +-
clang/test/CodeGenObjCXX/arc-cxx11-init-list.mm | 2 +-
clang/test/CodeGenObjCXX/arc-cxx11-member-init.mm | 4 +-
clang/test/CodeGenObjCXX/arc-exceptions.mm | 8 +-
.../CodeGenObjCXX/arc-forwarded-lambda-call.mm | 8 +-
clang/test/CodeGenObjCXX/arc-globals.mm | 4 +-
clang/test/CodeGenObjCXX/arc-list-init-destruct.mm | 2 +-
clang/test/CodeGenObjCXX/arc-mangle.mm | 22 +-
clang/test/CodeGenObjCXX/arc-marker-funclet.mm | 2 +-
clang/test/CodeGenObjCXX/arc-move.mm | 6 +-
clang/test/CodeGenObjCXX/arc-new-delete.mm | 16 +-
clang/test/CodeGenObjCXX/arc-references.mm | 6 +-
clang/test/CodeGenObjCXX/arc-rv-attr.mm | 2 +-
.../CodeGenObjCXX/arc-special-member-functions.mm | 2 +-
clang/test/CodeGenObjCXX/arc.mm | 44 +-
.../CodeGenObjCXX/auto-release-result-assert.mm | 8 +-
clang/test/CodeGenObjCXX/block-default-arg.mm | 4 +-
clang/test/CodeGenObjCXX/block-nested-in-lambda.mm | 4 +-
clang/test/CodeGenObjCXX/copy.mm | 2 +-
.../CodeGenObjCXX/implicit-copy-assign-operator.mm | 2 +-
.../CodeGenObjCXX/implicit-copy-constructor.mm | 2 +-
.../inheriting-constructor-cleanup.mm | 2 +-
clang/test/CodeGenObjCXX/lambda-expressions.mm | 20 +-
clang/test/CodeGenObjCXX/lambda-to-block.mm | 18 +-
clang/test/CodeGenObjCXX/literals.mm | 8 +-
.../test/CodeGenObjCXX/lvalue-reference-getter.mm | 4 +-
clang/test/CodeGenObjCXX/mangle-blocks.mm | 8 +-
clang/test/CodeGenObjCXX/message-reference.mm | 2 +-
clang/test/CodeGenObjCXX/message.mm | 4 +-
.../CodeGenObjCXX/objc-container-subscripting.mm | 2 +-
clang/test/CodeGenObjCXX/objc-struct-cxx-abi.mm | 54 +-
clang/test/CodeGenObjCXX/objc-weak.mm | 4 +-
.../CodeGenObjCXX/property-dot-copy-elision.mm | 6 +-
clang/test/CodeGenObjCXX/property-dot-reference.mm | 22 +-
.../test/CodeGenObjCXX/property-lvalue-capture.mm | 6 +-
clang/test/CodeGenObjCXX/property-lvalue-lambda.mm | 2 +-
.../CodeGenObjCXX/property-object-reference-1.mm | 2 +-
.../CodeGenObjCXX/property-object-reference-2.mm | 14 +-
clang/test/CodeGenObjCXX/property-objects.mm | 14 +-
clang/test/CodeGenObjCXX/property-reference.mm | 6 +-
clang/test/CodeGenObjCXX/selector-expr-lvalue.mm | 2 +-
.../CodeGenObjCXX/synthesized-property-cleanup.mm | 2 +-
.../ubsan-nullability-return-notypeloc.mm | 2 +-
clang/test/CodeGenOpenCL/addr-space-struct-arg.cl | 20 +-
clang/test/CodeGenOpenCL/address-spaces.cl | 10 +-
.../CodeGenOpenCL/amdgcn-automatic-variable.cl | 8 +-
.../test/CodeGenOpenCL/amdgpu-abi-struct-coerce.cl | 48 +-
clang/test/CodeGenOpenCL/amdgpu-call-kernel.cl | 2 +-
clang/test/CodeGenOpenCL/amdgpu-nullptr.cl | 8 +-
clang/test/CodeGenOpenCL/as_type.cl | 26 +-
clang/test/CodeGenOpenCL/atomic-ops-libcall.cl | 54 +-
clang/test/CodeGenOpenCL/blocks.cl | 12 +-
clang/test/CodeGenOpenCL/byval.cl | 4 +-
.../test/CodeGenOpenCL/cl20-device-side-enqueue.cl | 6 +-
clang/test/CodeGenOpenCL/const-str-array-decay.cl | 2 +-
.../CodeGenOpenCL/constant-addr-space-globals.cl | 2 +-
clang/test/CodeGenOpenCL/convergent.cl | 4 +-
clang/test/CodeGenOpenCL/fpmath.cl | 4 +-
clang/test/CodeGenOpenCL/half.cl | 8 +-
.../kernels-have-spir-cc-by-default.cl | 8 +-
clang/test/CodeGenOpenCL/no-half.cl | 4 +-
clang/test/CodeGenOpenCL/overload.cl | 20 +-
clang/test/CodeGenOpenCL/printf.cl | 12 +-
clang/test/CodeGenOpenCL/size_t.cl | 60 +-
clang/test/CodeGenOpenCL/spir-calling-conv.cl | 10 +-
.../CodeGenOpenCLCXX/address-space-deduction.clcpp | 2 +-
.../CodeGenOpenCLCXX/addrspace-derived-base.clcpp | 4 +-
.../CodeGenOpenCLCXX/addrspace-new-delete.clcpp | 2 +-
.../test/CodeGenOpenCLCXX/addrspace-of-this.clcpp | 32 +-
.../CodeGenOpenCLCXX/addrspace-operators.clcpp | 4 +-
.../CodeGenOpenCLCXX/addrspace-references.clcpp | 2 +-
.../CodeGenOpenCLCXX/addrspace-with-class.clcpp | 22 +-
.../CodeGenOpenCLCXX/template-address-spaces.clcpp | 6 +-
.../test/CodeGenSYCL/address-space-conversions.cpp | 52 +-
clang/test/CodeGenSYCL/address-space-mangling.cpp | 16 +-
clang/test/CodeGenSYCL/unique_stable_name.cpp | 40 +-
clang/test/Headers/ms-arm64-intrin.cpp | 6 +-
clang/test/Headers/stdarg.cpp | 28 +-
clang/test/Modules/codegen-extern-template.cpp | 2 +-
clang/test/Modules/codegen.test | 2 +-
clang/test/Modules/cxx-irgen.cpp | 2 +-
clang/test/Modules/initializers.cpp | 4 +-
clang/test/Modules/templates.mm | 8 +-
clang/test/OpenMP/allocate_codegen.cpp | 2 +-
clang/test/OpenMP/allocate_codegen_attr.cpp | 2 +-
clang/test/OpenMP/assumes_include_nvptx.cpp | 6 +-
clang/test/OpenMP/atomic_capture_codegen.cpp | 28 +-
clang/test/OpenMP/atomic_codegen.cpp | 8 +-
clang/test/OpenMP/atomic_read_codegen.c | 14 +-
clang/test/OpenMP/atomic_update_codegen.cpp | 28 +-
clang/test/OpenMP/atomic_write_codegen.c | 18 +-
clang/test/OpenMP/cancel_codegen.cpp | 104 +-
clang/test/OpenMP/cancellation_point_codegen.cpp | 28 +-
clang/test/OpenMP/debug-info-complex-byval.cpp | 49 +-
clang/test/OpenMP/debug-info-openmp-array.cpp | 6 +-
clang/test/OpenMP/declare_mapper_codegen.cpp | 20 +-
clang/test/OpenMP/declare_reduction_codegen.c | 48 +-
clang/test/OpenMP/declare_reduction_codegen.cpp | 46 +-
.../declare_reduction_codegen_in_templates.cpp | 2 +-
clang/test/OpenMP/declare_target_codegen.cpp | 4 +-
.../declare_target_codegen_globalization.cpp | 12 +-
clang/test/OpenMP/declare_target_link_codegen.cpp | 4 +-
clang/test/OpenMP/declare_variant_mixed_codegen.c | 12 +-
clang/test/OpenMP/distribute_codegen.cpp | 304 +-
.../OpenMP/distribute_firstprivate_codegen.cpp | 329 +-
.../test/OpenMP/distribute_lastprivate_codegen.cpp | 361 ++-
.../OpenMP/distribute_parallel_for_codegen.cpp | 576 ++--
...istribute_parallel_for_firstprivate_codegen.cpp | 385 ++-
.../OpenMP/distribute_parallel_for_if_codegen.cpp | 320 +-
...distribute_parallel_for_lastprivate_codegen.cpp | 449 ++-
...distribute_parallel_for_num_threads_codegen.cpp | 481 ++-
.../distribute_parallel_for_private_codegen.cpp | 425 ++-
.../distribute_parallel_for_proc_bind_codegen.cpp | 29 +-
...tribute_parallel_for_reduction_task_codegen.cpp | 44 +-
.../distribute_parallel_for_simd_codegen.cpp | 592 ++--
...bute_parallel_for_simd_firstprivate_codegen.cpp | 1362 ++++-----
.../distribute_parallel_for_simd_if_codegen.cpp | 3192 ++++++++++----------
...ibute_parallel_for_simd_lastprivate_codegen.cpp | 1336 ++++----
...ibute_parallel_for_simd_num_threads_codegen.cpp | 2640 ++++++++--------
...istribute_parallel_for_simd_private_codegen.cpp | 1288 ++++----
...tribute_parallel_for_simd_proc_bind_codegen.cpp | 236 +-
clang/test/OpenMP/distribute_private_codegen.cpp | 345 ++-
clang/test/OpenMP/distribute_simd_codegen.cpp | 512 ++--
.../distribute_simd_firstprivate_codegen.cpp | 944 +++---
.../OpenMP/distribute_simd_lastprivate_codegen.cpp | 1008 +++----
.../OpenMP/distribute_simd_private_codegen.cpp | 1056 +++----
.../OpenMP/distribute_simd_reduction_codegen.cpp | 272 +-
clang/test/OpenMP/for_codegen.cpp | 16 +-
clang/test/OpenMP/for_firstprivate_codegen.cpp | 313 +-
clang/test/OpenMP/for_lastprivate_codegen.cpp | 601 ++--
clang/test/OpenMP/for_linear_codegen.cpp | 165 +-
clang/test/OpenMP/for_private_codegen.cpp | 177 +-
clang/test/OpenMP/for_reduction_codegen.cpp | 760 ++---
clang/test/OpenMP/for_reduction_codegen_UDR.cpp | 936 +++---
clang/test/OpenMP/for_reduction_task_codegen.cpp | 36 +-
clang/test/OpenMP/for_scan_codegen.cpp | 2 +-
clang/test/OpenMP/for_simd_codegen.cpp | 6 +-
clang/test/OpenMP/for_simd_scan_codegen.cpp | 2 +-
clang/test/OpenMP/function-attr.cpp | 8 +-
clang/test/OpenMP/irbuilder_for_iterator.cpp | 24 +-
clang/test/OpenMP/irbuilder_for_rangefor.cpp | 28 +-
clang/test/OpenMP/irbuilder_for_unsigned.c | 6 +-
...builder_unroll_partial_heuristic_constant_for.c | 2 +-
...builder_unroll_partial_heuristic_for_collapse.c | 380 ++-
...rbuilder_unroll_partial_heuristic_runtime_for.c | 2 +-
clang/test/OpenMP/master_taskloop_codegen.cpp | 10 +-
.../master_taskloop_firstprivate_codegen.cpp | 22 +-
.../master_taskloop_in_reduction_codegen.cpp | 12 +-
.../OpenMP/master_taskloop_lastprivate_codegen.cpp | 22 +-
.../OpenMP/master_taskloop_private_codegen.cpp | 22 +-
.../OpenMP/master_taskloop_reduction_codegen.cpp | 22 +-
clang/test/OpenMP/master_taskloop_simd_codegen.cpp | 8 +-
.../master_taskloop_simd_firstprivate_codegen.cpp | 22 +-
.../master_taskloop_simd_in_reduction_codegen.cpp | 12 +-
.../master_taskloop_simd_lastprivate_codegen.cpp | 22 +-
.../master_taskloop_simd_private_codegen.cpp | 22 +-
.../master_taskloop_simd_reduction_codegen.cpp | 22 +-
clang/test/OpenMP/nvptx_allocate_codegen.cpp | 8 +-
clang/test/OpenMP/nvptx_data_sharing.cpp | 8 +-
.../nvptx_declare_target_var_ctor_dtor_codegen.cpp | 28 +-
.../OpenMP/nvptx_declare_variant_name_mangling.cpp | 4 +-
...tx_distribute_parallel_generic_mode_codegen.cpp | 48 +-
clang/test/OpenMP/nvptx_lambda_capturing.cpp | 122 +-
.../OpenMP/nvptx_multi_target_parallel_codegen.cpp | 18 +-
.../test/OpenMP/nvptx_nested_parallel_codegen.cpp | 72 +-
clang/test/OpenMP/nvptx_parallel_codegen.cpp | 52 +-
clang/test/OpenMP/nvptx_parallel_for_codegen.cpp | 6 +-
clang/test/OpenMP/nvptx_target_codegen.cpp | 10 +-
.../OpenMP/nvptx_target_firstprivate_codegen.cpp | 8 +-
.../test/OpenMP/nvptx_target_parallel_codegen.cpp | 48 +-
.../nvptx_target_parallel_num_threads_codegen.cpp | 48 +-
.../nvptx_target_parallel_reduction_codegen.cpp | 18 +-
...get_parallel_reduction_codegen_tbaa_PR46146.cpp | 10 +-
clang/test/OpenMP/nvptx_target_printf_codegen.c | 4 +-
clang/test/OpenMP/nvptx_target_teams_codegen.cpp | 48 +-
.../nvptx_target_teams_distribute_codegen.cpp | 18 +-
...arget_teams_distribute_parallel_for_codegen.cpp | 144 +-
...istribute_parallel_for_generic_mode_codegen.cpp | 72 +-
..._teams_distribute_parallel_for_simd_codegen.cpp | 72 +-
.../nvptx_target_teams_distribute_simd_codegen.cpp | 22 +-
clang/test/OpenMP/nvptx_teams_codegen.cpp | 32 +-
.../test/OpenMP/nvptx_teams_reduction_codegen.cpp | 162 +-
.../test/OpenMP/nvptx_unsupported_type_codegen.cpp | 4 +-
clang/test/OpenMP/openmp_offload_codegen.cpp | 2 +-
clang/test/OpenMP/openmp_win_codegen.cpp | 7 +-
clang/test/OpenMP/ordered_codegen.cpp | 76 +-
clang/test/OpenMP/parallel_codegen.cpp | 100 +-
clang/test/OpenMP/parallel_copyin_codegen.cpp | 613 ++--
.../test/OpenMP/parallel_firstprivate_codegen.cpp | 44 +-
clang/test/OpenMP/parallel_for_codegen.cpp | 224 +-
.../parallel_for_lastprivate_conditional.cpp | 17 +-
clang/test/OpenMP/parallel_for_linear_codegen.cpp | 93 +-
.../OpenMP/parallel_for_reduction_task_codegen.cpp | 36 +-
clang/test/OpenMP/parallel_for_scan_codegen.cpp | 2 +-
.../OpenMP/parallel_for_simd_aligned_codegen.cpp | 72 +-
clang/test/OpenMP/parallel_for_simd_codegen.cpp | 6 +-
.../test/OpenMP/parallel_for_simd_scan_codegen.cpp | 2 +-
clang/test/OpenMP/parallel_if_codegen.cpp | 100 +-
clang/test/OpenMP/parallel_if_codegen_PR51349.cpp | 2 +-
clang/test/OpenMP/parallel_master_codegen.cpp | 63 +-
.../parallel_master_reduction_task_codegen.cpp | 36 +-
.../OpenMP/parallel_master_taskloop_codegen.cpp | 60 +-
...rallel_master_taskloop_firstprivate_codegen.cpp | 20 +-
...arallel_master_taskloop_lastprivate_codegen.cpp | 282 +-
.../parallel_master_taskloop_private_codegen.cpp | 20 +-
.../parallel_master_taskloop_reduction_codegen.cpp | 22 +-
.../parallel_master_taskloop_simd_codegen.cpp | 160 +-
...l_master_taskloop_simd_firstprivate_codegen.cpp | 20 +-
...el_master_taskloop_simd_lastprivate_codegen.cpp | 470 +--
...rallel_master_taskloop_simd_private_codegen.cpp | 20 +-
...llel_master_taskloop_simd_reduction_codegen.cpp | 22 +-
clang/test/OpenMP/parallel_num_threads_codegen.cpp | 4 +-
clang/test/OpenMP/parallel_private_codegen.cpp | 261 +-
clang/test/OpenMP/parallel_reduction_codegen.cpp | 501 ++-
.../OpenMP/parallel_reduction_task_codegen.cpp | 36 +-
clang/test/OpenMP/parallel_sections_codegen.cpp | 13 +-
.../parallel_sections_reduction_task_codegen.cpp | 36 +-
clang/test/OpenMP/reduction_compound_op.cpp | 12 +-
.../test/OpenMP/sections_firstprivate_codegen.cpp | 321 +-
clang/test/OpenMP/sections_lastprivate_codegen.cpp | 433 ++-
clang/test/OpenMP/sections_private_codegen.cpp | 189 +-
clang/test/OpenMP/sections_reduction_codegen.cpp | 353 ++-
.../OpenMP/sections_reduction_task_codegen.cpp | 36 +-
clang/test/OpenMP/simd_codegen.cpp | 8 +-
clang/test/OpenMP/single_codegen.cpp | 597 ++--
clang/test/OpenMP/single_firstprivate_codegen.cpp | 321 +-
clang/test/OpenMP/single_private_codegen.cpp | 189 +-
clang/test/OpenMP/target_codegen.cpp | 12 +-
.../test/OpenMP/target_codegen_global_capture.cpp | 104 +-
clang/test/OpenMP/target_defaultmap_codegen_01.cpp | 676 ++---
clang/test/OpenMP/target_depend_codegen.cpp | 14 +-
clang/test/OpenMP/target_enter_data_codegen.cpp | 2 +-
.../OpenMP/target_enter_data_depend_codegen.cpp | 8 +-
clang/test/OpenMP/target_exit_data_codegen.cpp | 2 +-
.../OpenMP/target_exit_data_depend_codegen.cpp | 8 +-
clang/test/OpenMP/target_firstprivate_codegen.cpp | 12 +-
clang/test/OpenMP/target_map_codegen_00.cpp | 2 +-
clang/test/OpenMP/target_map_codegen_01.cpp | 4 +-
clang/test/OpenMP/target_map_codegen_02.cpp | 2 +-
clang/test/OpenMP/target_map_codegen_03.cpp | 96 +-
clang/test/OpenMP/target_map_codegen_04.cpp | 2 +-
clang/test/OpenMP/target_map_codegen_05.cpp | 2 +-
clang/test/OpenMP/target_map_codegen_06.cpp | 2 +-
clang/test/OpenMP/target_map_codegen_07.cpp | 2 +-
clang/test/OpenMP/target_map_codegen_11.cpp | 2 +-
clang/test/OpenMP/target_map_codegen_12.cpp | 2 +-
clang/test/OpenMP/target_map_codegen_13.cpp | 2 +-
clang/test/OpenMP/target_map_codegen_14.cpp | 4 +-
clang/test/OpenMP/target_map_codegen_15.cpp | 2 +-
clang/test/OpenMP/target_map_codegen_17.cpp | 2 +-
clang/test/OpenMP/target_map_codegen_24.cpp | 2 +-
clang/test/OpenMP/target_map_names.cpp | 2 +-
clang/test/OpenMP/target_map_names_attr.cpp | 2 +-
clang/test/OpenMP/target_parallel_codegen.cpp | 608 ++--
.../test/OpenMP/target_parallel_debug_codegen.cpp | 24 +-
.../test/OpenMP/target_parallel_depend_codegen.cpp | 12 +-
clang/test/OpenMP/target_parallel_for_codegen.cpp | 672 ++---
.../OpenMP/target_parallel_for_debug_codegen.cpp | 24 +-
</cut>
3 years, 7 months
- 1
- 0
[TCWG CI] 464.h264ref slowed down by 7% after llvm: [PassManager] `buildModuleOptimizationPipeline()`: schedule `LoopDeletion` pass run before vectorization passes
by ci_notify＠linaro.org
After llvm commit 9c2469c1ddb34517de8dafd83d1940deada3fc22
Author: Roman Lebedev <lebedev.ri(a)gmail.com>
[PassManager] `buildModuleOptimizationPipeline()`: schedule `LoopDeletion` pass run before vectorization passes
the following benchmarks slowed down by more than 2%:
- 464.h264ref slowed down by 7% from 10836 to 11596 perf samples
- 464.h264ref:[.] FastFullPelBlockMotionSearch slowed down by 46% from 1525 to 2231 perf samples
Below reproducer instructions can be used to re-build both "first_bad" and "last_good" cross-toolchains used in this bisection. Naturally, the scripts will fail when triggerring benchmarking jobs if you don't have access to Linaro TCWG CI.
For your convenience, we have uploaded tarballs with pre-processed source and assembly files at:
- First_bad save-temps: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-…
- Last_good save-temps: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-…
- Baseline save-temps: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-…
Configuration:
- Benchmark: SPEC CPU2006
- Toolchain: Clang + Glibc + LLVM Linker
- Version: all components were built from their tip of trunk
- Target: aarch64-linux-gnu
- Compiler flags: -O3
- Hardware: NVidia TX1 4x Cortex-A57
This benchmarking CI is work-in-progress, and we welcome feedback and suggestions at linaro-toolchain(a)lists.linaro.org . In our improvement plans is to add support for SPEC CPU2017 benchmarks and provide "perf report/annotate" data behind these reports.
THIS IS THE END OF INTERESTING STUFF. BELOW ARE LINKS TO BUILDS, REPRODUCTION INSTRUCTIONS, AND THE RAW COMMIT.
This commit has regressed these CI configurations:
- tcwg_bmk_llvm_tx1/llvm-master-aarch64-spec2k6-O3
First_bad build: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-…
Last_good build: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-…
Baseline build: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-…
Even more details: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-…
Reproduce builds:
<cut>
mkdir investigate-llvm-9c2469c1ddb34517de8dafd83d1940deada3fc22
cd investigate-llvm-9c2469c1ddb34517de8dafd83d1940deada3fc22
# Fetch scripts
git clone https://git.linaro.org/toolchain/jenkins-scripts
# Fetch manifests and test.sh script
mkdir -p artifacts/manifests
curl -o artifacts/manifests/build-baseline.sh https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-… --fail
curl -o artifacts/manifests/build-parameters.sh https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-… --fail
curl -o artifacts/test.sh https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-master-… --fail
chmod +x artifacts/test.sh
# Reproduce the baseline build (build all pre-requisites)
./jenkins-scripts/tcwg_bmk-build.sh @@ artifacts/manifests/build-baseline.sh
# Save baseline build state (which is then restored in artifacts/test.sh)
mkdir -p ./bisect
rsync -a --del --delete-excluded --exclude /bisect/ --exclude /artifacts/ --exclude /llvm/ ./ ./bisect/baseline/
cd llvm
# Reproduce first_bad build
git checkout --detach 9c2469c1ddb34517de8dafd83d1940deada3fc22
../artifacts/test.sh
# Reproduce last_good build
git checkout --detach 4bef0304e153c757c9f42c2001d4c56e8f99929e
../artifacts/test.sh
cd ..
</cut>
Full commit (up to 1000 lines):
<cut>
commit 9c2469c1ddb34517de8dafd83d1940deada3fc22
Author: Roman Lebedev <lebedev.ri(a)gmail.com>
Date: Wed Nov 3 19:23:25 2021 +0300
[PassManager] `buildModuleOptimizationPipeline()`: schedule `LoopDeletion` pass run before vectorization passes
Test thanks to Michael Kuklinski from `#llvm`: https://godbolt.org/z/bdrah5Goo
originally inspired by Daniel Lemire's https://lemire.me/blog/2021/10/26/in-c-is-empty-faster-than-comparing-the-s…
We manage to deduce that the answer does not require looping,
but we do that after the last `LoopDeletion` pass run,
so we end up being stuck with a dead loop.
Now, as with all things SCEV, this has
a very expected ~`+0.12%` compile time performance regression:
https://llvm-compile-time-tracker.com/compare.php?from=0ae7bf124a9bca76dd9a…
(for comparison, doing that in function simplification pipeline
would have been ~`+0.5` compile time performance regression, D112840)
Looking at the transformation stats over vanilla test-suite, i think it's rather expected:
```
| statistic name | baseline | proposed | Δ | % | |%| |
|--------------------------------------------------|----------:|----------:|------:|-------:|-------:|
| scalar-evolution.NumBruteForceTripCountsComputed | 789 | 888 | 99 | 12.55% | 12.55% |
| scalar-evolution.NumTripCountsNotComputed | 105592 | 117900 | 12308 | 11.66% | 11.66% |
| loop-delete.NumBackedgesBroken | 542 | 559 | 17 | 3.14% | 3.14% |
| regalloc.numExtends | 81 | 79 | -2 | -2.47% | 2.47% |
| indvars.NumFoldedUser | 408 | 400 | -8 | -1.96% | 1.96% |
| indvars.NumElimCmp | 3831 | 3758 | -73 | -1.91% | 1.91% |
| scalar-evolution.NumTripCountsComputed | 299759 | 304278 | 4519 | 1.51% | 1.51% |
| loop-delete.NumDeleted | 8055 | 8128 | 73 | 0.91% | 0.91% |
| machine-cse.NumCommutes | 111 | 110 | -1 | -0.90% | 0.90% |
| globaldce.NumFunctions | 1187 | 1192 | 5 | 0.42% | 0.42% |
| codegenprepare.NumSelectsExpanded | 277 | 278 | 1 | 0.36% | 0.36% |
| loop-unroll.NumRuntimeUnrolled | 13841 | 13791 | -50 | -0.36% | 0.36% |
| machinelicm.NumPostRAHoisted | 1168 | 1172 | 4 | 0.34% | 0.34% |
| phi-node-elimination.NumCriticalEdgesSplit | 83054 | 82879 | -175 | -0.21% | 0.21% |
| machine-cse.NumPREs | 3085 | 3079 | -6 | -0.19% | 0.19% |
| branch-folder.NumBranchOpts | 108122 | 107942 | -180 | -0.17% | 0.17% |
| loop-unroll.NumUnrolled | 40136 | 40067 | -69 | -0.17% | 0.17% |
| branch-folder.NumDeadBlocks | 130818 | 130607 | -211 | -0.16% | 0.16% |
| codegenprepare.NumBlocksElim | 92856 | 92714 | -142 | -0.15% | 0.15% |
| instsimplify.NumSimplified | 103263 | 103129 | -134 | -0.13% | 0.13% |
| instcombine.NumConstProp | 26070 | 26102 | 32 | 0.12% | 0.12% |
| instsimplify.NumExpand | 1716 | 1718 | 2 | 0.12% | 0.12% |
| loop-unroll.NumCompletelyUnrolled | 9236 | 9225 | -11 | -0.12% | 0.12% |
| branch-folder.NumHoist | 2773 | 2770 | -3 | -0.11% | 0.11% |
| regalloc.NumReloadsRemoved | 10822 | 10834 | 12 | 0.11% | 0.11% |
| regalloc.NumSnippets | 11394 | 11406 | 12 | 0.11% | 0.11% |
| machine-cse.NumCrossBBCSEs | 1052 | 1053 | 1 | 0.10% | 0.10% |
| machinelicm.NumCSEed | 99887 | 99784 | -103 | -0.10% | 0.10% |
| branch-folder.NumTailMerge | 72501 | 72435 | -66 | -0.09% | 0.09% |
| codegenprepare.NumExtUses | 22007 | 21987 | -20 | -0.09% | 0.09% |
| local.NumRemoved | 68232 | 68294 | 62 | 0.09% | 0.09% |
| loop-vectorize.LoopsAnalyzed | 75483 | 75413 | -70 | -0.09% | 0.09% |
```
Note that i'm only changing current PM, and not touching obsolete PM.
This is an alternative to the function simplification pipeline variant
of the same change, D112840. It has both less compile time impact
(since the additional number of SCEV trip count calculations
is way lass less than with the D112840), and it is
much more powerful/impactful (almost 2x more loops deleted).
I have checked, and doing this after loop rotation
is favorable (more loops deleted).
Reviewed By: mkazantsev
Differential Revision: https://reviews.llvm.org/D112851
---
llvm/lib/Passes/PassBuilderPipelines.cpp | 9 +++-
llvm/test/Other/new-pm-defaults.ll | 1 +
llvm/test/Other/new-pm-thinlto-defaults.ll | 1 +
.../Other/new-pm-thinlto-postlink-pgo-defaults.ll | 1 +
.../new-pm-thinlto-postlink-samplepgo-defaults.ll | 1 +
...letion-of-loops-that-became-side-effect-free.ll | 49 ++++------------------
6 files changed, 18 insertions(+), 44 deletions(-)
diff --git a/llvm/lib/Passes/PassBuilderPipelines.cpp b/llvm/lib/Passes/PassBuilderPipelines.cpp
index 2009a687ae7d..f0f7803ed3ae 100644
--- a/llvm/lib/Passes/PassBuilderPipelines.cpp
+++ b/llvm/lib/Passes/PassBuilderPipelines.cpp
@@ -1093,11 +1093,16 @@ PassBuilder::buildModuleOptimizationPipeline(OptimizationLevel Level,
for (auto &C : VectorizerStartEPCallbacks)
C(OptimizePM, Level);
+ LoopPassManager LPM;
// First rotate loops that may have been un-rotated by prior passes.
// Disable header duplication at -Oz.
+ LPM.addPass(LoopRotatePass(Level != OptimizationLevel::Oz, LTOPreLink));
+ // Some loops may have become dead by now. Try to delete them.
+ // FIXME: see disscussion in https://reviews.llvm.org/D112851
+ // this may need to be revisited once GVN is more powerful.
+ LPM.addPass(LoopDeletionPass());
OptimizePM.addPass(createFunctionToLoopPassAdaptor(
- LoopRotatePass(Level != OptimizationLevel::Oz, LTOPreLink),
- /*UseMemorySSA=*/false, /*UseBlockFrequencyInfo=*/false));
+ std::move(LPM), /*UseMemorySSA=*/false, /*UseBlockFrequencyInfo=*/false));
// Distribute loops to allow partial vectorization. I.e. isolate dependences
// into separate loop that would otherwise inhibit vectorization. This is
diff --git a/llvm/test/Other/new-pm-defaults.ll b/llvm/test/Other/new-pm-defaults.ll
index 5067b6fbdd18..b9f90dad8224 100644
--- a/llvm/test/Other/new-pm-defaults.ll
+++ b/llvm/test/Other/new-pm-defaults.ll
@@ -216,6 +216,7 @@
; CHECK-O-NEXT: Running pass: LoopSimplifyPass
; CHECK-O-NEXT: Running pass: LCSSAPass
; CHECK-O-NEXT: Running pass: LoopRotatePass
+; CHECK-O-NEXT: Running pass: LoopDeletionPass
; CHECK-O-NEXT: Running pass: LoopDistributePass
; CHECK-O-NEXT: Running pass: InjectTLIMappings
; CHECK-O-NEXT: Running pass: LoopVectorizePass
diff --git a/llvm/test/Other/new-pm-thinlto-defaults.ll b/llvm/test/Other/new-pm-thinlto-defaults.ll
index 1f52fe47ae73..7836de5c6cce 100644
--- a/llvm/test/Other/new-pm-thinlto-defaults.ll
+++ b/llvm/test/Other/new-pm-thinlto-defaults.ll
@@ -196,6 +196,7 @@
; CHECK-POSTLINK-O-NEXT: Running pass: LoopSimplifyPass
; CHECK-POSTLINK-O-NEXT: Running pass: LCSSAPass
; CHECK-POSTLINK-O-NEXT: Running pass: LoopRotatePass
+; CHECK-POSTLINK-O-NEXT: Running pass: LoopDeletionPass
; CHECK-POSTLINK-O-NEXT: Running pass: LoopDistributePass
; CHECK-POSTLINK-O-NEXT: Running pass: InjectTLIMappings
; CHECK-POSTLINK-O-NEXT: Running pass: LoopVectorizePass
diff --git a/llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll b/llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
index 3a80efba3c56..e66e8672358c 100644
--- a/llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
+++ b/llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
@@ -167,6 +167,7 @@
; CHECK-O-NEXT: Running pass: LoopSimplifyPass on foo
; CHECK-O-NEXT: Running pass: LCSSAPass on foo
; CHECK-O-NEXT: Running pass: LoopRotatePass
+; CHECK-O-NEXT: Running pass: LoopDeletionPass
; CHECK-O-NEXT: Running pass: LoopDistributePass
; CHECK-O-NEXT: Running pass: InjectTLIMappings
; CHECK-O-NEXT: Running pass: LoopVectorizePass
diff --git a/llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll b/llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
index 2e822b21f8a1..410841124c8e 100644
--- a/llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
+++ b/llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
@@ -179,6 +179,7 @@
; CHECK-O-NEXT: Running pass: LoopSimplifyPass
; CHECK-O-NEXT: Running pass: LCSSAPass
; CHECK-O-NEXT: Running pass: LoopRotatePass
+; CHECK-O-NEXT: Running pass: LoopDeletionPass
; CHECK-O-NEXT: Running pass: LoopDistributePass
; CHECK-O-NEXT: Running pass: InjectTLIMappings
; CHECK-O-NEXT: Running pass: LoopVectorizePass
diff --git a/llvm/test/Transforms/PhaseOrdering/deletion-of-loops-that-became-side-effect-free.ll b/llvm/test/Transforms/PhaseOrdering/deletion-of-loops-that-became-side-effect-free.ll
index ec8db3cceeb1..99a52acd3b2b 100644
--- a/llvm/test/Transforms/PhaseOrdering/deletion-of-loops-that-became-side-effect-free.ll
+++ b/llvm/test/Transforms/PhaseOrdering/deletion-of-loops-that-became-side-effect-free.ll
@@ -11,17 +11,8 @@
define dso_local zeroext i1 @is_not_empty_variant1(%struct.node* %p) {
; ALL-LABEL: @is_not_empty_variant1(
; ALL-NEXT: entry:
-; ALL-NEXT: [[TOBOOL_NOT3_I:%.*]] = icmp eq %struct.node* [[P:%.*]], null
-; ALL-NEXT: br i1 [[TOBOOL_NOT3_I]], label [[COUNT_NODES_VARIANT1_EXIT:%.*]], label [[WHILE_BODY_I:%.*]]
-; ALL: while.body.i:
-; ALL-NEXT: [[P_ADDR_04_I:%.*]] = phi %struct.node* [ [[TMP0:%.*]], [[WHILE_BODY_I]] ], [ [[P]], [[ENTRY:%.*]] ]
-; ALL-NEXT: [[NEXT_I:%.*]] = getelementptr inbounds [[STRUCT_NODE:%.*]], %struct.node* [[P_ADDR_04_I]], i64 0, i32 0
-; ALL-NEXT: [[TMP0]] = load %struct.node*, %struct.node** [[NEXT_I]], align 8
-; ALL-NEXT: [[TOBOOL_NOT_I:%.*]] = icmp eq %struct.node* [[TMP0]], null
-; ALL-NEXT: br i1 [[TOBOOL_NOT_I]], label [[COUNT_NODES_VARIANT1_EXIT]], label [[WHILE_BODY_I]], !llvm.loop [[LOOP0:![0-9]+]]
-; ALL: count_nodes_variant1.exit:
-; ALL-NEXT: [[TMP1:%.*]] = xor i1 [[TOBOOL_NOT3_I]], true
-; ALL-NEXT: ret i1 [[TMP1]]
+; ALL-NEXT: [[TOBOOL_NOT3_I:%.*]] = icmp ne %struct.node* [[P:%.*]], null
+; ALL-NEXT: ret i1 [[TOBOOL_NOT3_I]]
;
entry:
%p.addr = alloca %struct.node*, align 8
@@ -113,39 +104,13 @@ while.end:
define dso_local zeroext i1 @is_not_empty_variant3(%struct.node* %p) {
; O3-LABEL: @is_not_empty_variant3(
; O3-NEXT: entry:
-; O3-NEXT: [[TOBOOL_NOT4_I:%.*]] = icmp eq %struct.node* [[P:%.*]], null
-; O3-NEXT: br i1 [[TOBOOL_NOT4_I]], label [[COUNT_NODES_VARIANT3_EXIT:%.*]], label [[WHILE_BODY_I:%.*]]
-; O3: while.body.i:
-; O3-NEXT: [[SIZE_06_I:%.*]] = phi i64 [ [[INC_I:%.*]], [[WHILE_BODY_I]] ], [ 0, [[ENTRY:%.*]] ]
-; O3-NEXT: [[P_ADDR_05_I:%.*]] = phi %struct.node* [ [[TMP0:%.*]], [[WHILE_BODY_I]] ], [ [[P]], [[ENTRY]] ]
-; O3-NEXT: [[CMP_I:%.*]] = icmp ne i64 [[SIZE_06_I]], -1
-; O3-NEXT: tail call void @llvm.assume(i1 [[CMP_I]]) #[[ATTR3:[0-9]+]]
-; O3-NEXT: [[NEXT_I:%.*]] = getelementptr inbounds [[STRUCT_NODE:%.*]], %struct.node* [[P_ADDR_05_I]], i64 0, i32 0
-; O3-NEXT: [[TMP0]] = load %struct.node*, %struct.node** [[NEXT_I]], align 8
-; O3-NEXT: [[INC_I]] = add nuw i64 [[SIZE_06_I]], 1
-; O3-NEXT: [[TOBOOL_NOT_I:%.*]] = icmp eq %struct.node* [[TMP0]], null
-; O3-NEXT: br i1 [[TOBOOL_NOT_I]], label [[COUNT_NODES_VARIANT3_EXIT]], label [[WHILE_BODY_I]], !llvm.loop [[LOOP2:![0-9]+]]
-; O3: count_nodes_variant3.exit:
-; O3-NEXT: [[TMP1:%.*]] = xor i1 [[TOBOOL_NOT4_I]], true
-; O3-NEXT: ret i1 [[TMP1]]
+; O3-NEXT: [[TOBOOL_NOT4_I:%.*]] = icmp ne %struct.node* [[P:%.*]], null
+; O3-NEXT: ret i1 [[TOBOOL_NOT4_I]]
;
; O2-LABEL: @is_not_empty_variant3(
; O2-NEXT: entry:
-; O2-NEXT: [[TOBOOL_NOT4_I:%.*]] = icmp eq %struct.node* [[P:%.*]], null
-; O2-NEXT: br i1 [[TOBOOL_NOT4_I]], label [[COUNT_NODES_VARIANT3_EXIT:%.*]], label [[WHILE_BODY_I:%.*]]
-; O2: while.body.i:
-; O2-NEXT: [[SIZE_06_I:%.*]] = phi i64 [ [[INC_I:%.*]], [[WHILE_BODY_I]] ], [ 0, [[ENTRY:%.*]] ]
-; O2-NEXT: [[P_ADDR_05_I:%.*]] = phi %struct.node* [ [[TMP0:%.*]], [[WHILE_BODY_I]] ], [ [[P]], [[ENTRY]] ]
-; O2-NEXT: [[CMP_I:%.*]] = icmp ne i64 [[SIZE_06_I]], -1
-; O2-NEXT: tail call void @llvm.assume(i1 [[CMP_I]]) #[[ATTR3:[0-9]+]]
-; O2-NEXT: [[NEXT_I:%.*]] = getelementptr inbounds [[STRUCT_NODE:%.*]], %struct.node* [[P_ADDR_05_I]], i64 0, i32 0
-; O2-NEXT: [[TMP0]] = load %struct.node*, %struct.node** [[NEXT_I]], align 8
-; O2-NEXT: [[INC_I]] = add nuw i64 [[SIZE_06_I]], 1
-; O2-NEXT: [[TOBOOL_NOT_I:%.*]] = icmp eq %struct.node* [[TMP0]], null
-; O2-NEXT: br i1 [[TOBOOL_NOT_I]], label [[COUNT_NODES_VARIANT3_EXIT]], label [[WHILE_BODY_I]], !llvm.loop [[LOOP2:![0-9]+]]
-; O2: count_nodes_variant3.exit:
-; O2-NEXT: [[TMP1:%.*]] = xor i1 [[TOBOOL_NOT4_I]], true
-; O2-NEXT: ret i1 [[TMP1]]
+; O2-NEXT: [[TOBOOL_NOT4_I:%.*]] = icmp ne %struct.node* [[P:%.*]], null
+; O2-NEXT: ret i1 [[TOBOOL_NOT4_I]]
;
; O1-LABEL: @is_not_empty_variant3(
; O1-NEXT: entry:
@@ -160,7 +125,7 @@ define dso_local zeroext i1 @is_not_empty_variant3(%struct.node* %p) {
; O1-NEXT: [[TMP0]] = load %struct.node*, %struct.node** [[NEXT_I]], align 8
; O1-NEXT: [[INC_I]] = add i64 [[SIZE_06_I]], 1
; O1-NEXT: [[TOBOOL_NOT_I:%.*]] = icmp eq %struct.node* [[TMP0]], null
-; O1-NEXT: br i1 [[TOBOOL_NOT_I]], label [[COUNT_NODES_VARIANT3_EXIT_LOOPEXIT:%.*]], label [[WHILE_BODY_I]], !llvm.loop [[LOOP2:![0-9]+]]
+; O1-NEXT: br i1 [[TOBOOL_NOT_I]], label [[COUNT_NODES_VARIANT3_EXIT_LOOPEXIT:%.*]], label [[WHILE_BODY_I]], !llvm.loop [[LOOP0:![0-9]+]]
; O1: count_nodes_variant3.exit.loopexit:
; O1-NEXT: [[PHI_CMP:%.*]] = icmp ne i64 [[INC_I]], 0
; O1-NEXT: br label [[COUNT_NODES_VARIANT3_EXIT]]
</cut>
3 years, 7 months
- 1
- 0
[ACTIVITY] week ending Nov. 7 2021
by Alex Bennée
VirtIO Initiative ([STR-9])
===========================
- various rust-vmm discussions
- [upstream rust-vmm sync meeting]
- how to deal with vhost-device/vm-virtio split: [proposal]
- synced with ARM on their interests
- got update on Fwd: FW: [App-services] Slides from the
hypervisor-less virtio status meeting Message-Id:
<CAHDbmO2G4hUyfxtaxwnbxsrMk+P41zbL-7VNe=Aa6DshxC-5zQ(a)mail.gmail.com>
[STR-9] <https://linaro.atlassian.net/browse/STR-9>
[upstream rust-vmm sync meeting]
<https://etherpad.opendev.org/p/rust-vmm-sync-2021&sa=D&source=calendar&ust=…>
[proposal] <https://github.com/rust-vmm/vhost-device/pull/57>
QEMU Upstream Work ([UM-2])
===========================
- did some bug triage and investigated [555] and [690] which might
intersect with earlier changes I made
- spent time on the PR from hell [PULL 00/30] testing, gdbstub and
semihosting Message-Id:
<20210115130828.23968-1-alex.bennee(a)linaro.org>
[UM-2] <https://linaro.atlassian.net/browse/UM-2>
[555] <https://gitlab.com/qemu-project/qemu/-/issues/555>
[690] <https://gitlab.com/qemu-project/qemu/-/issues/690>
Other
=====
- TSC report preparation for QEMU and Stratos
Completed Reviews [1/1]
=======================
[XEN PATCH v7 00/51] xen: Build system improvements, now with out-of-tree build!
Message-Id: <20210824105038.1257926-1-anthony.perard(a)citrix.com>
Absences
========
,----
| (save-excursion
| (goto-char (point-min))
| (when (re-search-forward "* Absences")
| (goto-char (match-beginning 0))
| (org-export-as 'ascii t nil t )))
`----
Current Review Queue
====================
TODO [PATCH v2 00/48] tcg: optimize redundant sign extensions
Message-Id: <20211007195456.1168070-1-richard.henderson(a)linaro.org>
================================================================================================================================
TODO [PATCH] cpu-models-x86.rst: Tidy up a couple of things
Message-Id: <20211015100718.17828-1-pbonzini(a)redhat.com>
===================================================================================================================
TODO [PATCH 00/16] fdt: Make OF_BOARD a boolean option
Message-Id: <20211013010120.96851-1-sjg(a)chromium.org>
===========================================================================================================
TODO [PATCH v4 00/41] linux-user: Streamline handling of SIGSEGV
Message-Id: <20211006172307.780893-1-richard.henderson(a)linaro.org>
==================================================================================================================================
--
Alex Bennée
3 years, 7 months
- 1
- 0