== This week ==
* Fixed the unnecessary union initialisers that were causing ICEs
with -g. This turned out to be a lot more work than Richard's
one-liner suggested. :-)
* Backported Chung-Lin's arm_legitimize_reload_address patch to 4.5.
* Backported the smallest_mode_for_size patch to 4.5 and 4.6.
* Patch review.
* Found an off-by-one error in the vectoriser that caused it to think
that contiguous memory regions overlapped. Unfortunately, this meant
that a lot of my microbenchmarks were using the fallback ARM code
instead of the nice-looking NEON code that I could see in the asm.
* A bit more work on auto inc/dec. It tested regression-free for all
default languages. Ran some more benchmarks and posted the results.
== Next week ==
* Bugs and auto inc/dec.
Richard
Hi,
* analyzed/tested toolchain issues the Linaro Android folks are facing
* libquadmath disabled due to configure test fail of the target
libiberty (#809435)
* fix will be in 11.07 release
* ICE when building bionic's libm (#809768)
* not reproducible with a "plain" Linaro GCC
* non upstreamable workaround in place
(prevents the ICE but degrades the DWARF quality)
* binary toolchain at http://people.linaro.org/~kwerner/
* libunwind
* localunwrework branch now on git.linaro.org
Note: I'll take two days off at the end of next week (21-22).
Regards
Ken
Achieved:
* Set up networking on the Panda board, ssh to the board from my laptop
works fine.
* Downloaded the benchmarks (SPEC2000 and EEMBC) and built them for x86. I
now have a basic understanding of what the benchmarks do and how to run
them.
* For EEMBC I used the -m32 flag for building on my 64 bit installation.
* For the SPEC2000 I used the Linaro configuration file and enabled the
portability flags for a 64-bit host. Played around with different "runspec"
actions and options. Building and running individual test cases as well as
the full test suites. Finally I did a reportable run for all benchmarks. It
took several hours and in the end I got a result for my laptop.
Next step:
* Cross-compile EEMBC and SPEC2000. I will try linaro-gcc and the cross
compiler that comes with Natty.
Best Regards
Åsa
Hi,
- merged over-widened multiply patch to gcc-linaro-4.6 (now vectorized
rgbyiqv should be about as good as its scalar version)
- continued working on over-widened shifts and bit operations
Ira
Hi,
I used Linaro cross-toolchain version 4.5
(gcc-4.5-arm-linux-gnueabi) to compile linux-linaro-11.05 for beagle
board,
but got the following error messages:
----
AS arch/arm/boot/compressed/head.o
arch/arm/boot/compressed/head.S: Assembler messages:
arch/arm/boot/compressed/head.S:127: Error: selected processor does not
support requested special purpose register -- `mrs r2,cpsr'
arch/arm/boot/compressed/head.S:134: Error: selected processor does not
support requested special purpose register -- `mrs r2,cpsr'
arch/arm/boot/compressed/head.S:136: Error: selected processor does not
support requested special purpose register -- `msr cpsr_c,r2'
make[2]: *** [arch/arm/boot/compressed/head.o] Error 1
make[1]: *** [arch/arm/boot/compressed/vmlinux] Error 2
make: *** [uImage] Error 2
----
The .config file I used for kernel build is
"config-2.6.38-1003-linaro-omap" which is from
hwpack_linaro-omap3-x11-base_20110526-5_armel_supported.tar.gz
My host development platform is 64-bit Ubuntu 10.04.2 LTS (Linux
ubuntu 2.6.32-32-generic #62-Ubuntu SMP Wed Apr 20 21:52:38 UTC 2011
x86_64 GNU/Linux).
Is this a known bug, or did I miss anything else ?
Thanks.
--------------------------------- Email Confidentiality Notice
------------------------------------------
If you are not the intended recipient for this CONFIDENTIAL E-mail, please
delete it immediately without keeping or distributing any copy and notify
the sender.
----------------------------------------------------------------------------------------------------------------------
== GCC ==
=== Progress ===
* Panda board up again with apparently no change with software on it.
Not sure what caused the difference today ! Now chugging along with
SPEC2k.
* Back on to BRANCH_COST . SPEC2k now running fully whence panda
board was restored.
* Submitted cleaned up neon shift immediates patch for merging.
* On merge request review in Linaro this week.
* Backported arith_shiftsi patch to 4.6 branch upstream. (done)
* Identified particular patterns that have issues with scheduler
descriptions in A8 and A9 . Working on fixes.
=== Plans ===
* Submit one_cmpldi2 patch for neon upstream.
* Finish the scheduler patches.
* Investigate A8 vs A9 regressions.
* Look at EPILOGUE_USES and coremark . not sure why it regresses in
performance yet.
Meetings:
* 1-1s
* TCWG calls
Absences.
* 1st Aug - 5th August - Linaro sprint.
* 8th - 9th August - Internal training.
* 29th Aug - Sept. 2 - Vacation.
Hi,
* fixed a bug where libunwind could segfault when unwinding through a
shared library using the ARM specific unwind tables
* discussed the libuwind internals with Uli (thanks!) and concluded
that the best way to implement remote unwinding for ARM is to integrate
the support for the ARM.exidx* directly into the DWARF code
* otherwise the user visible remote API needs to be extended for ARM
only which seems to be a bad idea
* requires to re-implement the existent ARM code (both local and remote)
* will also benefit from libunwind's (dwarf) caching mechanism
* started to re-implement the ARM code
Regards
Ken
- Continue Spec2006 analysis:
Looking into SMS opportunities in SPEC2006/462.libquantum.
- Looking into recent bootstrap failure with SMS flags on ARM -- it
seems to be related to do-loop optimization.