linaro-toolchain

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5659 discussions

by Peter Maydell

Progress: * UM-2 [QEMU upstream maintainership] - sent patches that re-sync our defined set of usermode hwcap bits and ID register bitmasks with what the Linux kernel currently has - code review * QEMU-530 [QEMU ARM v9.4 Baseline CPU for TCG] - FEAT_HBC: wrote and sent patch for this very simple feature - FEAT_MOPS: rolled v2 patchset based on review feedback * QEMU-486 [Update QEMU device models for FEAT_RME] - Looked at the SMMU spec to see (a) what realm-management related changes it needs and (b) where we are on the implementation of other features. Closed a few stale JIRA issues for features we've already implemented. - sent a patchset that advertises that we support SMMUv3.1-XNX (this is a no-op for our implementation) - investigated what the "expected" setup is for enforcing GPT checks on the GIC/ITS. Current front-runner is "the SMMU that's already in the system provides 'GPC checks only' for the accesses from these devices, as well as stage1/stage2 + GPT checks for PCI etc devices" (the term in the SMMU spec rev F.a is for a GPC-checks-only client device is "NoStreamID device") -- PMM

2 years, 2 months

Re: [Linaro-TCWG-CI] glibc patch #75959: FAIL: 1 regressions

by Siddhesh Poyarekar

On 2023-09-14 16:32, ci_notify(a)linaro.org wrote: > Dear contributor, our automatic CI has detected problems related to your patch(es). Please find some details below. If you have any questions, please follow up on linaro-toolchain(a)lists.linaro.org mailing list, Libera's #linaro-tcwg channel, or ping your favourite Linaro toolchain developer on the usual project channel. > > In CI config tcwg_glibc_check/master-arm after: > > | glibc patch https://patchwork.sourceware.org/patch/75959 > | Author: Siddhesh Poyarekar <siddhesh(a)sourceware.org> > | Date: Thu Sep 14 06:13:02 2023 -0400 > | > | getaddrinfo: Fix use after free in getcanonname (CVE-2023-4806) > | > | When an NSS plugin only implements the _gethostbyname2_r and > | _getcanonname_r callbacks, getaddrinfo could use memory that was freed > | during tmpbuf resizing, through h_name in a previous query response. > | Fix this by copying h_name over and freeing it at the end. > | > | ... 3 lines of the commit log omitted. > | ... applied on top of baseline commit: > | 803f4073cc Add MOVE_MOUNT_BENEATH from Linux 6.5 to sys/mount.h > > FAIL: 1 regressions > > regressions.sum: > === glibc tests === > > Running glibc:nss ... > FAIL: nss/tst-nss-gai-hv2-canonname > > === Results Summary === > > You can find the failure logs in *.log.1.xz files in > - https://ci.linaro.org/job/tcwg_glibc_check--master-arm-precommit/703/artifa… . > The full lists of regressions and progressions are in > - https://ci.linaro.org/job/tcwg_glibc_check--master-arm-precommit/703/artifa… . > The list of [ignored] baseline and flaky failures are in > - https://ci.linaro.org/job/tcwg_glibc_check--master-arm-precommit/703/artifa… . > > > > -----------------8<--------------------------8<--------------------------8<-------------------------- > The information below can be used to reproduce a debug environment: > > Current build : https://ci.linaro.org/job/tcwg_glibc_check--master-arm-precommit/703/artifa… > Reference build : https://ci.linaro.org/job/tcwg_glibc_check--master-arm-build/612/artifact/a… Hello, I'm looking at the logs and all it has is: original exit status 127 running post-clean rsync for the new test. It looks like other NSS tests also fail in the same way. Is this a known issue on arm? Thanks, Sid

2 years, 2 months

Fwd: [Linaro-TCWG-CI] gcc patch #75644: FAIL: 2 regressions

by Jonathan Wakely

I think this is because the patch changes libstdc++-v3/include/bits/version.def which requires version.h to be regenerated, by running 'make update-version' in the objdir/$target/libstdc++-v3/include directory. The patch I sent to gcc-patches (which is archived in patchwork) doesn't have the updates to the generated files, but what I committed to git does have them. ---------- Forwarded message --------- From: <ci_notify(a)linaro.org> Date: Mon, 11 Sept 2023 at 21:00 Subject: [Linaro-TCWG-CI] gcc patch #75644: FAIL: 2 regressions To: <jwakely(a)redhat.com> Dear contributor, our automatic CI has detected problems related to your patch(es). Please find some details below. If you have any questions, please follow up on linaro-toolchain(a)lists.linaro.org mailing list, Libera's #linaro-tcwg channel, or ping your favourite Linaro toolchain developer on the usual project channel. In CI config tcwg_gcc_check/master-aarch64 after: | gcc patch https://patchwork.sourceware.org/patch/75644 | Author: Jonathan Wakely <jwakely(a)redhat.com> | Date: Mon Sep 11 14:57:08 2023 +0100 | | libstdc++: Formatting std::thread::id and std::stacktrace (P2693R1) | | Tested aarch64-linux. Pushed to trunk. | | -- >8 -- | | New std::formatter specializations for C++23. | ... 18 lines of the commit log omitted. | ... applied on top of baseline commit: | 390fa3a78c8 libstdc++: Fix -Wunused-parameter warnings FAIL: 2 regressions regressions.sum: === libstdc++ tests === Running libstdc++:libstdc++-dg/conformance.exp ... FAIL: 19_diagnostics/stacktrace/output.cc (test for excess errors) FAIL: 19_diagnostics/stacktrace/version.cc (test for excess errors) === Results Summary === You can find the failure logs in *.log.1.xz files in - https://ci.linaro.org/job/tcwg_gcc_check--master-aarch64-precommit/2232/art… . The full lists of regressions and progressions are in - https://ci.linaro.org/job/tcwg_gcc_check--master-aarch64-precommit/2232/art… . The list of [ignored] baseline and flaky failures are in - https://ci.linaro.org/job/tcwg_gcc_check--master-aarch64-precommit/2232/art… . -----------------8<--------------------------8<--------------------------8<-------------------------- The information below can be used to reproduce a debug environment: Current build : https://ci.linaro.org/job/tcwg_gcc_check--master-aarch64-precommit/2232/art… Reference build : https://ci.linaro.org/job/tcwg_gcc_check--master-aarch64-build/926/artifact…

2 years, 2 months

[ACTIVITY] Report for week #36

by Thiago Jung Bauermann

Hello, # [GNU-767] Support changing SVE vector length in remote debugging - Continuing work on new approach to support changing SVE vector length in remote debugging. Fixed making native GDB work with the new approach using the DWARF location expression. Now porting the same approach to gdbserver, with an ad-hoc minimal location expression. # TCWG CI - Fixed GDB testsuite default timeout value, to make GDB check jobs for 32-bit ARM run in a less unreasonable time again. # Misc - Started preparation for future work on Guarded Control Stack for GDB. -- Thiago

2 years, 2 months

[ACTIVITY] report week ending 8 Sep

by Peter Maydell

Progress: * UM-2 [QEMU upstream maintainership] - sent patch fixing some regexes in our documentation - patch review and queueing up an arm pull request - Investigated the mps3-an536 Cortex-R52 FPGA image to see what work would be required to implement a QEMU model of it, wrote a draft of a jira epic issue for this * QEMU-530 [QEMU ARM v9.4 Baseline CPU for TCG] - FEAT_MOPS: * Implemented and tested the memcpy/memmove insns CPY* * Got the whole patchseries into good enough shape to send out for review -- PMM

2 years, 2 months

[ACTIVITY] Report for week #35

by Thiago Jung Bauermann

Hello, # [GNU-767] Support changing SVE vector length in remote debugging - Resumed working on new approach to support changing SVE vector length in remote debugging. I was able to use DWARF location expressions in the target description to express the SVE vector register sizes in terms of the VG register. Also adapted the regcache to support variable-length registers, and removed the VQ value from the target description and from aarch64_gdbarch_tdep, making GDB use one target description regardless of the vector length size. Still ironing out some bugs, and haven't tackled gdbserver yet. -- Thiago

2 years, 3 months

Re: [EXT] [Linaro-TCWG-CI] 2 patches in gcc: FAIL: 1 regressions

by Andrew Pinski

Just FYI. This test is just bogus and fixing it might be simple as using -fsanitize=undefined to check at runtime there is no undefined behavior being hit. In this case even if we do the comparison in `signed` and do the negate in `unsigned` types. we can still remove the negate in this case since we know the only value that will be still negative in that branch is LONG_MIN. So my patch just simplifies the inner comparison to that instead of `a < 0` and then be able to remove the neg. Someone else will have to fix the testcase since it is a testcase issue ... ________________________________________ From: ci_notify(a)linaro.org <ci_notify(a)linaro.org> Sent: Friday, September 1, 2023 3:07 PM To: Andrew Pinski Subject: [EXT] [Linaro-TCWG-CI] 2 patches in gcc: FAIL: 1 regressions External Email ---------------------------------------------------------------------- Dear contributor, our automatic CI has detected problems related to your patch(es). Please find some details below. If you have any questions, please follow up on linaro-toolchain(a)lists.linaro.org mailing list. In CI config tcwg_gcc_check/master-aarch64 after: | 2 patches in gcc | Patchwork URL: https://urldefense.proofpoint.com/v2/url?u=https-3A__patchwork.sourceware.o… | 504821491ff VR-VALUES: Rewrite test_for_singularity using range_op_handler | f6d1540c3e0 VR-VALUES: Rename op0/op1 to op1/op2 for test_for_singularity | ... applied on top of baseline commit: | b0d75f7d3bb libstdc++: Fix debug-mode tests for constexpr algorithms FAIL: 1 regressions regressions.sum: === gcc tests === Running gcc:gcc.target/aarch64/aarch64.exp ... FAIL: gcc.target/aarch64/vnegd_s64.c scan-assembler-times neg\\tx[0-9]+, x[0-9]+ 1 === Results Summary === -----------------8<--------------------------8<--------------------------8<-------------------------- The information below can be used to reproduce a debug environment: Current build : https://urldefense.proofpoint.com/v2/url?u=https-3A__ci.linaro.org_job_tcwg… Reference build : https://urldefense.proofpoint.com/v2/url?u=https-3A__ci.linaro.org_job_tcwg…

2 years, 3 months

[ACTIVITY] report week ending 1 Sep

by Peter Maydell

Progress (short week, 3 days): * UM-2 [QEMU upstream maintainership] - code review: + RTH's linux-user ESR signal frame patchset + iMX6/7 cleanup patchset + some other minor bits and pieces * QEMU-530 [QEMU ARM v9.4 Baseline CPU for TCG] - FEAT_MOPS: * SETG* instructions (memset + MTE tag setting) implemented and given some basic testing -- PMM

2 years, 3 months

[Linaro-TCWG-CI] FAIL: regressions after gcc commit 0c78240fd7d519fc27ca822f66a92f85edf43f70

by Adhemerval Zanella Netto

Hi Jan, Your patch caused a regression [1] on aarch64-linux-gnu. Would you please investigate? I am having some trouble to reproduce it outside our CI environment, but it has been hitting this issues consistently and it does seems related to your patch. Let me know if you need any assistance in reproducing these. Thanks! [1] https://ci.linaro.org/job/tcwg_bootstrap_build--master-aarch64-bootstrap_pr…

2 years, 3 months

Re: [Linaro-TCWG-CI] FAIL: 2 regressions after gcc commit 27de9aa152141e7f3ee66372647d0f2cd94c4b90

by Adhemerval Zanella Netto

Hi Richard, Your patch caused a regression [1] on aarch64-linux-gnu. Would you please investigate? I did a quick analysis and it seems that for test_copy_lane_f32, test_copy_lane_s32, test_copy_lane_u32, gcc is now generating zip1 instead of a ins; which does not seem fully correct. Let me know if you need any assistance in reproducing these. Thanks! [1] https://ci.linaro.org/job/tcwg_gnu_cross_check_gcc--master-aarch64-build/91…

2 years, 3 months

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