== Progress ==
* libssp
Updated review comments given by glibc maintainer and rerun tests.
There are some test failures, suspecting issue in using
ALIGN_UP/DOWN macro. Debugging them.
* gprof support for aarch64
Upstreamed patches to GCC and backported to Linaro 4.8 branch.
Closed the cards for gprof work.
* 1-1 Meet with Christophe.
== Plan ==
* Continue libssp support.
* Restart Aarch64 boot strap in a server machine.
* Book hotel ticket for connect.
* PGO for aarch64
== Progress ==
* Fixed my laptop's desktop by upgrading to saucy & Gnome 3.10.
* Continuing with Jenkins/Cbuildv2/Git integration. Since this is
an ongoing task, I think I'm going to stop listing it every
week. :-)
* Fixed more bugs in Cbuildv2 when handling branches and revisions.
* Compared source tarballs for binutils and gcc, Linaro releases
against Cbuildv2 produced ones.
* Added support to Cbuildv2 for building binutils source releases
in the same style as src-release.
* Worked on aarch64 builds on real hardware to test adding
libatomic and go to builds.
* Added support to build all documentation, which is used when
building tarballs.
* Reviewed and applied Cbuildv2 patches from Ryan.
== Plan ==
* Try to work around problem with importing test results.
* Continued work on release building via Cbuildv2.
* Get Odroid boards working reliably, ordered AC powered USB hubs
to work around problem with exterrnal USB drives.
== Progress ==
* Traveled to Islamabad for US Visa Interview, got verbal confirmation
of visa. Passport will be back this week.
(TCWG-250)
* GDB ARM Process Record Thumb32 Support: Submitted a new patch
upstream which fixed bugs.
(TCWG-270)
* Tested arm process record bug fixes in various configurations to get
pass rate statistics for the new patch.
(TCWG-280)
* Reviewing changes required for syscall support for gdb arm process record.
== Plan ==
(TCWG-267), (TCWG-268) and (TCWG-269)
* Ping or Send response to comments.
(TCWG-280)
* Start implementation and complete most part of coding next week.
* If Passport comes back with visa stamped: plan/book travel to US,
gather connect related information and notify all concerned.
== Progress ==
* Lnaro 4.8 Bugfix
- Fixed Bugs LP1232017 and LP1234060
- gmp and mpfr make check now clean
* spec2k comparison between ARM and x86
- Looked at register allocation issues
- Started working on slides for connect
== Plan ==
* Continue with spec2k comparison between ARM and x86
* Start again with 64bit division
== Misc ==
* October 7th Public Holiday.
== Progress ==
* Finished most new employee onboarding
* Setup Chromebook with Linux Ubuntu (crouton) development environment.
* glibc
[PATCH] Update generic swapon definition to match prototype.
* CBuildV2
[PATCH] Fix stamp-configure* name for git repos with specific named branches
[PATCH] Only return early on error following configure
[PATCH] Remove dryrun wrapper from git-new-workdir invocation.
[PATCH] Fix stamp name for git repos with specific named branches.
[PATCH] Remove lynx check from configure[.ac]. It's no longer used.
Started working on a patch to fix git working directory branch
name for named branches.
== Plan ==
* Install Fedora 19 on work laptop that just (Oct 4) arrived and
setup working environment.
* Finish first-pass fixes on cbuildv2.
* Complete patch to fix git working directory branch name.
* Start working on a glibc.git conf file to potentially move away
from eglibc.git.
* Fix cbuildv2 fetch time stamps. They seem to always be downloading
tar balls.
* Fix stamp output so that it doesn't imply that stamps or older
than a file when stamps do not yet exist.
== Issue ==
* Temporary desktop corruption and couldn't Linux 'rescue' from an
encrypted drive. Spent part of Tuesday rescuing my work environment
off the drive and reinstalling system.
== Progress ==
* EEMBC
- Ran on multiple boards, collected statistical data, wrote some scripts
to do it again
- Found a few regressions on GCC 4.9, reported internally
- Found 4 benchmarks in which LLVM is a lot worse
- Looking at RGBCMY which GCC is able to vectorise
- LLVM transforms the pointer access into a PHI cycle, which is wrongly
interpreted as a reduction variable by the loop vectorizer.
* Background
- Patch reviews and discussions as usual
- TCWG rack has arrived!
- Got another Chromebook and an ODroid XU to play with next week
== Plan ==
* Update script to rank the compilers according to EEMBC results on the
same machine
* Try to teach the loop vectorizer to not treat load/store PHIs as a
reduction variable
* Set up some temporary buildbots with new hardware
Hi,
With the patch I just sent to this list in place, gccgo builds for
aarch64. I don't know how well it _works_ -- "hello world" builds and
runs -- but I would like to ask what the process would be to get gccgo
included in the binary distributions of GCC that Linaro makes.
Cheers,
mwh
== Progress ==
* Got Odroid U2 board up and doing builds. Stock hardkernel kernel
images are unstable, keeps remounting USB drive read-only under
a load.
* Got the new support for branches and revisions for any toolchain
component working in Cbuildv2.
* Attended the 30th anniversary of the GNU project in Boston over the
weekend.
== Plan ==
* Continuing with Jenkins/Cbuildv2/Git integration.
* Try to work around problem with importing test results.
* Compare automated tarballs with the current release tarballs.
* Get Odroid U2 working reliably.
* Get Odroid X2 working.
== Issues ==
* Upgrading Gnome on my laptop destroyed my desktop to where
nothing worked, limiting productivity for a few days.
Hi,
With respect to the MPFR build error,
(http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58578), is movs appropraite
as shown below? When _err1 is negative the condition is evaluating it to
be true.
/* C Codeoes */
if (_err1 > 0)
{
/* working code */
.loc 1 67 0
cmp r3, #0
ble .L6
/* not working code*/
.loc 1 67 0
movs r3, r3, asl #1
ble .L6
When I looked at the ARM documents, I found the following
Condition flags
-------------------
If S is specified, for MOV instructions:
1. update the N and Z flags according to the result
2. can update the C flag during the calculation of Operand2 (see
Flexible second operand)
3. do not affect the V flag.
And also
le Signed less than or equal. (Z==1) || (N!=V)
Does this means we cant movs at comparision.
http://gcc.gnu.org/ml/gcc-patches/2013-02/msg00861.html added this and I
guess it is intentional.
Am I missing anything here?
Thanks,
Kugan
== Progress ==
* AArch64 frame grows downward: no feedback yet.
* Disable-peeling: trying to tune the vectorizer cost model so that it
is less aggressive.
* AArch64 bootstrap failure: build it still on-going, so still hoping
to reproduce it.
* GCC trunk cross-validation:
- aarch64 added
- looking at how to handle compute farm jobs timeouts nicely
* Backports:
- launched several merge requests for a few individual patches.
== Next ==
* AArch64 frame grows downward: continue
* Disable-peeling: continue
* Backports : spend little time on checking the results