== Progress ==
* Got binary release building working again. (2/10)
* Added a node_selector to Jenkins for the new Beagle Board Blacks, and
get those working for native builds. (TCWG-379, 1/10)
* Fix configuration of 'build-all' project in Jenkins, now fires up
cross builds for supported targets, plus native builds on
Chromebooks and Beagle Board Blacks. (1/10)
make networking route externally. (TCWG-380)
* Meetings and Misc. (3/10)
* Got TCWG build farm, all nodes offline fixed.
* Wrote wiki page on the build farm.
* Updated Java to 1.6 on the Beagle Board Blacks in the TCWG
build farm.
* Added support to specify an alternate prefix for installation.
* Got QEMU and Foundation Model running on TCWG x86_64 build slaves
so Jenkins can use them for native builds. (TCWG-380 - 2/10)
* Got Rasberry PI softfp image running under QEMU, tried to do
build. (TCWG-380 - 1/10)
== Plan ==
* Build static gdbserver for target via Cbuildv2.
* Add Win32 installer for Canadian cross built binary
releases to Cbuildv2.
* Get Kugan's benchmark branch running on build farm.
* More Jenkins maintainance.
== Potential Leave ==
* Still working out the huge amount of details, but strongly
considering going to Mt Everest after Connect. It'd be a long and
rough trip, but a once in a lifetime opportunity.
== This week ==
- Successfully submitted crypto using git-review
- Completed merge of ILP backports from trunk to Linaro 4.8 branch: 201164,
201165, 201166, 201167, 201168, 201170 and 201175
- Attended ARM architecture training on Friday
== Next week ==
- Submit ILP backports for review using git review
- New backports
== Future ==
== Progress ==
* Rework QEMU patch for AArch32 ARMv8 16<->64bit VCVT (2/10, TCWG-51)
* Further work on longjmp/setjmp Systemtap probes on ARM (4/10, TCWG-378)
* Research and analysis of malloc workloads for benchmarking (4/10, TCWG-160)
== Issues ==
* None
== Plan ==
* Finish testing setjmp/longjmp changes
* malloc benchmarking and improvements
--
Will Newton
Toolchain Working Group, Linaro
== Progress ==
* EHABI
- Turning EHABI on by default on non-Darwin ARM
- Had to add some relocations to MCJIT
- Re-enabled EH tests on test-suite
- Check-all, self-hosting and test-suite bots green
* Compiler-RT
- Enabling RT+San libraries to compile on ARM
- Changing Clang to look for the generic libraries (arm, not armv7l)
* MCJIT
- Remote protocol fixed, all tests passing on self-hosting bot
- All tests re-enabled on ARM
* Background
- More IAS, Compiler RT patch reviews
- Buildbot cleaning up before every build (more stable)
- Cambridge LLVM Social
- Rumours that LLVM can compile the kernel with the integrated assembler
on ARM
* Time
- CARD-862 8/10
- Others 2/10
== Plan ==
* FOSDEM
- Talking about LLVM auto-vectorization this Sunday
* EHABI
- ARM detected some conflicts with Dwarf stack unwinding, investigate
Compiler-RT
- Run test-suite, benchmarks, applications with it
* IAS
- Confirm the rumours about the kernel compiling clean
- Pick up some remaining task to implement
I had a look at the missing target hook TARGET_ATOMIC_ASSIGN_EXPAND_FENV
to fix the C11 memory model testcase in regressions in trunk.
I looked at the x86 implementation of this target hooks and x86 has
instructions (FNSTENV,FLDENV,FNSTSW,FNCLEX) for feholdexcept,
feclearexcept and feupdateenv. Does ARM has something similar? Any
pointers/links I can refer to.
Please see the gcc internal documentation for the target hook below.
— Target Hook: void TARGET_ATOMIC_ASSIGN_EXPAND_FENV (tree *hold, tree
*clear, tree *update)
ISO C11 requires atomic compound assignments that may raise
floating-point exceptions to raise exceptions corresponding to the
arithmetic operation whose result was successfully stored in a
compare-and-exchange sequence. This requires code equivalent to calls to
feholdexcept, feclearexcept and feupdateenv to be generated at
appropriate points in the compare-and-exchange sequence. This hook
should set *hold to an expression equivalent to the call to
feholdexcept, *clear to an expression equivalent to the call to
feclearexcept and *update to an expression equivalent to the call to
feupdateenv. The three expressions are NULL_TREE on entry to the hook
and may be left as NULL_TREE if no code is required in a particular
place. The default implementation leaves all three expressions as
NULL_TREE. The __atomic_feraiseexcept function from libatomic may be of
use as part of the code generated in *update.
Thanks,
Kugan
== Progress ==
- releases (3/10)
* GCC 4.7 and 4.8 releases done
* more cbuild2 feedback
- cross-validations (2/10)
* followup
* adding capability to test a patch over a given revision on several
targets/cpu/fpu/runtestflags
- libsanitizer on AArch64 (3/10)
* most tests are now functional
* still some errors in the GCC testsuite, to be analyzed (there are
some timeouts, too despite using SSH multiplexing to the Foundation
model)
- misc (2/10): conf-calls and meetings
== Next ==
- libsanitizer on AArch64: analyze errors, try QEMU
== Future ==
On sick leave starting Feb 11th
== Progress ==
* Libc probes support for Aarch64 (2/10).
Wrote a small patch for setjmp and longjmp LIBC probe.
Requested "will newton" to test them .
* Investigate "PGO" for Aarch64 (3/10).
Bootstap testing GCC with PGO for GCC.
Stage 2, feedback profile in progress.
Ran coremark on foundation model with PGO.
The benchmark builds with profile-generate and runs.
"gcda" files are generated and uses them to profile.
Profile generated runs does not run cleanly.
Cross checking if the generated profile is valid.
* Resubmmited libssp machine description support in GCC (2/10).
* Cbuild2 discussed with rob, ryan on SYSROOT installation while building (1/10)
cross compiler for aarch64. "SYSROOT" is expected to be in
/opt/linaro, but cbuild2 does not do this by default.
Misc (1/10)
-------------
AMD internal meetings and did some investigations
== Plan ==
- Run EMBCC benchmarks with -PGO enabled.
- Follow up upstream libssp GCC discussions.
* 4 days week (university).
== Issues ==
* none
== Progress ==
* LRA on AArch32:
o TCWG-343 : Make LRA the default for the ARM backend (3/10)
- Looking backend places (ARM and AArch64) where reload_in_progress
is used to verify if lra_in_progress is needed as well: Tested lot of
configurations, testsuite results analysis ongoing.
o TCWG-345 : Analyse performance of LRA for ARM. (0/10)
- No progress this week.
* GMP library AArch64 port review: (4/10)
o Analyzing code generated from C generic implementation vs assembly.
* Misc. (1/10)
o Various meetings.
== Next ==
* Child care (chickenpox)
* Still some time spend at university
* Continue on LRA and lib GMP
== Progress ==
* Implemented per process hwbreakpoint and watchpoint cache for arm
native targets.
Also added a reference count for per thread hardware breaks. [TCWG-177] [7/10]
* Travelled to Islamabad for Macau visa application. [3/10]
== Plan ==
* Continue work on forking/vforking hardware breakpoints support for arm-native.
Tweak hardware breakpoint cache and thread breaks reference count to
get it in sync with linux-native. [TCWG-177]
