== Progress ==
* Validation
- worked on stabilization of abe and jenkins jobs
* Backports
- a few reviews
* Misc
- meetings, conf-calls, emails, ...
== Next ==
* Validation: hopefully make the staging, then stable branches
== Progress ==
* Automation Framework (CARD-1378 5/10)
- Moving LLVM lab into llvm.tcwglab subnet
- Passing down my knowledge to the lab team
- Helping them set up the new builders
* Background (5/10)
- Code review, meetings, discussions, etc.
- Upgrading APM's compiler/binutils
- Writing LLVM Getting started wiki page
- Helping Adhemerval setup
== Plan ==
* Go back working on LLVM
== Progress ==
qemu-system experiment [4/10]
Tried to set up qemu-system for reliable simulated validation of tests
which don't work under qemu-user. Mostly works, but there is arcane
interaction between DejaGNU, gcc testsuite and board files which make
it a bit flakey. Interesting experiment, but I've dropped it for now
as there still niggles to iron out.
Misc [4/10]
Patch review for Prathamesh
Backporting stuff
ABE bugzilla stuff
Benchmarking results
Emails/doc review about Lab infrastructure
Holiday Friday [2/10]
== Plans ==
Holiday Monday
Investigate autovectorization
Next backport
== Progress ==
LLDB development
-- Implemented LLDB Arm SysV ABI classes [3/10] [TCWG-643]
-- Implemented LLDB AArch64 SysV ABI classes [3/10] [TCWG-715]
-- Started implementation of Arm native register context [1/10] [TCWG-650]
-- Figure out steps to run lldb-remote testsuite on Arm and AArch64
[1/10] [TCWG-640] [TCWG-641]
-- Try to build lldb-server natively on chromebook [1/10] [TCWG-647]
Miscellaneous [1/10]
-- Meetings, emails discussions.
-- Updates to wiki pages for LLDB howtos
== Plan ==
LLDB development
-- Complete implementation and submit LLDB Arm SysV ABI classes upstream
-- Complete implementation and submit LLDB AArch64 SysV ABI classes upstream
-- Further progress on implementation of native register context
-- Begin implementation of POSIX monitor register context for arm.
Miscellaneous
-- Migrate LLDB pages to collaborate.linaro
ASAN/TSAN run on 42 bit VA Aarch64 with 64 bit allocators (TCWG-634) (6/10)
* Juno does not have space for kernel allocator map demanded by
ASAN, So we need to remain on 32 bit allocators only.
* amd-01 went offline. So moved to internal machine in AMD.
Debugging LLVM test failures in GDB showed that ASLR should be
turned off and also the shadow offset is set at 1<<36 and is not
changing when I fix it in asan_mappings.h file .
Manually changing shadow offset to 1<<39 fixes some segfaults.
Bug869: Continued to look at ABS_EXPR cases (2/10).
* Emails, meetings. (2/10)
* Linaro 1-1 with christophe, Ryan
* AMD meetings/event, 1-1 with AMD manager, status meeting.
* GCC mailing list.
== Plan ==
*Continue to fix TSAN/ASAN 64 bit allocator failures on amd-01 .
* Bug869
== Issue ==
* none
== Progress ==
* Infrastructure and Validation (1/10)
- Validate staging builders, still some issues with guality tests
* GCC Upstream (5/10)
- PR64208 submitted a patch that fixes the LRA ICE for iwmmxt target.
- PR63587 and PR64871 submitted patches that backport the fixes into
FSF 4.9 branch. Patches approved, to be committed.
* Release and Backports (3/10)
- Finished Backflip improvements, dev branch merged into master.
- Presented this new features, stacked backports process and conflict
handling during our GCC team weekly meeting.
* Linaro Bugzilla (-/-)
- #1322 - Identified it as already resolved on our 4.8 branch.
* Misc (110)
- Various meetings
== Plan ==
- Continue on upstream bugzillas, backports and validation.
catomics - TCWG-436 [6/10]
* Started a series of runs on a local board I'd borrowed
** Then had to give it back before they'd really got anywhere
* Got some, possibly dubious, results back from A15 from previous week
** If the results are worth anything, they suggest that catomics don't
achieve anything
* Started again with a subset of SPEC on juno-01, as it was on my desk
for the weekend anyway
** Results again underwhelming
** Maybe I picked the wrong subset, maybe A57 is too smart
Misc [4/10]
* Including a little 'juno cache effects' followup, a little juno-01
work, and a lot of mail catchup
=Plan=
* Get back to benchmark automation
** Apply a bunch of small improvements I've got on a branch
** Get a working Jenkins backport benchmarking prototype
** Sort out sources/results storage
* Think about why catomics may not be showing any effect
** Starting to believe that this is a red herring
** But might be interesting to try 'little' class cores
** But that does involve finding a reliable target I can hold for a long time
Juno cache effects - LDTS-1238 [6/10]
* Seems to be mainly due to (expected) instruction scheduling
limitations, and prefetcher effects
* Reported back, hopefully this will wrap up now
catomics - TCWG-436 [1/10]
* Shepherding benchmark runs in LAVA, usual problems with ssh-agent,
juno contention and random target failure
* Almost no actual data produced
benchmark automation - TCWG-360 [1/10]
* User support, some discussion about extent of our juno usage
* Something weird happened in Jenkins, _might_ have been a one-off due
to slaves moving around
Misc - [2/10]
* Featuring juno-01 fixing
TCWG-619:
- Cross compiled v8 on ARM using linaro toolchain (binary release).
- Built chromium LTO native
- Building v8 on ARM with LTO results in ICE at lto_tag_to_tree_code.
- Buiilding v8 (without LTO) with linaro-4.9-branch results in ar error.
- Cross compiling chromium on ARM with LTO using linaro toolchain
segfaults ld
- Using gcc-nm, gcc-ar works as a work-around for "plugin needed to
handle lto object" error
TCWG-621:
- Finished refactoring sel-sched-ir.h
* Bugs
- PR49951: Modified patch to fix few test-cases.
* Misc:
- Internal college event on Saturday.
== Next Week ==
- TCWG-619
- Test patch for PR49951 and submit upstream.
- Refactor lra-int.h
