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[ANNOUNCE] Linaro GCC 5 2015.12 snapshot

by Yvan Roux

The Linaro Toolchain Working Group (TCWG) is pleased to announce the 2015.12 snapshot of the Linaro GCC 5 source package. This monthly snapshot[1] is based on FSF GCC 5.3+svn231642 and includes performance improvements and bug fixes backported from mainline GCC. This snapshot contents will be part of the 2015.11 stable [1] quarterly release. This snapshot tarball is available on: http://snapshots.linaro.org/components/toolchain/gcc-linaro/5.3-2015.12/ Interesting changes in this GCC source package snapshot include: * Updates to GCC 5.3+svn231642 * Backport of [Bugfix] [AArch32] 1/4 PR63870 Add qualifiers for NEON builtins * Backport of [Bugfix] [AArch32] 2/4 PR63870 Mark lane indices of vldN/vstN with appropriate qualifier * Backport of [Bugfix] [AArch32] 3/4 PR63870 Remove error for invalid lane numbers * Backport of [Bugfix] [AArch32] 4/4 PR63870 Remove xfails for ARM targets * Backport of [Bugfix] [AArch32] PR67305, tighten neon_vector_mem_operand on eliminable registers * Backport of [Bugfix] [AArch32] remove unused variable * Backport of [Bugfix] [AArch64] PR 63304 Fix issue with global state * Backport of [Bugfix] [AArch64] PR63304 Handle literal pools for functions > 1 MiB in size * Backport of [Bugfix] [AArch64] PR 68088: Fix RTL checking ICE due to subregs inside accumulator forwarding check * Backport of [Bugfix] [AArch64] PR rtl-optimization/67218 * Backport of [Bugfix] PR 56036 fix typo in doc * Backport of [Bugfix] PR rtl-optimization/68236: Exit early from autoprefetcher lookahead if not in haifa sched * Backport of [Bugfix] PR tree-optimization/68234 Improve range info for loop Phi node * Backport of [AArch32] 1/4 Change GET_MODE_INNER to always return a non-void mode * Backport of [AArch32] 2/3 Make if_neg_move and if_move_neg into insn_and_split * Backport of [AArch32] 2/4 Control the FMA steering pass in tuning structures rather than as core property * Backport of [AArch32] 3/3 Expand mod by power of 2 * Backport of [AArch32] 3/4 Replace the pattern GET_MODE_BITSIZE (GET_MODE_INNER (m)) with GET_MODE_UNIT_BITSIZE (m) * Backport of [AArch32] 4/4 Fix - Introduce new inline functions for GET_MODE_UNIT_SIZE and GET_MODE_UNIT_PRECISION * Backport of [AArch32] 4/4 Introduce new inline functions for GET_MODE_UNIT_SIZE and GET_MODE_UNIT_PRECISION * Backport of [AArch32/AArch64] 2/2 Add a new Cortex-A53 scheduling model * Backport of [AArch32] Add missing v8a cpus to the t-aprofile file * Backport of [AArch32] Fix checking RTL error in cortex_a9_sched_adjust_cost * Backport of [AArch32] Fix for testcase after r228661 * Backport of [AArch32] Initialise cost to COSTS_N_INSNS (1) and increment in arm rtx costs * Backport of [AArch32] libgcc: include crtfastmath * Backport of [AArch32] Unified assembler in ARM state * Backport of [AArch64] 1/2 Give AArch64 ROR (Immediate) a new type attribute * Backport of [AArch64] 1/2 Rename SYMBOL_SMALL_GOT to SYMBOL_SMALL_GOT_4G * Backport of [AArch64] 1/2 Rename test source file for reuse * Backport of [AArch64] 1/3 Add the option -mtls-size * Backport of [AArch64] 1/3 Expand signed mod by power of 2 using CSNEG * Backport of [AArch64] 2/2 Implement -fpic for -mcmodel=small * Backport of [AArch64] 2/2 Implement TLS IE for tiny model * Backport of [AArch64] 2/3 Rename SYMBOL_TLSLE to SYMBOL_TLSLE24 * Backport of [AArch64] 3/3 Implement local executable mode for all memory model * Backport of [AArch64] Add initial qualcomm support * Backport of [AArch64] Add missing entries in iterator vwcore * Backport of [AArch64] Cleanup whitespace in aarch64.c * Backport of [AArch64] Cortex-A57 Choose some new branch costs * Backport of [AArch64] Define TARGET_UNSPEC_MAY_TRAP_P * Backport of [AArch64] Distinct costs for sign and zero extension * Backport of [AArch64] Do not ICE after apologising for -mcmodel=large -fPIC * Backport of [AArch64] Don't allow -mgeneral-regs-only to change the .arch assembler directives * Backport of [AArch64] Don't transform sign and zero extends inside mults * Backport of [AArch64] Fall back to -fPIC if no support of -fpic in binutils * Backport of [AArch64] Fix for branch offsets over 1 MiB * Backport of [AArch64] Fix ICE on (const_double:HF 0.0) * Backport of [AArch64] Fix insn types * Backport of [AArch64] Fix output assembly bug under TLSIE ILP32 * Backport of [AArch64] Handle vector float modes properly in aarch64_output_simd_mov_immediate * Backport of [AArch64] Mark GOT related MEM rtx as const to help RTL loop IV * Backport of [AArch64] Properly handle simple arith+extend ops in rtx costs * Backport of [AArch64] Rename SYMBOL_SMALL_GOTTPREL to SYMBOL_SMALL_TLSIE * Backport of [AArch64] Restrict pic-small.c by new test directive * Backport of [AArch64] Tighten direct call pattern for sibcall to repair -fno-plt * Backport of [AArch64] Tighten direct call pattern to repair -fno-plt * Backport of [Testsuite] [AArch32] Fix thumb2-slow-flash-data.c failures * Backport of [Testsuite] [AArch32] Switch ARM to unified asm * Backport of [Testsuite] [AArch64] Add more TLS local executable testcases * Backport of [Testsuite] [AArch64] Check branch types for noplt testcases * Backport of [Testsuite] [AArch64] Fix gcc.target/aarch64/vclz.c * Backport of [Testsuite] [AArch64] Fix some target attribute inlining tests for -fPIC * Backport of [Testsuite] [AArch64] Restrict got_mem_hoist_1.c with small memory model * Backport of [Testsuite] [AArch64] Skip tiny and large code model on gcc.target/aarch64/pic-small.c * Backport of [Testsuite] Add --param sra-max-scalarization-size-Ospeed to sra-12.c * Backport of [Testsuite] Fix target selector in gcc.target/i386/noplt-[1234].c testcases * Backport of [Misc] Allow sibcalls in no-PLT PIC * Backport of [Misc] Eliminate PLT stubs for specified external functions via -fno-plt * Backport of [Misc] Fix for ICE with -g on testcase with incomplete types * Backport of [Misc] Fix memory leak and wrong invariant dependence computation in IVOPT * Backport of [Misc] Improve rtl loop inv cost by checking if the inv can be propagated to address uses * Backport of [Cleanup] [AArch32/AArch64] fix ChangeLog * Backport of [cleanup] [AArch32] Remove uses of CONST_DOUBLE_HIGH/LOW * Backport of [Cleanup] [AArch64] Delete aarch64_symbol_context which is not used * Backport of [cleanup] [AArch64] Move iterators from atomics.md to iterators.md * Backport of [cleanup] [AArch64] Remove uses of CONST_DOUBLE_HIGH, CONST_DOUBLE_LOW * Backport of [Doc] [AArch64] Document several AArch64-specific test directives Feedback and Support Subscribe to the important Linaro mailing lists and join our IRC channels to stay on top of Linaro development. ** Linaro Toolchain Development "mailing list": http://lists.linaro.org/mailman/listinfo/linaro-toolchain ** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@ * Bug reports should be filed in bugzilla against GCC product: http://bugs.linaro.org/enter_bug.cgi?product=GCC * Interested in commercial support? inquire at "Linaro support": mailto:support@linaro.org [1]. Stable source package releases are defined as releases where the full Linaro Toolchain validation plan is executed. [2]. Source package snapshots are defined when the compiler is only put through unit-testing and full validation is not performed.

9 years, 9 months

[ACTIVITY] 7 Nov - 11 Nov 2015

by Kugan

== Progress == - LTO (8/10) * Looked at ipa-cp * Read LTO papers * Started with ipa-vrp experiment * Reproduced spec2006 issues - Misc (2/10) * gcc/bug list * LuaJIT == Plan == * LTO

9 years, 9 months

[ACTIVITY] 7th-11th December

by Bernie Ogden

Centralised benchmark source - TCWG-354 [6/10] * Understood CoremarkPro run rules/behaviour better * Experimented with shortening runs while still giving meaningful results * Cleaned up build/run scaffolding Port to microinstance - TCWG-432 [1/10] * Got access to microinstance, learned a bit about SSL in the process Backport benchmarking - TCWG-352 [2/10] * Fixed 'build with sysroot' code for current deliverable shape * Fixed a problem with multiple manifests =Plan= Review, test, debug build-triggers-benchmark job Finish off Coremark Pro integration Review security with shared uinstance/main instance code Expose more data, benchmarks to bundles Debug/test Jenkins job in microinstance Create bootable image for at least 1 target, or know what the problems are Write up noise control report (if time) More support for SPEC-on-Android? =Absence= Holiday 22nd December - 1st January

9 years, 9 months

[ACTIVITY] 7 Nov - 11 Nov 2015

by Prathamesh Kulkarni

== This Week == * TCWG-72 (2/10) - Another iteration. * LTO (4/10) - Building spec with different combinations of -flto -flto-partition -flto-compression-level - Builds cleanly on AArch64, ICE's on ARM for 447.dealII with -flto - Looked at segfault with 483.xalanpack * TCWG-319 benchmarking (1/10) - fp benchmark results on: r1-a12: -0.04 % cortex-a53: -0.09 % cortex-a57: -0.14% - int benchmarks completed running for reference revision on cortex-a15 - int benchmarks with-patch runnning on cortex-a15 * TCWG-310 benchmarking (1/10) - r1-a12: 0.11% - Benchmark jobs failed on a53, a57. * Misc (2/10) - Submitted patch to fix building 450.soplex - Looked at how to write ipa pass, ipa-pure-const and ipa-cp. - Meetings == Next Week == - tcwg-319, tcwg-310 benchmarking - tcwg-72 - LTO

9 years, 9 months

[Weekly] 07-11 December 2015

by Michael Collison

== This week == * Bugzilla 68543 - [AArch64] Implement overflow arithmetic standard names (7/10) - Implemented signed and unsigned add, subtract, and multiply overflow standard patterns - Investigated testing of overflow patterns * Misc (3/10) - Conference calls - Misc ARM Housekeeping - Lost connectivity due to old ARM Unix VPN Client == Next week == * TCWG-317 - Exploit wide add operations when appropriate for Aarch32 - Minor code update to address upstream comment * Vacation until rest of year

9 years, 9 months

[ACTIVITY] 7-11 December 2015

by Christophe Lyon

== Progress == * GCC (4/10) - pr68620 (fp16 transfers in big-endian mode) - checking regressions observed on trunk - had to revert my cleanup patch for target attributes tests, not sure how to handle all possible combinations of options/defaults * Validation (1/10) - small improvements in reporting * Misc (conf calls, meetings, emails, ...) (3/10) * Internal training (2/10) == Next == * Validation * GCC: bug fixes/cleanup

9 years, 9 months

[ACTIVITY] Dec 7 - 11, 2015

by Yao Qi

* One day off on Wed. [2/10] # Progress # * Enable gdb core file tests when testing remotely, TCWG-171. I've almost had the conclusion that corefile remote testing can't be done due to limitations in dejagnu and nfs mount testing infrastructure. Need to write them down. [2/10] * Mutli-arch follow-up work, teach AArch64 GDBserver understand ARM breakpoint instructions. TCWG-460. Done. [3/10] * Review ARM GDBserver software single step patch V7. Almost OK, except some small things. [2/10] * Misc, meeting, email, [1/10] # Plan # * TCWG-424, Draft a fix for the fail in random-signal.exp. * TCWG-156, GDB test parity between AArch64 and X86_64. * One day off on Wed. or Fri. Planned absence: * Dec 24-Jan 3. -- Yao

9 years, 9 months

[ACTIVITY]

by Renato Golin

== Progress == * Holiday (2/10) * Release (1/20) - 3.7.1 Final, all green * Maintenance (5/10) - Fixing PR25720 - Bug cleaning: PR18921, PR13259, PR13138, PR12926, PR17963, PR18187, PR22692 - Checked strided vectorizer on ToT, EEMBC 2x geomean! * Background (2/10) - Code review, meetings, discussions, general support, etc. - Power cut, restarting bots, testing TK1, plans, etc. == Holidays == I'll be back on the 5th Jan.

9 years, 9 months

[ACTIVITY] Nov 30 - Dec 4, 2015

by Kugan

== Progress == - PR66726 (2/10) * Testing a patch - PR63586 (2/10) * Posted a patch * Revised the patch based on testing - LuaJIT (2/10) * Setup nginx * Still haven't figured out how to use mongodb with nginx (config required). - Misc (2/10) * gcc/bug list * LTO - sick (2/10) == Plan == * bug reports * LTO

9 years, 9 months

incomplete .arch specifiers with latest Linaro gcc5 patches on armv8?

by Robert Schiele

Hi, when working with the Linaro patches I found that a particular commit breaks our aarch64 kernel build. The patch in question is that one: commit be09330da9d0777c4a58568d137e3f8a3dbe0a0b Author: Yvan Roux <yvan.roux(a)linaro.org> Date: Tue Oct 27 21:18:19 2015 +0100 One of the things it attempts to change apparently is moving the .arch specifiers in the assembler file from a global scope to individual functions. What also happens though is that they seem to lose some information after that transformation. I observed that when building arch/arm64/crypto/aes-ce-cipher.c from the Linux kernel. This code contains inline assembly like this: static void aes_cipher_decrypt(struct crypto_tfm *tfm, u8 dst[], u8 const src[]) { struct crypto_aes_ctx *ctx = crypto_tfm_ctx(tfm); struct aes_block *out = (struct aes_block *)dst; struct aes_block const *in = (struct aes_block *)src; void *dummy0; int dummy1; kernel_neon_begin_partial(4); __asm__(" ld1 {v0.16b}, %[in] ;" " ld1 {v1.2d}, [%[key]], #16 ;" " cmp %w[rounds], #10 ;" " bmi 0f ;" " bne 3f ;" " mov v3.16b, v1.16b ;" " b 2f ;" "0: mov v2.16b, v1.16b ;" " ld1 {v3.2d}, [%[key]], #16 ;" "1: aesd v0.16b, v2.16b ;" " aesimc v0.16b, v0.16b ;" "2: ld1 {v1.2d}, [%[key]], #16 ;" " aesd v0.16b, v3.16b ;" " aesimc v0.16b, v0.16b ;" "3: ld1 {v2.2d}, [%[key]], #16 ;" " subs %w[rounds], %w[rounds], #3 ;" " aesd v0.16b, v1.16b ;" " aesimc v0.16b, v0.16b ;" " ld1 {v3.2d}, [%[key]], #16 ;" " bpl 1b ;" " aesd v0.16b, v2.16b ;" " eor v0.16b, v0.16b, v3.16b ;" " st1 {v0.16b}, %[out] ;" : [out] "=Q"(*out), [key] "=r"(dummy0), [rounds] "=r"(dummy1) : [in] "Q"(*in), "1"(ctx->key_dec), "2"(num_rounds(ctx) - 2) : "cc"); kernel_neon_end(); } Now without this patch the compiler behaved like the following. It was invoked with: aarch64-linux-gnu-gcc -Wp,-MD,arch/arm64/crypto/.aes-ce-cipher.o.d -nostdinc -isystem /var/fpwork/rschiele/crossbuild/builds/aarch64-linux-gnu/linux-next/srcdir/bin/../lib/gcc/aarch64-linux-gnu/5.2.1/include -I/var/fpwork/rschiele/crossbuild/builds/aarch64-linux-gnu/linux-next/srcdir/src/linux/arch/arm64/include -Iarch/arm64/include/generated/uapi -Iarch/arm64/include/generated -I/var/fpwork/rschiele/crossbuild/builds/aarch64-linux-gnu/linux-next/srcdir/src/linux/include -Iinclude -I/var/fpwork/rschiele/crossbuild/builds/aarch64-linux-gnu/linux-next/srcdir/src/linux/arch/arm64/include/uapi -Iarch/arm64/include/generated/uapi -I/var/fpwork/rschiele/crossbuild/builds/aarch64-linux-gnu/linux-next/srcdir/src/linux/include/uapi -Iinclude/generated/uapi -include /var/fpwork/rschiele/crossbuild/builds/aarch64-linux-gnu/linux-next/srcdir/src/linux/include/linux/kconfig.h -I/var/fpwork/rschiele/crossbuild/builds/aarch64-linux-gnu/linux-next/srcdir/src/linux/arch/arm64/crypto -Iarch/arm64/crypto -D__KERNEL__ -mlittle-endian -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -Werror-implicit-function-declaration -Wno-format-security -std=gnu89 -mgeneral-regs-only -fno-delete-null-pointer-checks -O2 --param=allow-store-data-races=0 -Wframe-larger-than=2048 -fno-stack-protector -Wno-unused-but-set-variable -fno-omit-frame-pointer -fno-optimize-sibling-calls -fno-var-tracking-assignments -g -Wdeclaration-after-statement -Wno-pointer-sign -fno-strict-overflow -fconserve-stack -Werror=implicit-int -Werror=strict-prototypes -Werror=date-time -DCC_HAVE_ASM_GOTO -Werror -march=armv8-a+crypto -D"KBUILD_STR(s)=#s" -D"KBUILD_BASENAME=KBUILD_STR(aes_ce_cipher)" -D"KBUILD_MODNAME=KBUILD_STR(aes_ce_cipher)" -c -o arch/arm64/crypto/aes-ce-cipher.o /var/fpwork/rschiele/crossbuild/builds/aarch64-linux-gnu/linux-next/srcdir/src/linux/arch/arm64/crypto/aes-ce-cipher.c As a result it created a file for the assembler with the global .arch armv8-a+fp+simd+crypto at the beginning of the file. After the patch it created individual .arch armv8-a at individual places. It is not clear to me, why the extensions (fp+simd+crypto) got lost. Is that intended, such that the code needs special adaption for inline assembly using those extensions or is that loss of extensions a bug of that patch? Greetings! Robert

9 years, 9 months

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