o 4 days week.
o LLVM
* Machine Outliner on ARM prototype:
- Rebased on upstream Machine Outliner developments
- Still working on LLVM bootstrap failures in ARM mode
o Misc
* Various meetings and discussions.
[VIRT-246 # ARMv8.1-LOR Limited Ordering Regions ]
Posted v3.
[VIRT-294 # ARMv8.3-PAuth, Pointer Authentication ]
Implemented. Posted v1. I can sort of guarantee that it doesn't work in
system mode yet, cause I spotted a bug by eye yesterday.
In the meantime, Peter via Will Deacon added me to the cc list for the in
development kernel patches. I'll review v5 shortly.
r~
Upstream Work ([VIRT-109])
==========================
- reviewed {Qemu-devel} {PATCH for-4.0 v2 00/37} tcg: Assorted
cleanups Message-Id:
<20181123144558.5048-1-richard.henderson(a)linaro.org>
- looked at common part of {Qemu-devel} {PATCH 2 00/39} Windbg
supporting Message-Id:
<154401431697.8440.845616703562380651.stgit(a)Misha-PC.lan02.inno>
- finished review of {PATCH v6 00/13} hardfloat Message-Id:
<20181124235553.17371-1-cota(a)braap.org>
- 2-3x speed-ups for FPU heavy workloads!
- finished prototype of [enabling tcg system tests]
- includes some more userspace tests as well
- just missed posting RFC, will post next week
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
[enabling tcg system tests]
https://github.com/stsquad/qemu/tree/testing/enable-system-tcg-tests-v1
Other Tasks
===========
- debugged compiler failures on SynQuacer
- turned out it was dodgy RAM *slot layout* - system now stable
again
- did some bug triage/tagging in QEMU bug database
- update JIRA tickets as per QEMU initiative thread Message-Id:
<87wop4gezg.fsf(a)linaro.org> :todo
Completed Reviews [3/3]
=======================
{PATCH v3 00/16} tcg: Assorted cleanups
Message-Id: <20181130215221.20554-1-richard.henderson(a)linaro.org>
- CLOSING NOTE [2018-12-03 Mon 10:46]
Easier review with the re-org of removal and clean-up patches
{Qemu-devel} {PATCH for-4.0 v2 00/37} tcg: Assorted cleanups
Message-Id: <20181123144558.5048-1-richard.henderson(a)linaro.org>
- CLOSING NOTE [2018-12-03 Mon 10:47]
Got part way through, subset reposted and reviewed. Some questions
remain on the efficiency of ool softmmu w.r.t various
micro-architectures.
{PATCH v6 00/13} hardfloat
Message-Id: <20181124235553.17371-1-cota(a)braap.org>
- CLOSING NOTE [2018-12-05 Wed 12:48]
Looking good. I've proposed myself as another maintainer for FPU
emulation and will handle the pull request once the tree opens.
Absences
========
- Christmas Holidays
- Connect BKK19 (1-5th April 2019)
Current Review Queue
====================
* {RFC} arm: Allow system registers for KVM guests to be changed by QEMU code
Message-Id: <20181206151401.13455-1-peter.maydell(a)linaro.org>
* {Qemu-arm} {PATCH 00/13} Support disabling TCG on ARM
Message-Id: <20181113165247.4806-1-sameo(a)linux.intel.com>
* {PATCH for-4.0 0/5} tcg/i386: Improve guest_base handling
Message-Id: <20181203160840.15115-1-richard.henderson(a)linaro.org>
* {Qemu-devel} {PATCH for-4.0 00/71} qtest: qgraph driver framework
Message-Id: <1543851204-41186-1-git-send-email-pbonzini(a)redhat.com>
* {Qemu-arm} {PATCH v7 00/16} gdbstub: support for the multiprocess extension
Message-Id: <20181123091729.29921-1-luc.michel(a)greensocs.com>
* {PATCH 0/7} Acceptance Tests: basic architecture support
Message-Id: <20181004151429.7232-1-crosa(a)redhat.com>
--
Alex Bennée
[LLVM-499] LLD support for linking the linux kernel
- [LLVM-504] Support for linker script symbol assignment to an alias.
-- Diagnosed problem and made reproducer on PR.
-- Reviewed the upstream patch.
- [LLVM-503] Support for discarding .dynamic, .dynstr and .dynsym
-- Reviewed upstream patch and proposed testcase that is
representative of the kernel use case.
Some revisiting of scripts and advice on how to cross compile clang
libraries. Looks like I have some updates to do to the documentation
for some configurations I haven't tried before.
- 2 days at ARM internal Codegen conference. Really good event,
standard of work was very high, left enthused.
Planned absences:
Christmas Holiday from 17th December to 4th January
== Progress ==
* FDPIC
- GCC: no feedback yet on v4 patches
- GDB: did not decide yet how/if to commonalize with frv code. Asked
for advise on the gdb list.
* GCC upstream validation:
- reported a few regressions, helped testing some patches
- dealing with some random results, still
- trying qemu-3.1.0-rc3, memory consumption problems with
aarch64-linux. LSF reports (cgroup-based) do not seem consistent with
time --verbose.
* GCC:
- rebased ubsan / bare-metal patches. Trying to build an LLVM
toolchain to see how to properly apply my patches
* misc (conf-calls, meetings, emails, ....)
- reviewing/submitted infra script patches
- ran Spec2006 on aarch32 using gcc-8.2 sysroot, results match the
previous ones, so the improvements are only imputable to the compiler.
- dealing with nasty ST-internal infrastructure problems
- trying to look at noinit/persistent attributes provided by other
toolchains, need a windows machine :(
== Next ==
FDPIC:
- GCC: handle feedback on v4 patches
- GDB: update patches
- uclibc-ng: look at how to test fdpic mode with openadk
Benchmarks:
- collect results
Validation:
- isolate if/why qemu-3.1.0-rc3 consumes more memory than 2.11 for
aarch64-linux target
Progress:
* VIRT-65 [QEMU upstream maintainership]
- release work (we needed an rc4, and then an rc5 due to a
late-breaking security bug)
- wrote a patch which I hope will fix synchronization of system
register state to KVM for a case where QEMU code wants to change
the register values, which it does when QEMU is arranging to inject
an exception into the guest
- catching up on patch review and assembling target-arm.next
ready for when the tree reopens
- some simple patches fixing minor memory leaks spotted by clang LeakSanitizer
- sent a patch for a race condition that meant we would sometimes ignore
a guest-requested system reset or otherwise get confused by it
thanks
-- PMM
== Progress ==
# [LLVM-492] [Thumb GlobalISel] Lower parameters for Thumb functions
- Committed upstream
# [LLVM-500] [Thumb GlobalISel] Support G_ADD, G_SUB, G_MUL
- Started working on this but it became apparent that the existing
tests would be easier to reuse if we had support for G_LOAD first
# [LLVM-506] [Thumb GlobalISel] Support G_LOAD and G_STORE
- Investigated whether we could get TableGen to select G_LOADs and
G_STOREs by porting ComplexPattern
- Unfortunately that is not enough, and even AArch64 has
hand-written code for it in the instruction selector
- Will handle it the ugly way next week
== Plan ==
# LLVM-506, LLVM-500
Greetings,
I’m trying to have the Aarch64 gcc optimize a single function using the O3 optimization in this manner:
void __attribute__ ((optimize ("-O3", "-ftree-vectorize" )))
However, when examining the assembler code, there is no trace of any optimization beyond the project default.
The only way to successfully enforce the optimization is using -O3 in the gcc command line. Then the compiler produces ARM neon instructions.
Do you know any issues regarding function level optimizations and the Aarch64 gcc?
Regards
[Upstream]
Posted a patch set aimed at register allocation vs function calls. It does
reduce code size by a percent or two. Emilio did some benchmarking and found
that it does help a bit, but does not completely eliminate the effect of the
call+ret overhead on the most modern of x86 implementations.
Reviewed v2 of tcg/riscv. Still a lot of work to be done, I think.
Cleanup of all tcg backends vs re-translation, which is no longer a thing.
Cleanup of tcg/i386 vs scratch registers.
[Other]
Updated the mustang to ubuntu 18.10. I was seeing some weirdness
that I'm hoping I can blame on the bionic 4.15 kernel and will be
gone with the cosmic 4.18 kernel. Fingers crossed...
r~
o 4 days week.
o LLVM
* 7.0.1-rc2:
- Miscompare on AArch64:
No luck with Sanitizers enabled, still digging.
* Machine Outliner on ARM prototype:
- Fixed Pic code issue.
- llvm bootstrap in thumb mode gives 4% code size reduction.
- Investigating new issues
o Misc
* Various meetings and discussions.
