== Progress ==
* SVE ACLE
- Revised and reviewed svbic main briant svbic_z for bool
* Fixing uninit warning suppression from tree-ch pass
- Implemented a patch to handle this and regression test is fine.
Will post for review once stage 1 opens
* tree-reassoc improvements
- Looking at possible data structures to best represent
== Plan ==
* Continue with SVE ACLE
* Continue with tree-reassoc
[VIRT-294 # ARMv8.3-PAuth, Pointer Authentication ]
Finished up the linux-user emulation, and posted.
Reviewed a patch set from Huawei also touching PAuth.
[VIRT-327 # Richard's upstream QEMU work ]
Reviewed riscv decodetree v4 patchset.
Partial review of new target/rx patchset. It is confusing enough
to make me want to tackle the variable-length decodetree problem.
Reviewed softtlb resize v7 patchset; ported that to the remaining
tcg backends.
Part way through reviewing Peter's MPS2 patch set.
r~
QEMU Tooling ([VIRT-252])
=========================
QEMU plugin support ([VIRT-280])
- started reviewing {RFC v2 00/38} Plugin support Message-Id:
<20181209193749.12277-1-cota(a)braap.org>
- some bitrot when applied to current tree :/
[VIRT-280] https://projects.linaro.org/browse/VIRT-280
Upstream Work ([VIRT-109])
==========================
- respin {PATCH v3 0/5} support reading some CPUID/CNT registers from
user-space Message-Id:
<20180625160009.17437-1-alex.bennee(a)linaro.org>
- re-based [v3 branch] - I think the id reg stuff is now addressed
by rth's fixes
- still need to address other review comments
- posted {RFC PATCH 0/3} vmbuild tweaks for BSD targets Message-Id:
<20190121171543.32422-1-alex.bennee(a)linaro.org>
- posted {PATCH v3 00/11} current fpu/next queue (tests & build fix)
Message-Id: <20190122215016.18697-12-alex.bennee(a)linaro.org>
- finally solved the weird endianess issue
- merged in {PULL v2 00/11} check-softfloat, fp-bench and clang
compile fixes Message-Id:
<20190123114220.16972-1-alex.bennee(a)linaro.org>
- posted {PATCH v1 00/14} testing/next (binfmt_misc, vm-build and BSD
CI) Message-Id: <20190125140017.6092-1-alex.bennee(a)linaro.org>
- also did some work on [the linux-user multiarch but it is not
ready yet]
- need to finish the re-work of [system test and misc arch] tests
:todo
- will be useful for test cases for plugins
- also more test cases queued up for system tests
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
[v3 branch]
https://github.com/stsquad/qemu/tree/misc/cnt-and-misc-reg-fixes-v3
[the linux-user multiarch but it is not ready yet]
https://github.com/stsquad/qemu/tree/testing/next-with-linux-user
[system test and misc arch]
https://github.com/stsquad/qemu/tree/testing/enable-system-tcg-tests-v2
Completed Reviews [2/2]
=======================
{PATCH 00/18} Acceptance Tests: target architecture support
Message-Id: <20190117185628.21862-1-crosa(a)redhat.com>
- CLOSING NOTE [2019-01-25 Fri 19:33]
Still a few edge cases to work out
{PATCH 0/2} contrib: gitdm: Some updates
Message-Id: <1547807155-4526-1-git-send-email-aleksandar.markovic(a)rt-rk.com>
- CLOSING NOTE [2019-01-25 Fri 19:33]
Queued to my tree
Absences
========
- Connect BKK19 (1-5th April 2019)
- holiday after Connect
Current Review Queue
====================
* {RFC v2 00/38} Plugin support
Message-Id: <20181209193749.12277-1-cota(a)braap.org>
* {RFC} arm: Allow system registers for KVM guests to be changed by QEMU code
Message-Id: <20181206151401.13455-1-peter.maydell(a)linaro.org>
* {Qemu-devel} {PATCH v3 0/4} tcg: support heterogenous CPU clusters
Message-Id: <20190121152218.9592-1-peter.maydell(a)linaro.org>
* {Qemu-devel} {PATCH RFC 00/11} Add Renesas RX archtecture
Message-Id: <20190121131602.55003-1-ysato(a)users.sourceforge.jp>
* {Qemu-devel} {PATCH 00/11} target/arm: Implement ARMv8.5-BTI
Message-Id: <20190110121736.23448-1-richard.henderson(a)linaro.org>
* {PATCH v5 00/73} per-CPU locks
Message-Id: <20181213050453.9677-1-cota(a)braap.org>
--
Alex Bennée
Majority of the week spent preparing for Fosdem talk on LLD:
- Built Chrome for Arm and AArch64 to investigate link time
performance on non-X86 platforms
-- Both gold and bfd take a considerable amount of time to produce
stubs/veneers/errata fixes
-- AArch64 link time is comparable to X86
- LLD gets more usage out of multithreading than gold
- Studied Gold and BFD structure to compare to LLD
- About half of slides written.
Some minor involvement with some investigations for ClangBuiltLinux.
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ code review:
- 'SBSA reference' model (now quite close to being in shape to go in)
- RTH's BTI patchset
- RTH's patchset adding TBI support to user-mode emulation
+ sent patches fixing the last lot of clang
-Waddress-of-packed-member warnings
+ had another look at the prototype work I did to use Sphinx
for QEMU's documentation -- updated the patchset and started
looking at how to tie it into our makefiles.
+ sent patches fixing a handful of underdecodings in our A64 decoder,
where we should have UNDEFed but did not
* VIRT-268 [QEMU support for dual-core Cortex-M Musca board]
+ sent out v1 of the patchset implementing the SSE-200 and MPS2 AN521 model
+ read through the Musca-B1 docs to confirm what we can easily
put into an initial implementation of a model
thanks
-- PMM
== Progress ==
* Out of office on Monday
* [Thumb GlobalISel] Support G_SHL, G_ASHR, G_LSHR [LLVM-517]
- Committed upstream
* [Thumb GlobalISel] Support G_SDIV and G_UDIV [LLVM-516]
- Most of the work done, ready to commit next week
* LLVM 8.0 Release for ARM & AArch64 [LLVM-526]
- Started a few jobs, but ran into some trouble with our containers
- Will look more into it next week
* Use new version of GCC on buildbots [LLVM-515]
- Got it to work and committed patch; we have 2 silent bots running with GCC-7
- Will keep monitoring the bots and if they seem stable we can merge
to tcwg-llvmprod next week
== Plan ==
* Test LLVM 8.0.0 RC1
* Commit LLVM-516
* More GlobalISel
* Out of office on Friday
Hi Martin and Linaro-toolchain team,
We want to use 4.8.5 cross compile toolchain to build ko.
But we can't find such version on the release site[1].
Is there a 4.8.5 cross compile toolchain?
[1] https://releases.linaro.org/components/toolchain/gcc-linaro/
Best,
Xinliang
== Progress ==
* SVE ACLE
- Committed patches for
* svabs, svneg, svnot and svsqrt series
* svdiv series
* svmulh series
* svand, svorr, and sveor series
* svdot series
- Working on svbic and svbic_b variants
* Others
- Looking into tree-reassoc improvements for next stage1
- Looked into kernel plugin issue for arm
== Plan ==
* Continue with SVE ACLE
* Continue with tree-reassoc