Hi,
It looks like the following bots assigned to you started failing recently:
http://lab.llvm.org:8011/builders/libcxx-libcxxabi-libunwind-armv7-linuxhttp://lab.llvm.org:8011/builders/libcxx-libcxxabi-libunwind-armv7-linux-no…
The failing tests are all filesystem tests:
FAIL: libc++::assign.pass.cpp
FAIL: libc++::path.pass.cpp
FAIL: libc++::replace_filename.pass.cpp
FAIL: libc++::refresh.pass.cpp
FAIL: libc++::file_size.pass.cpp
FAIL: libc++::file_type_obs.pass.cpp
FAIL: libc++::hard_link_count.pass.cpp
FAIL: libc++::last_write_time.pass.cpp
FAIL: libc++::ctor.pass.cpp
FAIL: libc++::ctor.pass.cpp
FAIL: libc++::increment.pass.cpp
FAIL: libc++::exists.pass.cpp
FAIL: libc++::is_block_file.pass.cpp
FAIL: libc++::is_character_file.pass.cpp
FAIL: libc++::is_directory.pass.cpp
FAIL: libc++::is_empty.pass.cpp
FAIL: libc++::is_fifo.pass.cpp
FAIL: libc++::is_other.pass.cpp
FAIL: libc++::is_regular_file.pass.cpp
FAIL: libc++::is_socket.pass.cpp
Having seen some of these issues before, I strongly suspect this is due to the fact that your builder is running as root. Libc++'s filesystem tests are known to fail when run as root, because some of them need to check for failure to access some files for which there's no permission. This doesn't seem to work when run as root.
Can you work with us to resolve this issue?
Thanks,
Louis
== Progress ==
* GCC upstream validation:
- reported a couple of failures/regressions
* GCC:
- comparing testsuite results for cortex-m3 and cortex-m33 with
cortex-a9 to check what cortex-M problem there are.
Spent a long time isolating a regression in CMSE tests. Filed
PR94445 which was then quickly fixed by upstream in ICF optimization.
* misc:
- infra fixes / troubleshooting / reviews
== Next ==
* FDPIC GDB
* GCC/cortex-M
[VIRT-349 # QEMU SVE2 Support ]
Met with Qualcomm on Friday to discuss sharing the development work, and help
start bringing their new-hire, Stephen Long, up to speed on qemu.
Gave Stephen generic qemu development pointers, and a simple set of SVE2
instruction on which to wet his feet.
[VIRT-327 # Richard's upstream QEMU work ]
Better constant propagation and allocation for TCG.
Worked on probe_guest_base as a follow-up to some of the work Alex was doing
wrt init_guest_space.
Misc patch review for 5.0.
[GCC]
Posted v3 of aarch64 cmpti patch set.
r~
== This Week ==
* LLVM
- LLVM-611 (Tune heuristic for blx): Posted upstream.
- LLVM-612 (Redundant reg moves for 8-bit immediates): WIP patch
* Public Holiday
- one day off
== Next Week ==
- Continue with LLVM tasks
- Start looking at GNU-659
VirtIO Related Work ([VIRT-366])
================================
- minor planning work
- need a few slides with virtio architectures for Victor
- a overview blogpost for Ebba
[VIRT-366] <https://projects.linaro.org/browse/VIRT-366>
Upstream Work ([VIRT-109])
==========================
- GSoC feedback on proposals
- we have 3 students putting forward proposals for TCG cache plugin
- posted [PATCH] hw/core: properly terminate loading .hex on EOF
record Message-Id: <20200401193849.14017-1-alex.bennee(a)linaro.org>
- posted [PATCH] target/arm: don't expose "ieee_half" via gdbstub
Message-Id: <20200402143913.24005-1-alex.bennee(a)linaro.org>
- posted [PATCH for 5.0 v2 00/10] A selection of sanitiser fixes
Message-Id: <20200401094759.5835-1-alex.bennee(a)linaro.org>
- the linux-user guest map is better targeted at next week
- posted [PATCH v3 for 5.0-rc2 00/12] a selection of random fixes
Message-Id: <20200403191150.863-1-alex.bennee(a)linaro.org>
[VIRT-109] <https://projects.linaro.org/browse/VIRT-109>
Completed Reviews [1/1]
=======================
[PATCH for-5.0 v3 0/7] configure: Improve PIE and other linkage
Message-Id: <20200327220353.27233-1-richard.henderson(a)linaro.org>
Absences
========
- Splitting time between work and home-schooling
Current Review Queue
====================
* [PATCH v4 00/10] tests/vm: Add support for aarch64 VMs
Message-Id: <20200312142728.12285-1-robert.foley(a)linaro.org>
Added: <2020-03-27 Fri>
* [PATCH v8 00/74] per-CPU locks
Message-Id: <20200326193156.4322-1-robert.foley(a)linaro.org>
Added: <2020-03-27 Fri>
* [virtio-dev] [RFC PATCH] virtio-iommu: Add PAGE_SIZE_MASK property
Message-Id: <20200323133831.2110014-1-jean-philippe(a)linaro.org>
Added: <2020-03-27 Fri>
* [virtio-dev] [PATCH v2 00/10] virtio-mem: paravirtualized memory
Message-Id: <20200311171422.10484-1-david(a)redhat.com>
Added: <2020-03-27 Fri>
--
Alex Bennée
Progress:
* VIRT-65 [QEMU upstream maintainership]
- More freeze related wrangling...
* VIRT-241 [QEMU ISA Support for A-profile]
- pushed the ARMv8.2-TTS2UXN patchset out to the mailing list
- found and fixed a bug in our PAN support where we were making
PSTATE.PAN forbid execute access, not just data access
* VIRT-364 [QEMU support for ARMv8.1-M extensions]
- Started on some preliminary refactoring that we'll need so we can
more conveniently modify the decoder for v8.1M: converting the
A32/T32 Neon decoder to use decodetree. I've done the "post-v8.0
extensions" instructions, and started on the loads-and-stores.
thanks
-- PMM
Hi,
We are having some serious problems after we upgraded from C++14 to C++17
on an Jetson TX2 ARM device. Our system tests started to behave differently
and fail.
It seems that when our application uses a library (also developed by us)
some data gets corrupted when delivered to a class constructor. For
example, the .second of and std::pair<float> appears to be the .first and
the .second is garbage. This is deterministic, but different tests are
failing depending on the combination: library C++17/C++14 <-> application
C++14/C++17.
This is on Ubuntu 18.04 and gcc version 7.5.0 (Ubuntu 7.5.0-3ubuntu1~18.04).
Nothing like this happens on Intel.
So:
ARM, C++14: OK
Intel, C++14: OK
ARM, C++17: FAIL
Intel, C++17: OK
Any ideas what could cause this? I know this is a bit vague, but this a
commercial, closed-source application so I cannot yet give any other
information.
BR,
Jussi Lind
[VIRT-349 # QEMU SVE2 Support ]
Posted the first incremental patch set
for review, as requested by Qualcomm.
[VIRT-327 # Richard's upstream QEMU work ]
Patch review, much of it 5.0 related,
but also v6 of the riscv vector patch set.
Revise the PIE and linkage patch set.
r~
== Progress ==
* GCC upstream validation:
- reported a couple of failures/regressions
* GCC:
- comparing testsuite results for cortex-m3 and cortex-m33 with
cortex-a9 to check what cortex-M problem there are. Fixed a few
testcases. Managed to use qemu-system-arm to run cortex-m33 code with
CMSE features. (Thanks to Peter Maydell for the help!)
* misc:
- infra fixes / troubleshooting / reviews
== Next ==
* FDPIC GDB
* GCC/cortex-M
Progress:
* VIRT-65 [QEMU upstream maintainership]
- Softfreeze this week, so a lot of pull request handling, and
one last small arm pullreq to put together and send out
- Our Coverity Scan setup was broken (the person who usually does
the builds updated his machine to a newer Fedora which broke the tool).
I pulled up an old patchset I had from a year ago which scripts things
so you can do a build-and-upload automatically via Docker so that
we're not dependent on one person for this. This took longer than I
expected as there were a bunch of things that needed fixing both in
the scripting and in bits of the codebase that the tools warned about.
Patch series sent.
- When we did get a Coverity run through, it reported 112 new issues;
spent some time going through and triaging them (lots of false positives
but also lots of real bugs) and submitting patches for some of them.
* VIRT-364 [QEMU support for ARMv8.1-M extensions]
- sketched out the work required and created some 'story' level
cards to go under the epic. Still open questions:
+ should we model Cortex-M55 or a more generic 'max' CPU?
+ what board model do we want to use?
+ does LITE have any guest code using v8.1M features for testing?
Random notes:
* my new desk chair and standing desk arrived this week
(the latter still needs assembling...) so I am gradually
improving the rough edges of my WFH setup.
thanks
-- PMM