== Progress ==
* GCC upstream validation:
- reported a few regressions / minor testcase fix
- enabled gcc-testresults for release branches, which will send even more emails
* benchmarking:
- added HAL support for the stm32 board we have in the Lab. Will start
testing once the board is actually connected to a builder
* misc:
- infra patches/reviews
== Next ==
* Holidays next two weeks, back on July 28th
* GCC/cortex-M testing improvements & fixes
* cortex-m benchmarking
== Progress ==
* Uploaded binaries for llvm 10.0.1 rc3 and rc4
* More work on Morello (including docs)
== Plan ==
* More Morello
* On vacation between July 20 - 31
4 day week.
[VIRT-327 # Richard's upstream QEMU work ]
Bug hunting vs aa32 ldrex/strex. I had hoped it would be relatively easy to
reproduce -- just run something from the .NET testsuite -- but even getting
that far wasn't obvious. So I put that aside; let's see if Peter's request for
an actual reproducer gets results.
Bug hunting vs aa64 gcc sync-4.c as reported by clyon. I determined that it's
not the fault of the null-pointer dereference, and that something goes wrong
somewhere in libgcc's exception unwind prior to the c++ throw. But it doesn't
fail all of the time. And worse, the problem vanishes when randomize_va_space
is disabled. So I can neither get a "good" vs "bad" trace without needless
differences nor produce a failure under gdb. I should try again with rr and
see if that works...
r~
Linaro folks - why is this buildbot sending mail when it's already red
(looks like this buildbot has been red for a while, at least 11187
seems to be red for the same reason that 11188 is red - so the people
on this blame list aren't relevant)? That adds noise to the buildbot
results & makes it harder for developers to find actionable email.
On Mon, Jul 6, 2020 at 9:30 PM <llvm.buildmaster(a)lab.llvm.org> wrote:
>
> The Buildbot has detected a new failure on builder clang-cmake-armv7-full while building llvm.
> Full details are available at:
> http://lab.llvm.org:8011/builders/clang-cmake-armv7-full/builds/11188
>
> Buildbot URL: http://lab.llvm.org:8011/
>
> Buildslave for this Build: linaro-tk1-08
>
> Build Reason: scheduler
> Build Source Stamp: [branch master] 0c6b6e28e70c06a3cb4704d2d8f90829a689e230
> Blamelist: Amara Emerson <amara(a)apple.com>,Amy Kwan <amy.kwan1(a)ibm.com>,Biplob Mishra <biplmish(a)in.ibm.com>,David Blaikie <dblaikie(a)gmail.com>,Eric Christopher <echristo(a)gmail.com>,Jordan Rupprecht <rupprecht(a)google.com>,LLVM GN Syncbot <llvmgnsyncbot(a)gmail.com>,Nico Weber <thakis(a)chromium.org>,Sanjay Patel <spatel(a)rotateright.com>,Wolfgang Pieb <wolfgang_pieb(a)playstation.sony.com>,Yuanfang Chen <yuanfang.chen(a)sony.com>
>
> BUILD FAILED: failed build stage 2
>
> sincerely,
> -The Buildbot
>
>
>
== Progress ==
* GCC upstream validation:
- reported a few regressions
- added fortran to arm-none-eabi configs
- enabled gcc-testresults for most configurations, which now sends a
lot of emails
* GCC:
- PR94743 (IRQ handler and Neon registers): patch committed.
* benchmarking:
- cleanup of hal lib to run benchmarks on stm32, the board we have in
TCWG is different from the ones we used in ST, I'll have to update the
hal settings accordingly.
* misc:
- switch tcwg_gnu job to use our gcc-compare-results script, to be
able to ignore some tests with random results (especially under qemu)
== Next ==
* GCC/cortex-M testing improvements & fixes
* cortex-m benchmarking
[VIRT-344 # ARMv8.5-MemTag, Memory Tagging Extension ]
Lots of work here, finally merging MTE system support.
[VIRT-349 # QEMU SVE2 Support ]
Posted v2, all 100 patches.
[VIRT-327 # Richard's upstream QEMU work ]
A fair amount of patch review.
Merged the decodetree exclusive groups feature.
r~
== This Week ==
* GCC
- GNU-659 (LTO regressing calculix): Running and analysing benchmarks
with different configs.
* LLVM
- LVM-611 (heuristic to lower calls to blx for armv6-m): Addressing
upstream suggestions.
- LLVM-612 (code-gen for imm8 args for Thumb1): Posted patch upstream,
waiting for feedback.
* Validation
- Prototype script for metric based comparison
== Next Week ==
- Continue ongoing tasks
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ respun the QEMU side of the "fix 32-bit-guest readdir of
ext4 filesystems on a 64-bit host" work to match Linus Walleij's
most recent kernel patch.
+ code review (actually emptied my queue for the first time in forever):
- patchset adding some missing devices to MPS2 boards
- another round of RTH's MTE patchset (now fully reviewed and ready to go in)
- SMMUv3.2 range-invalidation support patchset from RedHat
- RTH's implementation of the kernel MTE ABI for QEMU linux-user
+ had a look at some of the lurking Coverity issues
* VIRT-364 [QEMU support for ARMv8.1-M extensions]
+ fp16 support: started by working out risu patterns for all the
affected instructions so we have a means for testing the changes.
+ implemented a handful of fp16 insns; plan to back-burner this for
a little while as it's not going to be complete before we freeze
for QEMU 5.1, so work like reviewing the MTE patchset and other
for-5.1 efforts will take priority.
NB: on holiday next week
thanks
-- PMM
VirtIO Related Work ([VIRT-366])
================================
- posted [PATCH v2 0/5] some tweaks to the document build process
Message-Id: <20200619204959.7877-1-alex.bennee(a)linaro.org>
Upstream Work ([VIRT-109])
==========================
- posted [PATCH v2] docs/devel: add some notes on tcg-icount for
developers Message-Id:
<20200619170930.11704-1-alex.bennee(a)linaro.org>
[VIRT-109] <https://projects.linaro.org/browse/VIRT-109>
Completed Reviews [7/7]
=======================
[RFC v5 0/4] QEMU cpus.c refactoring
Message-Id: <20200615180346.3992-1-cfontana(a)suse.de>
[PATCH v1 1/2] semihosting: defer connect_chardevs a little more to use serialx
Message-Id: <1592215252-26742-1-git-send-email-frederic.konrad(a)adacore.com>
- CLOSING NOTE [2020-06-16 Tue 16:14]
A little confused as to the purpose of patch 1/2.
Added: <2020-06-15 Mon>
[PATCH 0/5] linux-user: Support extended clone(CLONE_VM)
Message-Id: <20200612014606.147691-1-jkz(a)google.com>
- CLOSING NOTE [2020-06-16 Tue 17:08]
This is super hairy stuff. Would like to know the use case for all
this additional complexity.
Added: <2020-06-12 Fri>
[PATCH v2 00/15] tests/tcg: Add TriCore tests
Message-Id: <20200604085441.103087-1-kbastian(a)mail.uni-paderborn.de>
- CLOSING NOTE [2020-06-16 Tue 18:29]
A few minor comments, v2 should be mergable.
Added: <2020-06-04 Thu>
[PATCH 0/3] Add Scripts for Finding Top 25 Executed Functions
Message-Id: <20200616231204.8850-1-ahmedkhaledkaraman(a)gmail.com>
[RFC] ivshmem v2: Shared memory device specification
Message-Id: <f109fe5a-92eb-e5a5-bb83-ada42b3a9b61(a)siemens.com>
- CLOSING NOTE [2020-06-17 Wed 16:49]
Finally got round to making some comments. All in all looks pretty
sane.
Added: <2020-05-25 Mon>
[PATCH v9 0/9] tests/vm: Add support for aarch64 VMs
Message-Id: <20200601211421.1277-1-robert.foley(a)linaro.org>
Absences
========
- Home-schooling in mornings
Current Review Queue
====================
* [RFC][PATCH v2 0/3] IVSHMEM version 2 device for QEMU
Message-Id: <cover.1578407802.git.jan.kiszka(a)siemens.com>
Added: <2020-04-09 Thu>
* [PATCH v7 00/42] target/arm: Implement ARMv8.5-MemTag, system mode
Message-Id: <20200603011317.473934-1-richard.henderson(a)linaro.org>
Added: <2020-06-18 Thu>
* [PATCH RFC 00/22] Support of Virtual CPU Hotplug for ARMv8 Arch
Message-Id: <20200613213629.21984-1-salil.mehta(a)huawei.com>
Added: <2020-06-13 Sat>
* [PATCH v8 0/4] vhost-user block device backend implementation
Message-Id: <20200604233538.256325-1-coiby.xu(a)gmail.com>
Added: <2020-06-12 Fri>
--
Alex Bennée
