Progress:
* UM-2 [QEMU upstream maintainership]
- more investigation, triage and fixing of minor bugs in run-up to release
* QEMU-422 [QEMU Arm Neoverse V1 vCPU for TCG]
- starting working on the PMUv8p5 enhancements. These consist of a couple
of new cycle-counter-disable bits (easy) and extension of the event
counters to 64 bits (more tricky). So far I have code for the easy part
and have made a start on the hard part...
-- PMM
