Morello
- Started to document the LLD implementation.
- Implemented CHERI concentrate alignment for the important sections.
- Dynamic linking is feature complete, but not finished yet, still Todo:
-- More test cases for the various different combinations.
-- Refactor to clean up the implementation.
-- Rebase all the patches to remove the false starts.
-- Update the documentation I've just started as it is already out of date.
-- Not looked at ifunc or TLS yet.
llvm-mc
Some review on MC patch to allow limited symbolic computation when
evaluating .if
Progress / KVM Forum trip report:
* As usual, we held the QEMU Summit at the same time as the forum;
this is an hour-or-two invitation only meeting of the top 20 or
so maintainers/submaintainers, discussing process and other project
issues. A proper summary/writeup of the minutes will be posted to
qemu-devel later, but IMHO this year the most interesting topics were:
- Spreading the load of managing pull request merges; currently
I do this with the aid of some hand-hacked scripts. To be able
to spread this work among more people we need to replace that
with a more maintained and standardized CI/testing setup. RedHat
have agreed to provide some people to work on at least the initial
setup part of this, and we got some consensus that the approach to
take was to use Gitlab with some custom 'runners' to handle the
'build/test on aarch64/ppc/s390x/etc' parts.
- We talked about the project's general stance on 'plugin' interfaces;
which can be controversial both because they commit us to maintaining
a stable API/ABI and because they have the potential to be used to
work around the GPL (eg proprietary device models). We plan to
write up some guidelines here (mostly just writing down the
existing consensus).
- We also talked (again) about our handling of security issues and
CVEs. My impression is that there are some parts of this that
people aren't hugely happy with but that nobody has the time/effort to
try to improve things (eg better documentation/tracking of issues,
more prompt upstream point releases with security fixes), so things
are likely to stay about as they are now.
* Interesting talks (videos are being uploaded to:
https://www.youtube.com/channel/UCRCSQmAOh7yzgheq-emy1xA ):
- 'The Hype Around the RISC-V Hypervisor' : the RISC-V architecture's
hypervisor extension isn't completely finalized yet, but it's far
enough advanced that KVM support and also QEMU emulation of it have
been written. An amusing sign of the architecture's academic
underpinnings is that this first version doesn't have any hardware
acceleration of the interrupt controller, but does have full
nested-virtualization support.
- 'ZERO: Next Generation Virtualization Platform for Huawei Cloud':
Huawei describe hardware for a cloud environment which offloads
as much as possible of the hypervisor work to custom I/O cards
and a custom silicon cloud-control device, in a general approach
that's probably familiar to anybody who watched the Amazon Nitro
presentation from the other year.
- 'What's Going On? Taking Advantage of TCG's Total System Awareness':
Alex Bennée's talk on the introspection plugin work we've been doing
in Linaro (and which will be in QEMU 4.2).
- 'Playing Lego with Virtualization Components':
description of the Rust 'rust-vmm' set of libraries intended to
provide useful building blocks for putting together virtual machine
managers (like Firecracker, crosvm). Basically similar content to
a presentation they did for Cambridge University earlier this year,
but this talk's been recorded so is good if you weren't in the audience
the first time around.
* And as always the in-person networking is valuable:
- Oracle have a "split device emulation into separate processes" idea
that's alarmingly invasive of the source code, but Stefan came up
with an approach that might let them do what they need without making
the source code harder to work with for the rest of us.
- Met the RedHat person who's going to do the CI-for-pullreqs work
(see QEMU Summit item earlier) : getting this unstalled was probably
the most useful concrete outcome of the conference
- Finally met Aurelien Jarno (a longstanding hobbyist contributor
to QEMU who usually can't attend these conferences)
* While at the conference Drew and I managed to finally get the
SVE support for KVM guests into master (the last hurdle was an awkward
test failure on the aarch32-compat-on-aarch64-kernel setup I happen
to use as one of my build test environments; we don't care about whether
KVM really works in this setup but we need 'make check' to not fail)
* Also managed to fit in some wrangling of pull requests; the timing
of the 4.2 release unfortunately put softfreeze on the Tuesday
before the conference and rc0 on the Tuesday afterwards; rc0
ended up being postponed a couple of days as a consequence.
thanks
-- PMM
Linaro
- On buildbot monitoring duty, relatively quiet week with just a
couple of fairly simple to diagnose problems to report.
Morello
- Dynamic linking progressing albeit slowly.
-- Trying to work out the requirements from existing documents and
implementation.
-- Have some simple cases doing mostly the right thing and have
written some tests.
-- Will need to rewrite to move calculations earlier in the link-step.
-- Morello is quite different from Cheri in this regard so I have had
to diverge much more from the implementation.
Tree:
https://github.com/rth7680/qemu.git tgt-arm-vhe-5
Testcase:
qemu-test:~rth/linux/initramfs-min.cpio.gz
The host kernel could be anything, but I've been using
the same Image.gz that is inside the cpio archive.
./aarch64-softmmu/qemu-system-aarch64 -m 4G \
-M virt,virtualization=on,gic-version=max -cpu max \
-kernel Image.gz -initrd initramfs-min.cpio.gz
At the shell prompt, ./test will run a guest kernel with kvm.
As momentarily discussed with PMM in the hallway:
As soon as the guest kernel enables interrupts,
arch_timer_starting_cpu
enable_percpu_irq
irq_percpu_enable
gic_unmask_irq
-- Incorrect exception delivery.
the GTIMER_PHYS interrupt is delivered to EL2 (seems to be ok), the host kernel
does something (haven't dug into what exactly, bug presumably setting bits that
are supposed to pass the virq to the guest), and immediately another interrupt
is delivered to EL2. Repeat.
Whether this is incorrect routing of the virq interrupt, or incorrect
masking/acking of the hard irq interrupt at EL2, I do not yet know.
PMM: I don't know the answer to either (a) or (b) as asked on hangouts. I
think (b) is correct, but I can't be sure. I'm trying to understand how (a) is
supposed to work now. In particular, I can't find any code that sets
HCR_EL2.{VI,VF}, only tests them.
r~
